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    • 1. 发明授权
    • Display drive circuit
    • 显示驱动电路
    • US08154560B2
    • 2012-04-10
    • US12468345
    • 2009-05-19
    • Yoshiki KurokawaYasuyuki KudoHiroyuki NittaKazuki HommaJunya Takeda
    • Yoshiki KurokawaYasuyuki KudoHiroyuki NittaKazuki HommaJunya Takeda
    • G09G5/00G09G5/02H04N1/46H04N1/60G06T1/00G06K9/00G06K9/40
    • G09G1/002G09G3/3655G09G5/04G09G5/06G09G2320/0242G09G2340/145
    • A display drive circuit of the invention has: an initial-color-gamut-apex-coordinate-storing unit capable of storing initial color gamut apex coordinates; a user-target-color-gamut-apex-coordinate-storing unit capable of storing user target color gamut apex coordinates; a saturation-expansion-coefficient-deciding unit for deciding expansion coefficients of saturation data based on the initial and user target color gamut apex coordinates; and an expansion unit for expanding saturations of display data based on the saturation expansion coefficients. The expansion coefficients of saturation data are decided based on the initial and user target color gamut apex coordinates, and saturations of display data are expanded according to the expansion coefficients. Thus, the degree of expanding the saturations can be controlled for each color gamut or each of R, G and B color properties of an LC display panel.
    • 本发明的显示驱动电路具有:能够存储初始色域顶点坐标的初始色域 - 顶点坐标存储单元; 能够存储用户目标色域顶点坐标的用户对象色彩 - 顶点坐标存储单元; 饱和扩张系数决定单元,用于基于初始和用户目标色域顶点坐标来确定饱和度数据的扩展系数; 以及用于基于饱和度膨胀系数扩大显示数据的饱和度的扩展单元。 基于初始和用户目标色域顶点坐标来确定饱和度数据的扩展系数,根据扩展系数扩展显示数据的饱和度。 因此,可以对于每个色域或LC显示面板的R,G和B颜色属性中的每一个来控制饱和度的扩大程度。
    • 2. 发明授权
    • Nonvolatile semiconductor memory device and method of manufacturing the same
    • 非易失性半导体存储器件及其制造方法
    • US08008704B2
    • 2011-08-30
    • US12372505
    • 2009-02-17
    • Hiroyuki Nitta
    • Hiroyuki Nitta
    • H01L21/00
    • H01L27/11524H01L21/764H01L23/5222H01L27/11521H01L2924/0002H01L2924/00
    • To reduce capacitance between each adjacent two word lines in a semiconductor memory device, a first insulating film is formed, with a first gate insulating film thereunder, in an interstice between gates respectively of each adjacent two memory transistors, and in an interstice between a gate of a selective transistor and a gate of a memory transistor adjacent thereto. Additionally, a second insulating film is formed on the first insulating film, sides of the gate of each memory transistor, and a side, facing the memory transistor, of the gate of the selective transistor. A third insulating film is formed parallel to a semiconductor substrate so as to cover a metal silicide film, the first and second insulating films and fourth and fifth insulating films. A void part is provided in the interstice between each adjacent two gates of the memory transistors, and in the interstice between the gate of the selective transistor and the gate of the memory transistor adjacent thereto. A bottom and two sides of each void part are shielded by the second insulating film, and a top of each void part is shielded by the third insulating film.
    • 为了减小半导体存储器件中每个相邻两个字线之间的电容,在每个相邻的两个存储晶体管的栅极之间的间隙中形成第一绝缘膜,其间具有第一栅极绝缘膜,并且在栅极 的选择晶体管和与其相邻的存储晶体管的栅极。 此外,第二绝缘膜形成在第一绝缘膜上,每个存储晶体管的栅极的侧面和面向存储晶体管的选择性晶体管的栅极的一侧。 第三绝缘膜平行于半导体衬底形成以覆盖金属硅化物膜,第一和第二绝缘膜以及第四和第五绝缘膜。 在存储晶体管的每个相邻的两个栅极之间的间隙中以及与选择晶体管的栅极和与其相邻的存储晶体管的栅极之间的空隙中设置空隙部分。 每个空隙部分的底部和两侧被第二绝缘膜屏蔽,并且每个空隙部分的顶部被第三绝缘膜屏蔽。
    • 7. 发明授权
    • Display device and driving method thereof
    • 显示装置及其驱动方法
    • US07692618B2
    • 2010-04-06
    • US11657457
    • 2007-01-25
    • Masashi NakamuraHiroyuki NittaNobuhiro TakedaMasahiro Tanaka
    • Masashi NakamuraHiroyuki NittaNobuhiro TakedaMasahiro Tanaka
    • G09G3/36
    • G09G3/3648G09G3/30G09G2300/08G09G2310/062G09G2320/0261
    • A display device includes a pixel array having a plurality of pixels, a plurality of first signal lines and a plurality of second signal lines. A first driving circuit outputs scanning signals to the plurality of first signal lines, and a second driving circuit outputs display signals to the plurality of second signal lines. Each pixel of the plurality of pixels is operated in a normally black-displaying mode, the first driving circuit repeats a first step of sequentially selecting N lines of the plurality of first signal lines and a second step of selecting Z lines of the plurality of first signal lines that are separate from the N lines, where N and Z are natural numbers, and the second driving circuit repeats outputting N times the display signals and outputting one time a blanking signal which masks an image displayed on corresponding pixels.
    • 显示装置包括具有多个像素的像素阵列,多个第一信号线和多个第二信号线。 第一驱动电路向多条第一信号线输出扫描信号,第二驱动电路向多条第二信号线输出显示信号。 多个像素的每个像素以常黑显示模式操作,第一驱动电路重复顺序选择多条第一信号线中的N条线的第一步骤,以及选择多条第一信号线的Z线的第二步骤 与N线分离的信号线,其中N和Z是自然数,并且第二驱动电路重复输出N倍的显示信号,并输出一次屏蔽对应像素上显示的图像的消隐信号。
    • 8. 发明申请
    • NONVOLATILE SEMICONDUCTOR MEMORY AND MANUFACTURING METHOD THEREOF
    • 非易失性半导体存储器及其制造方法
    • US20100052030A1
    • 2010-03-04
    • US12546885
    • 2009-08-25
    • Takeshi SAKAGUCHIHiroyuki Nitta
    • Takeshi SAKAGUCHIHiroyuki Nitta
    • H01L27/105H01L21/8239
    • H01L27/11519H01L21/3086H01L21/32139H01L27/0207H01L27/11521H01L27/11524
    • A nonvolatile semiconductor memory of an aspect of the present invention including a plurality of first active areas which are provided in the memory cell array side-by-side in a first direction and which have a dimension smaller than a fabrication limit dimension obtained by lithography, a second active area provided between the first active areas adjacent in the first direction, a memory cell unit which is provided in each of the plurality of first active areas and which has memory cells and select transistors, and a linear contact which is connected to one end of the memory cell unit and which extends in the first direction, wherein an area in which the linear contact is provided is one semiconductor area to which the plurality of first active areas are connected by the plurality of second active areas, and the bottom surface of the linear contact is planar.
    • 本发明的一个方面的非易失性半导体存储器包括多个第一有源区,它们沿着第一方向并排设置在存储单元阵列中,并且具有小于通过光刻获得的制造极限尺寸的尺寸, 设置在第一方向相邻的第一有源区之间的第二有源区,设置在多个第一有源区中的每一个中并具有存储单元和选择晶体管的存储单元单元,以及连接到第一有源区的一个线性触点 存储单元单元的端部并且沿着第一方向延伸,其中设置有线性触点的区域是多个第一有源区域通过多个第二有源区域连接的一个半导体区域,并且底表面 的线性接触是平面的。
    • 9. 发明申请
    • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    • 半导体器件及其制造方法
    • US20090215242A1
    • 2009-08-27
    • US12433547
    • 2009-04-30
    • Hiroyuki Nitta
    • Hiroyuki Nitta
    • H01L21/762
    • H01L21/76224
    • A semiconductor device includes a semiconductor substrate having a first element isolation trench with a first opening width and a second element isolation trench with a second opening width larger than the first opening width, the first and second element isolation trenches having respective inner surfaces, the second element isolation trench having opposed sidewalls and bottom, a first element-isolating insulation film formed on the inner surfaces of the first and second element isolation trenches, a second element-isolating insulation film formed on the first element-isolating insulation film so as to fill the first element isolation trench and further formed on the first element-isolating insulation film formed on the sidewall of the second element isolation trench, and a third element-isolating insulation film provided on the second element-isolating insulation film and the first element-isolating insulation film formed on the bottom of the second element isolation trench, so as to fill the second element isolation trench.
    • 半导体器件包括具有第一开口宽度的第一元件隔离沟槽和具有大于第一开口宽度的第二开口宽度的第二元件隔离沟槽的半导体衬底,第一和第二元件隔离沟槽具有相应的内表面,第二元件隔离沟槽具有相应的内表面, 具有相对的侧壁和底部的元件隔离沟槽,形成在第一和第二元件隔离沟槽的内表面上的第一元件隔离绝缘膜,形成在第一元件隔离绝缘膜上以填充的第二元件隔离绝缘膜 第一元件隔离沟槽,并且还形成在形成在第二元件隔离沟槽的侧壁上的第一元件隔离绝缘膜上,以及设置在第二元件隔离绝缘膜上的第三元件隔离绝缘膜和第一元件隔离绝缘膜 绝缘膜形成在第二元件隔离沟槽的底部,因此t o填充第二个元件隔离沟槽。