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1. 发明申请

US20050083353A1 Display device 审中-公开
标题翻译：显示设备
公开(公告)号：US20050083353A1
公开(公告)日：2005-04-21
申请号：US10914645
申请日：2004-08-10
申请人： Junichi Maruyama , Hiroyuki Nitta
发明人： Junichi Maruyama , Hiroyuki Nitta
IPC分类号： G09G3/36
CPC分类号： G09G3/3611 , G09G2300/0434 , G09G2320/0242 , G09G2320/0252 , G09G2320/0257 , G09G2320/0261 , G09G2340/16
摘要： A correction circuit produces correction data, which is used to shorten a response time in a display panel, using first display data received from an external device and second display data stored in a frame memory, and appends the correction data to the first display data. The correction circuit includes: a detection information production circuit that detects based on first color information, second color information, and third color information, which is inferred from the response characteristic of the display panel and represents a change of a gray-scale level from one level to other, whether a color gap is produced during the change of a gray-scale level from one level to other; and a production circuit that when the detection information production circuit detects that a color gap is produced during the change of a gray-scale level from one level to other, produces correction data for the purpose of preventing production of the color gap.
摘要翻译：校正电路产生校正数据，其用于使用从外部设备接收的第一显示数据和存储在帧存储器中的第二显示数据来缩短显示面板中的响应时间，并将校正数据附加到第一显示数据。校正电路包括：检测信息生成电路，其基于从显示面板的响应特性推断的第一颜色信息，第二颜色信息和第三颜色信息进行检测，并且表示灰度级的变化在灰度级别从一个级别到另一级别的变化期间是否产生色差; 以及生成电路，当检测信息生成电路检测到在灰度级从一个级别变化到另一级时产生色差时，产生用于防止色差产生的校正数据。

2. 发明授权

US07110009B2 Display control circuit and display driving circuit 有权
标题翻译：显示控制电路和显示驱动电路
公开(公告)号：US07110009B2
公开(公告)日：2006-09-19
申请号：US10845076
申请日：2004-05-14
申请人： Yoshihisa Ooishi , Hiroyuki Nitta , Junichi Maruyama , Naoki Takada , Kenichi Ono
发明人： Yoshihisa Ooishi , Hiroyuki Nitta , Junichi Maruyama , Naoki Takada , Kenichi Ono
IPC分类号： G09G5/10 , G09G3/36
CPC分类号： G09G3/3688 , G09G3/20 , G09G3/2011 , G09G3/3696 , G09G2310/027 , G09G2310/0297 , G09G2310/08 , G09G2320/0666 , G09G2320/0673 , G09G2330/028 , G09G2340/0428 , G09G2370/08
摘要： A display control circuit divides M display data for M pixels assigned to each of plural display driving circuits among display data received in an order of an arrangement of pixels in a row, into plural display data sets each composed of N display data, rearranges the plural display data sets such that one of the plural display data sets assigned to one of the plural display driving circuits is followed by one of the plural display data sets assigned to another of the plural display driving circuits succeeding the one of the plural display driving circuits, and outputs the rearranged display data sets to the plural display driving circuits.
摘要翻译：显示控制电路将分配给多个显示驱动电路中的每一个的M个像素的M个显示数据按照以行像素排列的顺序接收的显示数据分割成由N个显示数据组成的多个显示数据组，重新排列复数显示数据组，使得分配给多个显示驱动电路之一的多个显示数据组中的一个显示数据组之后是分配给多个显示驱动电路中的一个显示驱动电路之后的多个显示驱动电路中的另一个的多个显示数据组中的一个，并将重新布置的显示数据组输出到多个显示驱动电路。

3. 发明授权

US07847771B2 Display device capable of adjusting divided data in one frame 有权
标题翻译：能够在一帧中调整分割数据的显示装置
公开(公告)号：US07847771B2
公开(公告)日：2010-12-07
申请号：US11279598
申请日：2006-04-13
申请人： Junichi Maruyama , Hiroyuki Nitta , Yoshihisa Ooishi , Kikuo Ono
发明人： Junichi Maruyama , Hiroyuki Nitta , Yoshihisa Ooishi , Kikuo Ono
IPC分类号： G09G3/36
CPC分类号： G09G3/2022 , G09G3/3688 , G09G2320/0252 , G09G2320/0261 , G09G2320/0276 , G09G2340/16
摘要： A speed doubling circuit receiving display data in one frame period and outputting field A display data and field B display data in one frame period. A field conversion circuit converts the field A display data to have a highest gray-scale if the display data has a high gray-scale, and converts the field B display data to have a lowest gray-scale if the display data has a low gray-scale. Between the speed doubling circuit and field conversion circuit, an emphasis circuit is disposed which emphasizes each of the field A display data and field B display data in accordance with the display data one frame period before and the display data in the present frame period.
摘要翻译：在一个帧周期中接收显示数据并在一个帧周期中输出字段A显示数据和字段B显示数据的加倍电路。如果显示数据具有高灰阶，则场转换电路将场A显示数据转换为具有最高灰度，并且如果显示数据具有低灰度，则将场B显示数据转换为具有最低灰度 -规模。在倍速电路和场转换电路之间，设置强调电路，其根据前一帧周期的显示数据和当前帧周期中的显示数据强调场A显示数据和场B显示数据中的每一个。

4. 发明申请

US20090278869A1 Display Device 审中-公开
标题翻译：显示设备
公开(公告)号：US20090278869A1
公开(公告)日：2009-11-12
申请号：US11913963
申请日：2006-05-10
申请人： Yoshihisa Oishi , Hiroyuki Nitta , Junichi Maruyama , Kikuo Ono
发明人： Yoshihisa Oishi , Hiroyuki Nitta , Junichi Maruyama , Kikuo Ono
IPC分类号： G09G5/10
CPC分类号： G09G3/2025 , G09G3/2081 , G09G3/3614 , G09G3/3648 , G09G3/3677 , G09G2310/0216 , G09G2310/0218 , G09G2310/0254 , G09G2310/0267 , G09G2320/0204 , G09G2320/0219 , G09G2320/0247 , G09G2320/0252 , G09G2320/0261 , G09G2320/0276 , G09G2340/0435 , G09G2340/16
摘要： A one-frame interval is divided into a light field interval and a dark field interval. In the light field interval, the display data of high tones is displayed, while in the dark field interval, the display data of low tones is displayed. This divisional display makes it possible to pseudoly display the tones of the input display data. Then, in a case that the tones of the input display data is on the lower tone side, the display data of the dark field is set to the corresponding minimum tone with the minimum luminance, while in a case that the tone of the input display data is on the higher tone side, the display data of the light field is set to the corresponding maximum tone with the maximum luminance.
摘要翻译：一帧间隔被分为光场间隔和暗场间隔。在光场间隔中，显示高音的显示数据，而在暗场间隔中显示低音的显示数据。这种分割显示使得可以伪显示输入显示数据的色调。然后，在输入显示数据的音调在低音侧的情况下，暗场的显示数据被设置为具有最小亮度的相应的最小音，而在输入显示的音调数据在较高音调侧，光场的显示数据被设置为具有最大亮度的相应的最大色调。

5. 发明授权

US08154560B2 Display drive circuit 有权
标题翻译：显示驱动电路
公开(公告)号：US08154560B2
公开(公告)日：2012-04-10
申请号：US12468345
申请日：2009-05-19
申请人： Yoshiki Kurokawa , Yasuyuki Kudo , Hiroyuki Nitta , Kazuki Homma , Junya Takeda
发明人： Yoshiki Kurokawa , Yasuyuki Kudo , Hiroyuki Nitta , Kazuki Homma , Junya Takeda
IPC分类号： G09G5/00 , G09G5/02 , H04N1/46 , H04N1/60 , G06T1/00 , G06K9/00 , G06K9/40
CPC分类号： G09G1/002 , G09G3/3655 , G09G5/04 , G09G5/06 , G09G2320/0242 , G09G2340/145
摘要： A display drive circuit of the invention has: an initial-color-gamut-apex-coordinate-storing unit capable of storing initial color gamut apex coordinates; a user-target-color-gamut-apex-coordinate-storing unit capable of storing user target color gamut apex coordinates; a saturation-expansion-coefficient-deciding unit for deciding expansion coefficients of saturation data based on the initial and user target color gamut apex coordinates; and an expansion unit for expanding saturations of display data based on the saturation expansion coefficients. The expansion coefficients of saturation data are decided based on the initial and user target color gamut apex coordinates, and saturations of display data are expanded according to the expansion coefficients. Thus, the degree of expanding the saturations can be controlled for each color gamut or each of R, G and B color properties of an LC display panel.
摘要翻译：本发明的显示驱动电路具有：能够存储初始色域顶点坐标的初始色域 - 顶点坐标存储单元; 能够存储用户目标色域顶点坐标的用户对象色彩 - 顶点坐标存储单元; 饱和扩张系数决定单元，用于基于初始和用户目标色域顶点坐标来确定饱和度数据的扩展系数; 以及用于基于饱和度膨胀系数扩大显示数据的饱和度的扩展单元。基于初始和用户目标色域顶点坐标来确定饱和度数据的扩展系数，根据扩展系数扩展显示数据的饱和度。因此，可以对于每个色域或LC显示面板的R，G和B颜色属性中的每一个来控制饱和度的扩大程度。

6. 发明授权

US08008704B2 Nonvolatile semiconductor memory device and method of manufacturing the same 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US08008704B2
公开(公告)日：2011-08-30
申请号：US12372505
申请日：2009-02-17
申请人： Hiroyuki Nitta
发明人： Hiroyuki Nitta
IPC分类号： H01L21/00
CPC分类号： H01L27/11524 , H01L21/764 , H01L23/5222 , H01L27/11521 , H01L2924/0002 , H01L2924/00
摘要： To reduce capacitance between each adjacent two word lines in a semiconductor memory device, a first insulating film is formed, with a first gate insulating film thereunder, in an interstice between gates respectively of each adjacent two memory transistors, and in an interstice between a gate of a selective transistor and a gate of a memory transistor adjacent thereto. Additionally, a second insulating film is formed on the first insulating film, sides of the gate of each memory transistor, and a side, facing the memory transistor, of the gate of the selective transistor. A third insulating film is formed parallel to a semiconductor substrate so as to cover a metal silicide film, the first and second insulating films and fourth and fifth insulating films. A void part is provided in the interstice between each adjacent two gates of the memory transistors, and in the interstice between the gate of the selective transistor and the gate of the memory transistor adjacent thereto. A bottom and two sides of each void part are shielded by the second insulating film, and a top of each void part is shielded by the third insulating film.
摘要翻译：为了减小半导体存储器件中每个相邻两个字线之间的电容，在每个相邻的两个存储晶体管的栅极之间的间隙中形成第一绝缘膜，其间具有第一栅极绝缘膜，并且在栅极的选择晶体管和与其相邻的存储晶体管的栅极。此外，第二绝缘膜形成在第一绝缘膜上，每个存储晶体管的栅极的侧面和面向存储晶体管的选择性晶体管的栅极的一侧。第三绝缘膜平行于半导体衬底形成以覆盖金属硅化物膜，第一和第二绝缘膜以及第四和第五绝缘膜。在存储晶体管的每个相邻的两个栅极之间的间隙中以及与选择晶体管的栅极和与其相邻的存储晶体管的栅极之间的空隙中设置空隙部分。每个空隙部分的底部和两侧被第二绝缘膜屏蔽，并且每个空隙部分的顶部被第三绝缘膜屏蔽。

7. 再颁专利

USRE42597E1 Liquid crystal driver and liquid crystal display device using the same 有权
标题翻译：液晶驱动器和液晶显示装置使用相同
公开(公告)号：USRE42597E1
公开(公告)日：2011-08-09
申请号：US11980691
申请日：2007-10-31
申请人： Hiroyuki Nitta , Hiroyuki Mano , Tsutomu Furuhashi , Isao Takita , Satoru Tsunekawa , Toshio Futami , Makiko Ikeda
发明人： Hiroyuki Nitta , Hiroyuki Mano , Tsutomu Furuhashi , Isao Takita , Satoru Tsunekawa , Toshio Futami , Makiko Ikeda
IPC分类号： G09G3/36
CPC分类号： G09G3/2011 , G09G3/3614 , G09G3/3655 , G09G3/3688 , G09G3/3696 , G09G2310/0248 , G09G2310/027 , G09G2310/0281 , G09G2310/0289 , G09G2310/0297 , G09G2330/023
摘要： A liquid crystal driver includes a voltage generator for generating gray scale voltages on the basis of reference voltages, and an output device for selecting one gray scale voltage from the generated gray scale voltages in accordance with display data, for applying inversion/non-inversion control to the selected gray scale voltage with respect to an inversion reference voltage on the basis of the selected gray scale voltage, an AC switching signal and the inversion reference voltage, and for outputting different liquid crystal supply voltages for one and the same display data to a liquid crystal panel.
摘要翻译：液晶驱动器包括：基于参考电压产生灰度电压的电压发生器;以及用于根据显示数据从产生的灰度级电压中选择一个灰度级电压的输出装置，用于施加反相/非反相控制基于所选择的灰度级电压，AC开关信号和反转参考电压相对于反转参考电压的所选择的灰度级电压，并且将用于一个和相同显示数据的不同液晶电源电压输出到液晶面板。

8. 发明申请

US20110038194A1 SEMICONDUCTOR STORAGE DEVICE 有权
标题翻译：半导体存储设备
公开(公告)号：US20110038194A1
公开(公告)日：2011-02-17
申请号：US12855151
申请日：2010-08-12
申请人： Takeshi MURATA , Yutaka Ishibashi , Hiroyuki Nitta
发明人： Takeshi MURATA , Yutaka Ishibashi , Hiroyuki Nitta
IPC分类号： G11C5/06 , G11C11/00
CPC分类号： G11C5/063 , G11C11/22 , G11C13/0007 , G11C17/16 , G11C17/165 , G11C2213/71 , G11C2213/72 , H01L27/101 , H01L27/1021
摘要： According to one embodiment, a semiconductor storage device includes a plurality of parallel first interconnects extending in a first direction, a plurality of parallel second interconnects which extend in a second direction perpendicular to the first direction and which make a two-level crossing with respect to the first interconnects, and memory cell structures provided in regions where the first interconnects and the second interconnects make two-level crossings, the memory cell structures being connected on one end to the first interconnects and connected on the other end to the second interconnects, the memory cell structure including a variable resistive element and a non-ohmic element which are connected in series, wherein the endmost first interconnect is disconnected in at least one portion.
摘要翻译：根据一个实施例，半导体存储装置包括在第一方向上延伸的多个平行的第一互连件，多个平行的第二互连件，其沿与第一方向垂直的第二方向延伸，并且相对于所述第一互连和存储单元结构设置在所述第一互连和所述第二互连构成两级交叉的区域中，所述存储单元结构的一端连接到所述第一互连并在另一端连接到所述第二互连，存储单元结构包括串联连接的可变电阻元件和非欧姆元件，其中最末端的第一互连件在至少一部分中断开。

9. 发明授权

US07883964B2 Nonvolatile semiconductor memory and a fabrication method thereof 失效
标题翻译：非易失性半导体存储器及其制造方法
公开(公告)号：US07883964B2
公开(公告)日：2011-02-08
申请号：US12181978
申请日：2008-07-29
申请人： Akira Goda , Hiroyuki Nitta
发明人： Akira Goda , Hiroyuki Nitta
IPC分类号： H01L21/8247
CPC分类号： H01L29/7881 , G11C16/0416 , G11C16/0483 , H01L27/0207 , H01L27/105 , H01L27/115 , H01L27/11519 , H01L27/11521 , H01L27/11524 , H01L27/11526
摘要： A nonvolatile semiconductor memory includes: a device region and a device isolating region, which have a pattern with a striped form that extends in a first direction, and are alternately and sequentially disposed at a first pitch in a second direction that is perpendicular to the first direction; and a contact made of a first conductive material, which is connected to the device region and disposed at the first pitch in the second direction. On a cross section of the second direction, the bottom width of the contact is longer than the top width of the contact, and the bottom width is longer than the width of the device region.
摘要翻译：非易失性半导体存储器包括：器件区域和器件隔离区域，其具有沿第一方向延伸的条纹形式的图案，并且在垂直于第一方向的第二方向上以第一间距交替地并且顺序地设置方向; 以及由第一导电材料制成的接触件，其连接到器件区域并沿第二方向以第一间距设置。在第二方向的横截面上，触点的底部宽度比触点的顶部宽度长，并且底部宽度比器件区域的宽度长。

10. 发明授权

US07696959B2 Display device and driving method of the same 有权
标题翻译：显示装置及其驱动方法相同
公开(公告)号：US07696959B2
公开(公告)日：2010-04-13
申请号：US11407043
申请日：2006-04-20
申请人： Hiroyuki Nitta , Masahisa Tsukahara , Toshifumi Ozaki
发明人： Hiroyuki Nitta , Masahisa Tsukahara , Toshifumi Ozaki
IPC分类号： G09G3/22
CPC分类号： G09G3/22 , G09G2310/0267 , G09G2320/0223
摘要： Scan electrode potential detected by a feedback switch is inputted into a negative-phase input terminal of an amplifier, reference selection potential from a reference-selection-potential-signal generation circuit is inputted into a positive-phase input terminal of the amplifier, and the reference-selection-potential-signal generation circuit delays reference potential of a reference voltage source, thereby scan electrode potential without overshooting components can be achieved.
摘要翻译：由反馈开关检测出的扫描电极电位被输入到放大器的负相输入端，参考选择电位信号发生电路的参考选择电位被输入到放大器的正相输入端，参考选择电位信号发生电路延迟参考电压源的参考电位，从而可以实现扫描电极电位，而不会产生过冲成分。

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