会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Semiconductor device having a self-aligned contact structure and methods of forming the same
    • 具有自对准接触结构的半导体器件及其形成方法
    • US06720269B2
    • 2004-04-13
    • US10347219
    • 2003-01-21
    • Byung-Jun ParkYoo-Sang Hwang
    • Byung-Jun ParkYoo-Sang Hwang
    • H01L21311
    • H01L27/10855H01L21/76834H01L21/76895H01L21/76897H01L27/10885
    • A self-aligned contact structure in a semiconductor device and methods for making such contact structure wherein the semiconductor device has a semiconductor substrate having active regions, an interlayer insulating layer covering the semiconductor substrate excluding at least a portion of each active region, at least two parallel interconnections on the interlayer insulating layer, at least one active region being relatively disposed between the at least two parallel interconnections, each interconnection having sidewalls, bottom and a width (x), a mask pattern having a top portion (z) and a bottom portion (y) formed on each interconnection, and a conductive layer pattern penetrating at least a portion of the interlayer insulating layer between the mask pattern and being electrically connected to at least one active region, wherein: x≦y≦z and x
    • 半导体器件中的自对准接触结构以及用于制造这种接触结构的方法,其中半导体器件具有具有有源区的半导体衬底,覆盖半导体衬底的层间绝缘层,不包括每个有源区的至少一部分,至少两个 所述层间绝缘层上的平行互连,至少一个有源区相对设置在所述至少两个平行互连之间,每个互连具有侧壁,底部和宽度(x),具有顶部(z)和底部 形成在每个互连上的部分(y),以及穿透掩模图案之间的层间绝缘层的至少一部分并且与至少一个有源区电连接的导电层图案,其中:x <= y <= z和x
    • 2. 发明授权
    • Semiconductor device having a self-aligned contact structure and methods of forming the same
    • 具有自对准接触结构的半导体器件及其形成方法
    • US06534813B1
    • 2003-03-18
    • US09889588
    • 2001-08-02
    • Byung-Jun ParkYoo-Sang Hwang
    • Byung-Jun ParkYoo-Sang Hwang
    • H01L27108
    • H01L27/10855H01L21/76834H01L21/76895H01L21/76897H01L27/10885
    • A self-aligned contact structure in a semiconductor device and methods of forming the same are provided, wherein the self-aligned contact structure in the semiconductor device comprises a semiconductor substrate having active regions; an interlayer insulating layer covering the semiconductor substrate excluding at least a portion of each active region; at least two parallel interconnections on the interlayer insulating layer, at least one active region being relatively disposed between the at least two parallel interconnections, each interconnection having sidewalls, a bottom and a width (x); a mask pattern having a top portion of width (z) and a bottom portion of width (y) formed on each interconnection; and a conductive layer pattern penetrating at least a portion of the interlayer insulating layer between the mask pattern and being electrically connected to at least one active region, wherein x≦y≦z and x
    • 提供半导体器件中的自对准接触结构及其形成方法,其中半导体器件中的自对准接触结构包括具有有源区的半导体衬底; 覆盖半导体衬底的层间绝缘层,所述层间绝缘层不包括每个有源区的至少一部分; 在所述层间绝缘层上的至少两个平行互连,至少一个有源区相对设置在所述至少两个平行互连之间,每个互连具有侧壁,底部和宽度(x); 具有形成在每个互连上的宽度(z)的顶部和宽度(y)的底部的掩模图案; 以及导电层图案,其穿透所述掩模图案之间的所述层间绝缘层的至少一部分并与至少一个有源区电连接,其中x <= y
    • 8. 发明授权
    • Method of manufacturing a CMOS image sensor
    • CMOS图像传感器的制造方法
    • US08043927B2
    • 2011-10-25
    • US12457773
    • 2009-06-22
    • Byung-Jun ParkTae-Hun LeeSeung-Hun Shin
    • Byung-Jun ParkTae-Hun LeeSeung-Hun Shin
    • H01L21/76
    • H01L27/14683H01L27/1463H01L27/1464Y10S438/975
    • In a method of manufacturing a complementary metal-oxide semiconductor (CMOS) image sensor (CIS), an epitaxial layer may be formed on a first substrate including a chip area and a scribe lane area. A first impurity layer may be formed adjacent to the first substrate by implanting first impurities into the epitaxial layer. A photodiode may be formed in the epitaxial layer on the chip area. A circuit element electrically connected to the photodiode may be formed on the epitaxial layer. A protective layer protecting the circuit element may be formed on the epitaxial layer. A second substrate may be attached onto the protective layer. The first substrate may be removed to expose the epitaxial layer. A color filter layer may be formed on the exposed epitaxial layer using the first impurity layer as an alignment key. A microlens may be formed over the color filter layer.
    • 在制造互补金属氧化物半导体(CMOS)图像传感器(CIS)的方法中,可以在包括芯片区域和划线区域的第一基板上形成外延层。 可以通过将第一杂质注入到外延层中而与第一衬底相邻地形成第一杂质层。 可以在芯片区域上的外延层中形成光电二极管。 电连接到光电二极管的电路元件可以形成在外延层上。 可以在外延层上形成保护电路元件的保护层。 第二基底可以附着在保护层上。 可以去除第一衬底以暴露外延层。 可以使用第一杂质层作为对准键,在暴露的外延层上形成滤色器层。 可以在滤色器层上形成微透镜。
    • 10. 发明授权
    • Image sensor and method of manufacturing the same
    • 图像传感器及其制造方法
    • US07411173B2
    • 2008-08-12
    • US11447411
    • 2006-06-06
    • Byung-Jun Park
    • Byung-Jun Park
    • H01L31/00
    • H01L27/14643H01L27/14603H01L27/1463H01L27/14689
    • An image sensor is provided. The image sensor includes a photodiode disposed in a semiconductor substrate and a first device isolating layer formed having an impurity with a conductivity type in the semiconductor substrate adjacent to the photodiode. The image sensor further includes a second device isolating layer composed of an insulating layer that covers the first device isolating layer. In addition, the image sensor further includes an interlayer insulating layer formed on the second device isolating layer and which is composed of a material with refractivity greater than that of the second device isolating layer.
    • 提供图像传感器。 图像传感器包括设置在半导体衬底中的光电二极管和在半导体衬底中邻近光电二极管形成具有导电类型杂质的第一器件隔离层。 图像传感器还包括由覆盖第一器件隔离层的绝缘层构成的第二器件隔离层。 此外,图像传感器还包括形成在第二器件隔离层上并由折射率大于第二器件隔离层的折射率的材料构成的层间绝缘层。