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1. 发明申请

US20080272424A1 Nonvolatile Memory Device Having Fast Erase Speed And Improved Retention Characteristics And Method For Fabricating The Same 审中-公开
标题翻译：具有快速擦除速度和改进的保持特性的非易失性存储器件及其制造方法
公开(公告)号：US20080272424A1
公开(公告)日：2008-11-06
申请号：US11940647
申请日：2007-11-15
申请人： Yong Top Kim , Hong Seon Yang , Tae Yoon Kim , Yong Soo Kim , Seung Ryong Lee , Moon Sig Joo
发明人： Yong Top Kim , Hong Seon Yang , Tae Yoon Kim , Yong Soo Kim , Seung Ryong Lee , Moon Sig Joo
IPC分类号： H01L27/00 , H01L21/8246
CPC分类号： H01L21/0214 , H01L21/0217 , H01L21/02337 , H01L21/0234 , H01L21/3145 , H01L21/3185 , H01L29/40117
摘要： Disclosed herein is a nonvolatile memory device that includes a substrate, a tunneling layer over the substrate, a charge trapping layer over the tunneling layer, an insulating layer for improving retention characteristics over the charge trapping layer, a blocking layer over the insulating layer, and a control gate electrode over the blocking layer. Also disclosed herein is a method of making the device.
摘要翻译：本文公开了一种非易失性存储器件，其包括衬底，衬底上的隧道层，隧道层上的电荷捕获层，用于改善电荷俘获层上的保留特性的绝缘层，绝缘层上的阻挡层，以及阻挡层上的控制栅电极。本文还公开了制造该装置的方法。

2. 发明申请

US20080093661A1 NON-VOLATILE MEMORY DEVICE HAVING A CHARGE TRAPPING LAYER AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：具有电荷捕获层的非易失性存储器件及其制造方法
公开(公告)号：US20080093661A1
公开(公告)日：2008-04-24
申请号：US11770683
申请日：2007-06-28
申请人： Moon Sig Joo , Hong Seon Yang , Jae Chul Om , Seung Ho Pyi , Seung Ryong Lee , Yong Top Kim
发明人： Moon Sig Joo , Hong Seon Yang , Jae Chul Om , Seung Ho Pyi , Seung Ryong Lee , Yong Top Kim
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L29/792 , H01L29/40117 , H01L29/4234 , H01L29/66833
摘要： A non-volatile memory device comprises a substrate, a tunneling layer over the substrate, a charge trapping layer comprising a stoichiometric silicon nitride layer and a silicon-rich silicon nitride layer over the tunneling layer, a blocking layer over the charge trapping layer, and a control gate electrode over the blocking layer.
摘要翻译：非易失性存储器件包括衬底，衬底上的隧道层，在隧穿层上方包含化学计量氮化硅层和富硅氮化物层的电荷捕获层，电荷俘获层上的阻挡层，以及阻挡层上的控制栅电极。

3. 发明授权

US08288819B2 Semiconductor device with bulb-type recessed channel and method for fabricating the same 有权
标题翻译：具有灯泡型凹槽的半导体器件及其制造方法
公开(公告)号：US08288819B2
公开(公告)日：2012-10-16
申请号：US12953255
申请日：2010-11-23
申请人： Yong Soo Kim , Hong Seon Yang , Se Aug Jang , Seung Ho Pyi , Kwon Hong , Heung Jae Cho , Kwan Yong Lim , Min Gyu Sung , Seung Ryong Lee , Tae Yoon Kim
发明人： Yong Soo Kim , Hong Seon Yang , Se Aug Jang , Seung Ho Pyi , Kwon Hong , Heung Jae Cho , Kwan Yong Lim , Min Gyu Sung , Seung Ryong Lee , Tae Yoon Kim
IPC分类号： H01L21/336
CPC分类号： H01L29/66553 , H01L27/10876 , H01L29/518 , H01L29/66621
摘要： A method for fabricating a semiconductor device includes providing a substrate having a bulb-type recessed region, forming a gate insulating layer over the bulb-type recessed region and the substrate, and forming a gate conductive layer over the gate insulating layer. The gate conductive layer fills the bulb-type recessed region. The gate conductive layer includes two or more conductive layers and a discontinuous interface between the conductive layers.
摘要翻译：一种制造半导体器件的方法，包括提供具有灯泡型凹陷区域的衬底，在灯泡型凹陷区域上形成栅极绝缘层和衬底，并在栅极绝缘层上形成栅极导电层。栅极导电层填充灯泡型凹陷区域。栅极导电层包括两个或多个导电层和导电层之间的不连续界面。

4. 发明授权

US06531372B2 Method of manufacturing capacitor of semiconductor device using an amorphous TaON 有权
标题翻译：使用无定形TaON制造半导体器件的电容器的方法
公开(公告)号：US06531372B2
公开(公告)日：2003-03-11
申请号：US09745426
申请日：2000-12-26
申请人： Kee Jeung Lee , Hong Seon Yang
发明人： Kee Jeung Lee , Hong Seon Yang
IPC分类号： H01L2120
CPC分类号： H01L28/40 , H01L21/02183 , H01L21/02271 , H01L21/02315 , H01L21/02356 , H01L21/3145 , H01L27/10852 , H01L28/60
摘要： The present invention discloses a method of manufacturing a TaON capacitor having a high capacity comprising the steps of forming an intermediate insulating layer on a semiconductor substrate; forming a lower electrode on the intermediate insulating layer; depositing a TaON thin film in an amorphous state on the lower electrode; annealing the amorphous TaON thin film in a vacuum state to form a crystalline TaON thin film that will serve as a dielectric layer; and forming an upper electrode on the dielectric layer made of the TaON thin film.
摘要翻译：本发明公开了一种制造具有高容量的TaON电容器的方法，包括在半导体衬底上形成中间绝缘层的步骤; 在中间绝缘层上形成下电极; 在下电极上沉积非晶状态的TaON薄膜; 在真空状态下退火无定形TaON薄膜以形成将用作介电层的结晶TaON薄膜; 并在由TaON薄膜制成的电介质层上形成上电极。

5. 发明授权

US06287910B1 Method for forming a capacitor using tantalum nitride as a capacitor dielectric 有权
公开(公告)号：US06287910B1
公开(公告)日：2001-09-11
申请号：US09741875
申请日：2000-12-22
申请人： Kee Jeung Lee , Hong Seon Yang
发明人： Kee Jeung Lee , Hong Seon Yang
IPC分类号： H01L218242
摘要： A method for fabricating capacitors for semiconductor devices utilizing a Ta3N5 dielectric layer is provided by the present invention. This method includes the steps of forming a lower electrode on a semiconductor substrate, depositing an amorphous TaON thin film over the lower electrode, and subjecting the deposited amorphous TaON thin film to a thermal process in an NH3 atmosphere, thereby forming a Ta3N5 dielectric film, and forming an upper electrode on the Ta3N5 dielectric film. The resulting Ta3N5 dielectric film provides a dielectric constant significantly greater than those that can be achieved with conventional dielectric films. Accordingly, the Ta3N5 dielectric film of the present invention can be used to manufacture capacitors for the next generation semiconductor memory devices of 256M grade or higher.

6. 发明授权

US06200877B1 Method of forming a charge storage electrode having a selective hemispherical grains silicon film in a semiconductor device 有权
标题翻译：在半导体器件中形成具有选择性半球状晶粒硅膜的电荷存储电极的方法
公开(公告)号：US06200877B1
公开(公告)日：2001-03-13
申请号：US09294348
申请日：1999-04-20
申请人： Kwang Seok Jeon , Jung Yun Mun , Hoon Jung Oh , Sang Ho Woo , Seung Woo Shin , Il Keoun Han , Hong Seon Yang
发明人： Kwang Seok Jeon , Jung Yun Mun , Hoon Jung Oh , Sang Ho Woo , Seung Woo Shin , Il Keoun Han , Hong Seon Yang
IPC分类号： H01L2120
CPC分类号： H01L28/84 , H01L27/10852
摘要： The present invention relates to semiconductor manufacturing field, more particularly, to a process of forming a charge storage electrode to which a selective hemispherical grains (HSG) silicon film is applied. The object of the present invention is to provide a method of forming a charge storage electrode having the selective HSG silicon film in semiconductor device which can secure a sufficient capacitor effective surface area by obtaining desired grain size at the time of selective HSG silicon film formation. The present invention prevents remaining of carbon component which obstructs the growth of HSG silicon film after dry etching process by limiting the carbon halide gas used in dry etching process of amorphous silicon film for defining the charge storage electrode at the time of process of forming the charge storage electrode having selective HSG silicon film. That is, the present invention is a technology of etching a part of amorphous silicon film by using general carbon halide gas at the time of dry etching process of the amorphous silicon film for defining the charge storage electrode, and then, finally etching the remaining part of amorphous silicon film by using silicon etching gas such as SF6 gas, Cl2+O2 gas, HBr gas, etc. not containing carbon component or only using the etching gas such as SF6 gas, Cl2+O2 gas, HBr gas, etc. not containing carbon component during selective etching of amorphous silicon film.
摘要翻译：本发明涉及半导体制造领域，更具体地说，涉及形成选择性半球状晶粒（HSG）硅膜的电荷存储电极的工艺。本发明的目的是提供一种在半导体器件中形成具有选择性HSG硅膜的电荷存储电极的方法，其可以通过在选择性HSG硅膜形成时获得所需的晶粒尺寸来确保足够的电容器有效表面积。本发明通过限制在形成电荷的过程中用于限定电荷存储电极的非晶硅膜的干法蚀刻工艺中使用的卤化碳气体来防止在干法蚀刻工艺之后妨碍HSG硅膜生长的碳成分残留存储电极具有选择性HSG硅膜。也就是说，本发明是通过在用于限定电荷存储电极的非晶硅膜的干蚀刻工艺时使用一般的卤化物气体来蚀刻非晶硅膜的一部分的技术，然后最后蚀刻其余部分通过使用不含碳成分的SF6气体，Cl2 + O2气体，HBr气体等硅蚀刻气体，或者仅使用诸如SF 6气体，Cl 2 + O 2气体，HBr气体等蚀刻气体的非晶硅膜，在非晶硅膜的选择性蚀刻期间含有碳成分。

7. 发明授权

US5893747A Method of manufacturing a polysilicon film of a semiconductor device 失效
标题翻译：制造半导体器件的多晶硅膜的方法
公开(公告)号：US5893747A
公开(公告)日：1999-04-13
申请号：US726941
申请日：1996-10-07
申请人： Hong Seon Yang
发明人： Hong Seon Yang
IPC分类号： H01L21/20 , H01L21/336 , H01L29/786 , H01L21/326
CPC分类号： H01L21/2022
摘要： The present invention relates to a method of manufacturing a polysilicon film having a grain size of 0.5 .mu.m or more by forming a nucleus site of low density at low temperature of about 450.degree. C. with Si.sub.2 H.sub.6 gas, by growing an amorphous silicon film to some degree with the nucleus site, forming an amorphous silicon film of a device to a desired thickness by carrying out a main deposition process at the temperature of 500 through 600.degree. C. with SiH.sub.4 or SiH.sub.4 containing a small amount of impurity, and carrying out a heat treatment process for a long period at the temperature range of 600 through 700.degree. C. with N.sub.2 gas.
摘要翻译：本发明涉及一种制造具有0.5μm或更大的晶粒尺寸的多晶硅膜的方法，通过在低温约450℃下与Si 2 H 6气体形成低密度的核部位，通过生长非晶硅膜至在一定程度上具有核部位，通过在含有少量杂质的SiH 4或SiH 4在500至600℃的温度下进行主沉积工艺，将器件的非晶硅膜形成所需厚度，并进行在600〜700℃的温度范围内用N 2气体进行长时间的热处理。

8. 发明授权

US06716701B1 Method of manufacturing a semiconductor memory device 有权
标题翻译：制造半导体存储器件的方法
公开(公告)号：US06716701B1
公开(公告)日：2004-04-06
申请号：US10601870
申请日：2003-06-24
申请人： Noh Yeal Kwak , Hong Seon Yang
发明人： Noh Yeal Kwak , Hong Seon Yang
IPC分类号： H01L218247
CPC分类号： H01L27/11526 , H01L27/11534 , H01L29/66825
摘要： Disclosed is a method of manufacturing a semiconductor memory device. An ion implantation layer is formed into a given depth of the semiconductor substrate. Therefore, it is possible to prevent the dopant (P31) gettered on the surface of the semiconductor substrate from being diffused toward the bottom when a well ion is injected. The dopant (P31) gettered on the surface of the semiconductor substrate is easily experienced by transit-enhanced diffusion even at low temperature. Also, the dopant may serve as counter dopping in the buried channel. In the present invention, as the behavior of this dopant (P31) is prohibited in a subsequent annealing process, the concentration of the ion for controlling the threshold voltage could be uniformly kept. Therefore, the present invention can manufacture devices of high reliability having a stable threshold voltage characteristic and can be flexibly applied to manufacturing the devices depending on reduction in the design rule.
摘要翻译：公开了半导体存储器件的制造方法。离子注入层形成为半导体衬底的给定深度。因此，当注入阱离子时，可以防止在半导体衬底的表面上吸收的掺杂物（P31）向底部扩散。在半导体衬底的表面上吸收的掺杂剂（P31）即使在低温也容易受到传输增强扩散的影响。此外，掺杂剂可以用作掩埋沟道中的反掺杂。在本发明中，由于在随后的退火工艺中禁止该掺杂剂（P31）的行为，因此可以均匀地保持用于控制阈值电压的离子的浓度。因此，本发明可以制造具有稳定的阈值电压特性的高可靠性的器件，并且可以灵活地应用于根据设计规则的减少来制造器件。

9. 发明授权

US6034778A Method of measuring surface area variation rate of a polysilicon film having hemispherical grains, and capacitance measuring method and apparatus by the same 有权
标题翻译：测量具有半球形晶粒的多晶硅膜的表面积变化率的方法及其电容测量方法及装置
公开(公告)号：US6034778A
公开(公告)日：2000-03-07
申请号：US298053
申请日：1999-04-22
申请人： Seung Woo Shin , Il Keoun Han , Sang Ho Woo , Hoon Jung Oh , Hong Seon Yang
发明人： Seung Woo Shin , Il Keoun Han , Sang Ho Woo , Hoon Jung Oh , Hong Seon Yang
IPC分类号： H01L27/04 , G01B11/28 , G01B11/30 , H01L21/66 , H01L21/822 , H01L21/8242 , H01L27/108
CPC分类号： G01B11/303
摘要： The present invention is a method which can obtain an actual value close to a desired capacitance of capacitor by precisely monitoring the area variation rate of film by using a correlation between a height of hemispherical grains formed on a surface of film and a surface area of film. The present invention provides a method of calculating an area variation rate `C.sub.E ` by using the porosity ratio `f.sub.v ` and the height `t` of hemispherical grains and measuring the capacitance of capacitor by using the obtained area variation rate. According to this method, the area variation rate of film can be obtained close to actual value by measuring the height of hemispherical grains formed on the surface of film, and the variation in capacitance before completion of capacitor can be precisely obtained. In addition, the present invention has effects of improving the reliability and manufacturing yield of capacitor by enabling the monitoring of area variation rate close to actual value in the step of forming the hemispherical grains on the surface of film.
摘要翻译：本发明是通过使用在膜表面形成的半球形颗粒的高度与膜的表面积之间的相关性来精确地监测膜的面积变化率，可以获得接近于电容器的期望电容的实际值的方法。本发明提供一种通过使用孔隙率'fv'和半球形颗粒的高度't'来计算面积变化率'CE'的方法，并且通过使用获得的面积变化率来测量电容器的电容。根据该方法，可以通过测量形成在膜表面上的半球形颗粒的高度来获得接近实际值的膜的面积变化率，并且可以精确地获得电容器完成之前的电容变化。此外，本发明通过在膜的表面形成半球形颗粒的步骤中能够监测接近实际值的面积变化率来提高电容器的可靠性和制造成品率的效果。

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