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1. 发明申请

US20110272661A1 RESISTIVE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：电阻记忆体装置及其制造方法
公开(公告)号：US20110272661A1
公开(公告)日：2011-11-10
申请号：US12915495
申请日：2010-10-29
申请人： Yong Suk YANG , In-Kyu You , Jae Bon Koo , Soon Won Jung , Kang Dae Kim , Yong-Young Noh
发明人： Yong Suk YANG , In-Kyu You , Jae Bon Koo , Soon Won Jung , Kang Dae Kim , Yong-Young Noh
IPC分类号： H01L45/00 , H01L21/02
CPC分类号： G11C13/0007 , G11C13/0009 , G11C13/0011 , G11C13/0014 , G11C13/0016 , H01L45/04 , H01L45/1233 , H01L45/14 , H01L45/1608
摘要： Provided are a resistive memory device and a method of fabricating the same. The resistive memory device comprises an electron channel layer formed by means of a swelling process and an annealing process. Thus, conductive nanoparticles are uniformly dispersed in the electron channel layer to improve reliability of the resistive memory device. According to the method, an electron channel layer is formed by means of a printing process, a swelling process, and an annealing process. Thus, fabrication time is reduced.
摘要翻译：提供了一种电阻式存储器件及其制造方法。电阻式存储器件包括通过膨胀工艺和退火工艺形成的电子通道层。因此，导电纳米粒子均匀分散在电子通道层中，以提高电阻式存储器件的可靠性。根据该方法，通过印刷工艺，溶胀工艺和退火工艺形成电子通道层。因此，制造时间缩短。

2. 发明授权

US08278138B2 Resistive memory device and method of fabricating the same 有权
标题翻译：电阻式存储器件及其制造方法
公开(公告)号：US08278138B2
公开(公告)日：2012-10-02
申请号：US12915495
申请日：2010-10-29
申请人： Yong Suk Yang , In-Kyu You , Jae Bon Koo , Soon Won Jung , Kang Dae Kim , Yong-Young Noh
发明人： Yong Suk Yang , In-Kyu You , Jae Bon Koo , Soon Won Jung , Kang Dae Kim , Yong-Young Noh
IPC分类号： H01L51/40
CPC分类号： G11C13/0007 , G11C13/0009 , G11C13/0011 , G11C13/0014 , G11C13/0016 , H01L45/04 , H01L45/1233 , H01L45/14 , H01L45/1608
摘要： Provided are a resistive memory device and a method of fabricating the same. The resistive memory device comprises an electron channel layer formed by means of a swelling process and an annealing process. Thus, conductive nanoparticles are uniformly dispersed in the electron channel layer to improve reliability of the resistive memory device. According to the method, an electron channel layer is formed by means of a printing process, a swelling process, and an annealing process. Thus, fabrication time is reduced.
摘要翻译：提供了一种电阻式存储器件及其制造方法。电阻式存储器件包括通过膨胀工艺和退火工艺形成的电子通道层。因此，导电纳米粒子均匀分散在电子通道层中，以提高电阻式存储器件的可靠性。根据该方法，通过印刷工艺，溶胀工艺和退火工艺形成电子通道层。因此，制造时间缩短。

3. 发明授权

US08344366B2 Organic thin film transistor and method of forming the same 有权
标题翻译：有机薄膜晶体管及其形成方法
公开(公告)号：US08344366B2
公开(公告)日：2013-01-01
申请号：US12858868
申请日：2010-08-18
申请人： Kang Dae Kim , In-Kyu You , Jae Bon Koo , Yong Suk Yang , Seung Youl Kang
发明人： Kang Dae Kim , In-Kyu You , Jae Bon Koo , Yong Suk Yang , Seung Youl Kang
IPC分类号： H01L51/10
CPC分类号： H01L51/0545 , H01L51/105
摘要： Provided are an organic thin film transistor and a method of forming the same. The method comprises forming a gate electrode on a substrate, forming a gate dielectric, which covers the gate electrode and includes a recess region at an upper portion, on the substrate, forming a source electrode and a drain electrode in the recess region, and forming an organic semiconductor layer between the source electrode and the drain electrode in the recess region.
摘要翻译：提供一种有机薄膜晶体管及其形成方法。该方法包括在衬底上形成栅电极，形成覆盖栅电极并在衬底上包括上部的凹陷区的栅极电介质，在凹陷区域中形成源电极和漏电极，并形成在凹陷区域中的源电极和漏电极之间的有机半导体层。

4. 发明申请

US20080185677A1 LOW-VOLTAGE ORGANIC THIN FILM TRANSISTOR AND FABRICATION METHOD THEREOF 失效
标题翻译：低电压有机薄膜晶体管及其制造方法
公开(公告)号：US20080185677A1
公开(公告)日：2008-08-07
申请号：US11696805
申请日：2007-04-05
申请人： Jae Woo Yang , Chung Kun Song , Kang Dae Kim , Gi Seong Ryu , Yong Xian Xu , Myung Won Lee
发明人： Jae Woo Yang , Chung Kun Song , Kang Dae Kim , Gi Seong Ryu , Yong Xian Xu , Myung Won Lee
IPC分类号： H01L29/00
CPC分类号： H01L51/105 , H01L51/0094 , H01L51/0525
摘要： The present invention provides an organic thin film transistor (OTFT) being operatable at a low-voltage. The OTFT has a gate dielectric layer of ultra-thin metal oxide or a dual gate dielectric layer of metal oxide and organic dielectric. The metal oxide layer is self-grown to a thickness lower than 10 nm by direct oxidation of a metal gate electrode in O2 plasma process at a temperature lower than 100° C. The gate electrode is deposited with pattern on a plastic or glass substrate. An organic semiconductor layer is deposited on the gate dielectric layer, and source/drain electrodes are formed thereon. In case the dual gate dielectric layer is used, the source/drain electrodes can be disposed under the organic semiconductor layer to realize a bottom contact structure.
摘要翻译：本发明提供可在低电压下操作的有机薄膜晶体管（OTFT）。 OTFT具有超薄金属氧化物的栅介质层或金属氧化物和有机电介质的双栅介电层。金属氧化物层通过在低于100℃的温度下在O 2等离子体工艺中直接氧化金属栅极而自生长至低于10nm的厚度。栅电极沉积有图案在塑料或玻璃基材上。在栅极电介质层上沉积有机半导体层，在其上形成源极/漏极。在使用双栅极电介质层的情况下，源极/漏极可以设置在有机半导体层下面以实现底部接触结构。

5. 发明申请

US20100176379A1 SELF-ALIGNED ORGANIC THIN FILM TRANSISTOR AND FABRICATION METHOD THEREOF 审中-公开
标题翻译：自对准有机薄膜晶体管及其制造方法
公开(公告)号：US20100176379A1
公开(公告)日：2010-07-15
申请号：US12278120
申请日：2008-05-30
申请人： Kang Dae Kim , Taik Min Lee , Hyeon Cheol Choi , Dong Soo Kim , Byun Oh Choi
发明人： Kang Dae Kim , Taik Min Lee , Hyeon Cheol Choi , Dong Soo Kim , Byun Oh Choi
IPC分类号： H01L51/10 , H01L51/40
CPC分类号： H01L51/0545 , H01L51/0015 , H01L51/0021 , H01L51/0023 , H01L51/102
摘要： The present invention relates to a self-aligned organic thin film transistor (TFT) and a fabrication method thereof. According to the present invention, a gate electrode is formed from a first conductive layer patterned on a substrate, a gate dielectric layer is formed on top of the substrate to cover the gate electrode, and a second conductive layer is then formed on the gate dielectric layer. Subsequently, ultraviolet (UV) backside exposure for irradiating the second conductive layer with UV from a bottom side of the substrate using the gate electrode as a mask, and source/drain electrodes self-aligned with the gate electrode is then formed not to overlap with the gate electrode by developing the second conductive electrode. Thereafter, an organic semiconductor layer is formed between and on the source/drain electrodes. In the present invention, an organic TFT can be fabricated using a reel-to-reel process, and therefore, the fabrication process can be simplified.
摘要翻译：本发明涉及一种自对准有机薄膜晶体管（TFT）及其制造方法。根据本发明，栅极电极由图案化在基板上的第一导电层形成，栅极电介质层形成在基板的顶部以覆盖栅电极，然后在栅极电介质上形成第二导电层层。随后，使用栅电极作为掩模从基板的底侧用UV照射第二导电层的紫外（UV）背面曝光，以及与栅电极自对准的源/漏电极，然后形成为不与通过显影第二导电电极来形成栅电极。此后，在源极/漏极之间和之间形成有机半导体层。在本发明中，可以使用卷到盘工艺制造有机TFT，因此可以简化制造工艺。

6. 发明授权

US07648852B2 Low-voltage organic thin film transistor and fabrication method thereof 失效
标题翻译：低电压有机薄膜晶体管及其制造方法
公开(公告)号：US07648852B2
公开(公告)日：2010-01-19
申请号：US11696805
申请日：2007-04-05
申请人： Jae Woo Yang , Chung Kun Song , Kang Dae Kim , Gi Seong Ryu , Yong Xian Xu , Myung Won Lee
发明人： Jae Woo Yang , Chung Kun Song , Kang Dae Kim , Gi Seong Ryu , Yong Xian Xu , Myung Won Lee
IPC分类号： H01L21/00 , H01L51/40
CPC分类号： H01L51/105 , H01L51/0094 , H01L51/0525
摘要： The present invention provides an organic thin film transistor (OTFT) being operatable at a low-voltage. The OTFT has a gate dielectric layer of ultra-thin metal oxide or a dual gate dielectric layer of metal oxide and organic dielectric. The metal oxide layer is self-grown to a thickness lower than 10 nm by direct oxidation of a metal gate electrode in O2 plasma process at a temperature lower than 100° C. The gate electrode is deposited with pattern on a plastic or glass substrate. An organic semiconductor layer is deposited on the gate dielectric layer, and source/drain electrodes are formed thereon. In case the dual gate dielectric layer is used, the source/drain electrodes can be disposed under the organic semiconductor layer to realize a bottom contact structure.
摘要翻译：本发明提供可在低电压下操作的有机薄膜晶体管（OTFT）。 OTFT具有超薄金属氧化物的栅介质层或金属氧化物和有机电介质的双栅介电层。通过在低于100℃的温度下在O 2等离子体工艺中直接氧化金属栅电极，将金属氧化物层自生长至低于10nm的厚度。栅电极以图案沉积在塑料或玻璃基板上。在栅极电介质层上沉积有机半导体层，在其上形成源极/漏极。在使用双栅极电介质层的情况下，源极/漏极可以设置在有机半导体层下面以实现底部接触结构。

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