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    • 1. 发明申请
    • Array panel for liquid crystal display device and method of manufacturing the same
    • 液晶显示装置用阵列面板及其制造方法
    • US20050134757A1
    • 2005-06-23
    • US11050792
    • 2005-02-07
    • Yong KimDong-Jin Park
    • Yong KimDong-Jin Park
    • G02F1/1335G02F1/1333G02F1/1362G02F1/1368G02F1/136
    • G02F1/1368G02F2001/136218G02F2001/136236G02F2001/136263
    • An array panel for a liquid crystal display device includes a substrate, a gate line and a gate electrode on the substrate, wherein the gate line is connected to the gate electrode, a gate insulating layer on the gate line and the gate electrode, an active layer on the gate insulating layer, an ohmic contact layer on the active layer, a data line, a source electrode, and a drain electrode on the ohmic contact layer, wherein the data line, the source electrode, and the drain electrode are formed of molybdenum, a passivation layer on the data line, the source and drain electrodes, and a pixel electrode on the passivation layer, wherein the ohmic contact layer has the same shape as the data line, the source, and drain electrodes, and the active layer has the same shape as the data line, and the source electrode, and the drain electrode except for a channel area between the source electrode and the drain electrode, and the channel area has a “U” shape.
    • 用于液晶显示装置的阵列面板包括在基板上的基板,栅极线和栅电极,其中栅极线连接到栅电极,栅极线上的栅极绝缘层和栅电极, 栅极绝缘层上的层,有源层上的欧姆接触层,欧姆接触层上的数据线,源电极和漏电极,其中数据线,源电极和漏电极由 钼,数据线上的钝化层,源极和漏极以及钝化层上的像素电极,其中欧姆接触层具有与数据线,源极和漏极以及有源层相同的形状 具有与数据线相同的形状,源电极和漏电极除了源电极和漏电极之间的沟道区域之外,沟道区域具有“U”形状。
    • 4. 发明授权
    • Secure boot method and semiconductor memory system using the method
    • 使用该方法的安全引导方法和半导体存储器系统
    • US08443203B2
    • 2013-05-14
    • US12145102
    • 2008-06-24
    • Dong-Jin ParkHyo-Sun HwangMyung-Hee KangWon-Il Lee
    • Dong-Jin ParkHyo-Sun HwangMyung-Hee KangWon-Il Lee
    • G06F21/00
    • G06F21/575
    • A semiconductor memory system includes an external memory, an internal memory, and a one-time programmable (OTP) memory. The external memory includes a kernel, a public key, first boot information used to authenticate the public key and generate a test secret key, and a second boot loader verifying integrity of the kernel. The internal memory includes a first boot loader that verifies integrity of the second boot loader and generates the test secret key. The OTP memory includes second boot information generated using the public key and a secret key. Since the secure boot method and the semiconductor memory system using the method do not need an additional OTP memory to store a secret key unlike conventional technology, the capacity and recording time of the OTP memory can be reduced to about half compared to the conventional technology.
    • 半导体存储器系统包括外部存储器,内部存储器和一次性可编程(OTP)存储器。 外部存储器包括内核,公共密钥,用于认证公钥并生成测试密钥的第一引导信息,以及验证内核完整性的第二引导加载程序。 内部存储器包括第一引导加载程序,其验证第二引导加载程序的完整性并生成测试密钥。 OTP存储器包括使用公钥和秘密密钥生成的第二引导信息。 由于与常规技术不同,使用该方法的安全引导方法和半导体存储器系统不需要额外的OTP存储器来存储秘密密钥,所以与常规技术相比,OTP存储器的容量和记录时间可以减少到大约一半。