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1. 发明申请

US20100302850A1 Storage device and method for reading the same 有权
标题翻译：存储装置及其读取方法
公开(公告)号：US20100302850A1
公开(公告)日：2010-12-02
申请号：US12662329
申请日：2010-04-12
申请人： Yong June Kim , Heeseok Eun , Han Woong Yoo , Jaehong Kim , Hong Rak Son
发明人： Yong June Kim , Heeseok Eun , Han Woong Yoo , Jaehong Kim , Hong Rak Son
IPC分类号： G11C16/06 , G11C7/10 , G11C16/04
CPC分类号： G11C16/26 , G06F11/1048 , G11C11/5642 , G11C16/0483 , G11C29/00
摘要： The storage device includes a storage unit configured to store data, an error controlling unit configured to correct an error of the data read out from the storage unit according to at least one read level, and a read level controlling unit configured to control the at least one read level when the error is uncorrectable. The read level controlling unit is configured to measure a distribution of memory cells of the storage unit, configured to filter the measured distribution, and configured to reset the at least one read level based on the filtered distribution.
摘要翻译：存储装置包括：被配置为存储数据的存储单元;错误控制单元，被配置为根据至少一个读取级别校正从存储单元读出的数据的错误;以及读取级别控制单元，被配置为至少控制一个读取级别，当错误是不可校正的。读取级别控制单元被配置为测量存储单元的存储器单元的分布，被配置为过滤所测量的分布，并且被配置为基于滤波的分布来重置所述至少一个读取级别。

2. 发明授权

US08422291B2 Storage device and method for reading the same 有权
标题翻译：存储装置及其读取方法
公开(公告)号：US08422291B2
公开(公告)日：2013-04-16
申请号：US12662329
申请日：2010-04-12
申请人： Yong June Kim , Heeseok Eun , Han Woong Yoo , Jaehong Kim , Hong Rak Son
发明人： Yong June Kim , Heeseok Eun , Han Woong Yoo , Jaehong Kim , Hong Rak Son
IPC分类号： G11C16/04
CPC分类号： G11C16/26 , G06F11/1048 , G11C11/5642 , G11C16/0483 , G11C29/00
摘要： The storage device includes a storage unit configured to store data, an error controlling unit configured to correct an error of the data read out from the storage unit according to at least one read level, and a read level controlling unit configured to control the at least one read level when the error is uncorrectable. The read level controlling unit is configured to measure a distribution of memory cells of the storage unit, configured to filter the measured distribution, and configured to reset the at least one read level based on the filtered distribution.
摘要翻译：存储装置包括：被配置为存储数据的存储单元;错误控制单元，被配置为根据至少一个读取级别校正从存储单元读出的数据的错误;以及读取级别控制单元，被配置为至少控制一个读取级别，当错误是不可校正的。读取级别控制单元被配置为测量存储单元的存储器单元的分布，被配置为过滤所测量的分布，并且被配置为基于滤波的分布来重置所述至少一个读取级别。

3. 发明授权

US08503230B2 Access method of non-volatile memory device 有权
标题翻译：非易失性存储器件的访问方法
公开(公告)号：US08503230B2
公开(公告)日：2013-08-06
申请号：US12588532
申请日：2009-10-19
申请人： Han Woong Yoo , KyoungLae Cho , Seung-Hwan Song , Heeseok Eun , Hong Rak Son
发明人： Han Woong Yoo , KyoungLae Cho , Seung-Hwan Song , Heeseok Eun , Hong Rak Son
IPC分类号： G11C11/34 , G11C16/04
CPC分类号： G11C16/3427 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/3418 , G11C16/3454 , G11C16/3459 , G11C2211/5621 , G11C2211/5634
摘要： Disclosed is an access method of a non-volatile memory device which comprises detecting a threshold voltage variation of a first memory cell, the a threshold voltage variation of the first memory cell being capable of physically affecting a second memory cell; and assigning the second memory cell to a selected sub-distribution from among a plurality of sub-distributions according to a distance of the threshold voltage variation of the first memory cell, the plurality of sub-distributions corresponding to a target distribution of the second memory cell.
摘要翻译：公开了一种非易失性存储器件的存取方法，包括检测第一存储单元的阈值电压变化，第一存储单元的阈值电压变化能够物理地影响第二存储器单元; 以及根据所述第一存储器单元的阈值电压变化的距离，从所述多个子分布中将所述第二存储器单元分配给所选择的子分布，所述多个子分布对应于所述第二存储器的目标分布细胞。

4. 发明申请

US20100149868A1 Access method of non-volatile memory device 有权
标题翻译：非易失性存储器件的访问方法
公开(公告)号：US20100149868A1
公开(公告)日：2010-06-17
申请号：US12588532
申请日：2009-10-19
申请人： Han Woong Yoo , KyoungLae Cho , Seung-Hwan Song , Heeseok Eun , Hong Rak Son
发明人： Han Woong Yoo , KyoungLae Cho , Seung-Hwan Song , Heeseok Eun , Hong Rak Son
IPC分类号： G11C16/04
CPC分类号： G11C16/3427 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/3418 , G11C16/3454 , G11C16/3459 , G11C2211/5621 , G11C2211/5634
摘要： Disclosed is an access method of a non-volatile memory device which comprises detecting a threshold voltage variation of a first memory cell, the a threshold voltage variation of the first memory cell being capable of physically affecting a second memory cell; and assigning the second memory cell to a selected sub-distribution from among a plurality of sub-distributions according to a distance of the threshold voltage variation of the first memory cell, the plurality of sub-distributions corresponding to a target distribution of the second memory cell.
摘要翻译：公开了一种非易失性存储器件的存取方法，包括检测第一存储单元的阈值电压变化，第一存储单元的阈值电压变化能够物理地影响第二存储器单元; 以及根据所述第一存储器单元的阈值电压变化的距离，从所述多个子分布中将所述第二存储器单元分配给所选择的子分布，所述多个子分布对应于所述第二存储器的目标分布细胞。

5. 发明申请

US20110249496A1 PROGRAM METHOD OF MULTI-BIT MEMORY DEVICE AND DATA STORAGE SYSTEM USING THE SAME 有权
标题翻译：多位存储器件的程序方法和使用它的数据存储系统
公开(公告)号：US20110249496A1
公开(公告)日：2011-10-13
申请号：US13080809
申请日：2011-04-06
申请人： Hong Rak Son , Han Woong Yoo , Jaehong Kim , Jun Jin Kong
发明人： Hong Rak Son , Han Woong Yoo , Jaehong Kim , Jun Jin Kong
IPC分类号： G11C16/10
CPC分类号： G11C11/5628 , G11C16/3436
摘要： Provided is a program method of a multi-bit memory device with memory cells arranged in rows and columns. The program method includes a programming each memory cell of the first group of memory cells to a state within a first group of states according to a verify voltage level of a first group of verify voltage levels within a first range of levels, and programming each memory cell of the second group of memory cells to a state within a second group of states according to a verify voltage level of a second group of verify voltage levels within a second range of levels. The lowest verify voltage level in the second range of levels is higher than the highest verify voltage level in the first range of levels. A first voltage difference between adjacent verify voltage levels within the first range of levels is different from a second voltage difference between the highest verify voltage level of the second group of verify voltage levels and the lowest verify voltage level of the third group of verify voltage levels.
摘要翻译：提供了具有排列成行和列的存储单元的多位存储器件的编程方法。程序方法包括根据第一级别的第一组验证电压电平的验证电压电平将第一组存储器单元的每个存储器单元编程到第一组状态内的状态，以及编程每个存储器第二组存储器单元的单元根据在第二级别范围内的第二组验证电压电平的验证电压电平而处于第二组状态内的状态。第二级别的最低验证电压电平高于第一级别范围内的最高验证电压电平。在第一级别范围内的相邻验证电压电平之间的第一电压差不同于第二组验证电压电平的最高验证电压电平与第三组验证电压电平的最低验证电压电平之间的第二电压差。

6. 发明授权

US08441862B2 Program method of multi-bit memory device and data storage system using the same 有权
标题翻译：多位存储器件和数据存储系统的程序方法使用相同
公开(公告)号：US08441862B2
公开(公告)日：2013-05-14
申请号：US13080809
申请日：2011-04-06
申请人： Hong Rak Son , Han Woong Yoo , Jaehong Kim , Jun Jin Kong
发明人： Hong Rak Son , Han Woong Yoo , Jaehong Kim , Jun Jin Kong
IPC分类号： G11C16/06
CPC分类号： G11C11/5628 , G11C16/3436
摘要： Provided is a program method of a multi-bit memory device with memory cells arranged in rows and columns. The program method includes a programming each memory cell of the first group of memory cells to a state within a first group of states according to a verify voltage level of a first group of verify voltage levels within a first range of levels, and programming each memory cell of the second group of memory cells to a state within a second group of states according to a verify voltage level of a second group of verify voltage levels within a second range of levels. The lowest verify voltage level in the second range of levels is higher than the highest verify voltage level in the first range of levels. A first voltage difference between adjacent verify voltage levels within the first range of levels is different from a second voltage difference between the highest verify voltage level of the second group of verify voltage levels and the lowest verify voltage level of the third group of verify voltage levels.
摘要翻译：提供了具有排列成行和列的存储单元的多位存储器件的编程方法。程序方法包括根据第一级别的第一组验证电压电平的验证电压电平将第一组存储器单元的每个存储器单元编程到第一组状态内的状态，以及编程每个存储器第二组存储器单元的单元根据在第二级别范围内的第二组验证电压电平的验证电压电平而处于第二组状态内的状态。第二级别的最低验证电压电平高于第一级别范围内的最高验证电压电平。在第一级别范围内的相邻验证电压电平之间的第一电压差不同于第二组验证电压电平的最高验证电压电平与第三组验证电压电平的最低验证电压电平之间的第二电压差。

7. 发明申请

US20100306583A1 Memory Systems and Defective Block Management Methods Related Thereto 有权
标题翻译：与其相关的内存系统和缺陷块管理方法
公开(公告)号：US20100306583A1
公开(公告)日：2010-12-02
申请号：US12784683
申请日：2010-05-21
申请人： Yong-June Kim , Junjin Kong , Jaehong Kim , Han Woong Yoo
发明人： Yong-June Kim , Junjin Kong , Jaehong Kim , Han Woong Yoo
IPC分类号： G06F11/20
CPC分类号： G11C29/82
摘要： Memory systems and related defective block management methods are provided. Methods for managing a defective block in a memory device include allocating a defective block when a memory block satisfies a defective block condition. The allocated defective block is cancelled when the allocated defective block satisfies a defective block cancellation condition.
摘要翻译：提供了存储器系统和相关的有缺陷的块管理方法。用于管理存储器件中的缺陷块的方法包括当存储器块满足缺陷块状态时分配缺陷块。当分配的缺陷块满足缺陷块取消条件时，分配的缺陷块被取消。

8. 发明授权

US08417988B2 Memory systems and defective block management methods related thereto 有权
标题翻译：与其相关的存储器系统和有缺陷的块管理方法
公开(公告)号：US08417988B2
公开(公告)日：2013-04-09
申请号：US12784683
申请日：2010-05-21
申请人： Yong-June Kim , Junjin Kong , Jaehong Kim , Han Woong Yoo
发明人： Yong-June Kim , Junjin Kong , Jaehong Kim , Han Woong Yoo
IPC分类号： G06F11/26 , G06F11/00
CPC分类号： G11C29/82
摘要： Memory systems and related defective block management methods are provided. Methods for managing a defective block in a memory device include allocating a defective block when a memory block satisfies a defective block condition. The allocated defective block is cancelled when the allocated defective block satisfies a defective block cancellation condition.
摘要翻译：提供了存储器系统和相关的有缺陷的块管理方法。用于管理存储器件中的缺陷块的方法包括当存储器块满足缺陷块状态时分配缺陷块。当分配的缺陷块满足缺陷块取消条件时，分配的缺陷块被取消。

9. 发明申请

US20100142281A1 Non-Volatile Memory Device and Program Method Thereof 有权
标题翻译：非易失性存储器件及其程序方法
公开(公告)号：US20100142281A1
公开(公告)日：2010-06-10
申请号：US12575735
申请日：2009-10-08
申请人： Han Woong Yoo , Seung-Hwan Song , Junjin Kong , Heeseok Eun
发明人： Han Woong Yoo , Seung-Hwan Song , Junjin Kong , Heeseok Eun
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C2211/5621
摘要： Disclosed is a program method of a non-volatile memory device which comprises classifying plural memory cells into aggressor cells and victim cells based on program data to be written in the plural memory cells; and programming the aggressor cells by a program manner different from the victim cells.
摘要翻译：本发明公开了一种非易失性存储器件的程序方法，该方法包括：根据要写入多个存储器单元的程序数据，将多个存储单元分为侵略单元和受害单元; 并且通过与受害细胞不同的程序方式对攻击者细胞进行编程。

10. 发明授权

US08331144B2 Non-volatile memory device and program method thereof 有权
标题翻译：非易失性存储器件及其程序方法
公开(公告)号：US08331144B2
公开(公告)日：2012-12-11
申请号：US12575735
申请日：2009-10-08
申请人： Han Woong Yoo , Seung-Hwan Song , Junjin Kong , Heeseok Eun
发明人： Han Woong Yoo , Seung-Hwan Song , Junjin Kong , Heeseok Eun
IPC分类号： G11C11/34
CPC分类号： G11C11/5628 , G11C2211/5621
摘要： Disclosed is a program method of a non-volatile memory device which comprises classifying plural memory cells into aggressor cells and victim cells based on program data to be written in the plural memory cells; and programming the aggressor cells by a program manner different from the victim cells.
摘要翻译：本发明公开了一种非易失性存储器件的程序方法，该方法包括：根据要写入多个存储器单元的程序数据，将多个存储单元分为侵略单元和受害单元; 并且通过与受害细胞不同的程序方式对攻击者细胞进行编程。

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