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    • 5. 发明授权
    • Multi-bit cell memory devices using error correction coding and methods of operating the same
    • 使用纠错编码的多位单元存储器件及其操作方法
    • US08482977B2
    • 2013-07-09
    • US13039004
    • 2011-03-02
    • Yong June KimJaehong KimJunjin KongHong Rak Son
    • Yong June KimJaehong KimJunjin KongHong Rak Son
    • G11C16/04
    • G11C16/04
    • A memory device includes a plurality of multi-bit memory cells. A plurality of input data bits are encoded according to an error correction code to generate a codeword including a plurality of groups of bits. Respective ones of the plurality of multi-bit memory cells are programmed to represent respective ones of the groups of bits of the codeword. The groups of bits of the codeword may be groups of consecutive bits. In some embodiments, the multi-bit memory cells are each configured to store in bits and a length of the codeword is an integer multiple of m. Data may be read from the multi-bit memory cells in page units or cell units to recover the codeword, and the recovered code word may be decode according to the error correction code to recover the input data bits.
    • 存储器件包括多个多位存储器单元。 根据纠错码对多个输入数据位进行编码,以产生包括多个位组的码字。 多个多位存储器单元中的相应的多位存储器单元被编程为表示码字的位组中的相应的一组。 码字的比特组可以是连续比特的组。 在一些实施例中,多位存储器单元被配置为以比特存储,并且码字的长度是m的整数倍。 可以从页单元或单元单元中的多位存储单元读取数据以恢复码字,并且可以根据纠错码对恢复的码字进行解码以恢复输入数据位。
    • 9. 发明申请
    • MULTI-BIT CELL MEMORY DEVICES USING ERROR CORRECTION CODING AND METHODS OF OPERATING THE SAME
    • 使用错误校正编码的多位单元存储器件及其操作方法
    • US20110216588A1
    • 2011-09-08
    • US13039004
    • 2011-03-02
    • Yong June KimJaehong KimJunjin KongHong Rak Son
    • Yong June KimJaehong KimJunjin KongHong Rak Son
    • G11C16/04
    • G11C16/04
    • A memory device includes a plurality of multi-bit memory cells. A plurality of input data bits are encoded according to an error correction code to generate a codeword including a plurality of groups of bits. Respective ones of the plurality of multi-bit memory cells are programmed to represent respective ones of the groups of bits of the codeword. The groups of bits of the codeword may be groups of consecutive bits. In some embodiments, the multi-bit memory cells are each configured to store in bits and a length of the codeword is an integer multiple of m. Data may be read from the multi-bit memory cells in page units or cell units to recover the codeword, and the recovered code word may be decode according to the error correction code to recover the input data bits.
    • 存储器件包括多个多位存储器单元。 根据纠错码对多个输入数据位进行编码,以产生包括多个位组的码字。 多个多位存储器单元中的相应的多位存储器单元被编程为表示码字的位组中的相应的一组。 码字的比特组可以是连续比特的组。 在一些实施例中,多位存储器单元被配置为以比特存储,并且码字的长度是m的整数倍。 可以从页单元或单元单元中的多位存储单元读取数据以恢复码字,并且可以根据纠错码对恢复的码字进行解码以恢复输入数据位。