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1. 外观设计

USD651826S1 Stand 有权
公开(公告)号：USD651826S1
公开(公告)日：2012-01-10
申请号：US29399449
申请日：2011-08-15
申请人： Yi-Chen Tseng , Chia-Cheng Chen
设计人： Yi-Chen Tseng , Chia-Cheng Chen

2. 发明申请

US20130048811A1 A MOUNTING KIT 审中-公开
标题翻译：安装套件
公开(公告)号：US20130048811A1
公开(公告)日：2013-02-28
申请号：US13221372
申请日：2011-08-30
申请人： Yi-Chen TSENG , Chia-Cheng Chen
发明人： Yi-Chen TSENG , Chia-Cheng Chen
IPC分类号： F16M13/02 , F16M13/00
CPC分类号： F16M13/02 , F16M11/10 , F16M11/2014
摘要： The present invention is related to a mounting kit comprising a mother base, a son base and a connection unit. The mother base is disposed to a fixed object with a storage space to move up/down and/or turning left/right and fastened to a position of the fixed object. The son base is correspondingly connected to the storage space which permits the user to choose to move inward or outward and fastened to a position. The connection unit is correspondingly connected to the son base which to make up/down and or facing downward/upward adjustment and fastened to a position. Its front can be disassembled for fastening to the back of the display device or the back of the supporting object. Hence, the invention can steadfastly fasten different brands and different measurements of display devices to a fixed object (or its supporting rod), and adjust the best viewing angle for the user.
摘要翻译：本发明涉及一种包括母基座，儿基座和连接单元的安装套件。母基座设置在具有存储空间的固定物体上，上下移动和/或向左/右转动并固定到固定物体的位置。儿子底座相应地连接到存储空间，其允许用户选择向内或向外移动并且紧固到一个位置。连接单元相应地连接到子底座，以构成/向下或面向下/向上调节并紧固到一个位置。其前部可拆卸，用于紧固到显示装置背面或支撑物体的背面。因此，本发明可以将固定物体（或其支撑杆）的不同品牌和不同的显示装置的测量结果牢固地固定在一起，并为用户调整最佳视角。

3. 发明授权

US08569894B2 Semiconductor package with single sided substrate design and manufacturing methods thereof 有权
标题翻译：具有单面基板的半导体封装及其制造方法
公开(公告)号：US08569894B2
公开(公告)日：2013-10-29
申请号：US13006340
申请日：2011-01-13
申请人： Yuan-Chang Su , Shih-Fu Huang , Chia-Cheng Chen , Tzu-Hui Chen , Kuang-Hsiung Chen , Pao-Ming Hsieh , Ming Chiang Lee , Bernd Karl Appelt
发明人： Yuan-Chang Su , Shih-Fu Huang , Chia-Cheng Chen , Tzu-Hui Chen , Kuang-Hsiung Chen , Pao-Ming Hsieh , Ming Chiang Lee , Bernd Karl Appelt
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/14 , H01L21/4857 , H01L21/563 , H01L21/6835 , H01L23/28 , H01L23/296 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49838 , H01L23/5226 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2224/02371 , H01L2224/0401 , H01L2224/13099 , H01L2224/1403 , H01L2224/16225 , H01L2224/16235 , H01L2224/16237 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48237 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/83101 , H01L2224/83385 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/078 , H01L2924/12042 , H01L2924/14 , H01L2924/15183 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , Y10T29/49155 , H01L2924/0665 , H01L2924/00012 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor package includes a substrate unit, a die electrically connected to first contact pads, and a package body covering a first patterned conductive layer and the die. The substrate unit includes: (1) the first patterned conductive layer; (2) a first dielectric layer exposing a part of the first patterned conductive layer to form the first contact pads; (3) a second patterned conductive layer; (4) a second dielectric layer defining openings extending from the first patterned conductive layer to the second patterned conductive layer, where the second patterned conductive layer includes second contact pads exposed by the second dielectric layer; and (5) conductive posts extending from the first patterned conductive layer to the second contact pads through the openings, each of the conductive posts filling a corresponding one of the openings. At least one of the conductive posts defines a cavity.
摘要翻译：半导体封装包括基板单元，与第一接触焊盘电连接的管芯，以及覆盖第一图案化导电层和管芯的封装体。基板单元包括：（1）第一图案化导电层; （2）暴露第一图案化导电层的一部分以形成第一接触焊盘的第一电介质层; （3）第二图案化导电层; （4）限定从第一图案化导电层延伸到第二图案化导电层的开口的第二介电层，其中第二图案化导电层包括由第二介电层暴露的第二接触焊盘; 和（5）通过开口从第一图案化导电层延伸到第二接触垫的导电柱，每个导电柱填充相应的一个开口。导电柱中的至少一个限定了空腔。

4. 发明授权

US08345504B2 Data-aware dynamic supply random access memory 有权
标题翻译：数据感知动态供应随机存取存储器
公开(公告)号：US08345504B2
公开(公告)日：2013-01-01
申请号：US13009240
申请日：2011-01-19
申请人： Ching-Te Chuang , Hao-I Yang , Yi-Wei Lin , Wei Hwang , Wei-Chiang Shih , Chia-Cheng Chen
发明人： Ching-Te Chuang , Hao-I Yang , Yi-Wei Lin , Wei Hwang , Wei-Chiang Shih , Chia-Cheng Chen
IPC分类号： G11C11/40
CPC分类号： G11C11/413 , G11C11/412
摘要： A Random Access Memory (RAM) with a plurality of cells is provided. In an embodiment, the cells of a same column are coupled to a same pair of bit-lines and are associated to a same power controller. Each cell has two inverters; the power controller has two power-switches. For the cells of the same column, the two power-switches respectively perform independent supply voltage controls for the two inverters in each cell according to data-in voltages of the bit-lines during Write operation.
摘要翻译：提供具有多个单元的随机存取存储器（RAM）。在一个实施例中，同一列的单元耦合到同一对位线并且与相同的功率控制器相关联。每个电池有两个逆变器; 电源控制器有两个电源开关。对于同一列的单元，两个电源开关根据写操作期间位线的数据输入电压分别对每个单元中的两个反相器执行独立的电源电压控制。

5. 发明授权

US08001684B2 Method for manufacturing flexible printed circuit boards 有权
标题翻译：柔性印刷电路板的制造方法
公开(公告)号：US08001684B2
公开(公告)日：2011-08-23
申请号：US11959194
申请日：2007-12-18
申请人： Chia-Cheng Chen , Chao-Ching Wang , Chiang-Hua Huang , Cheng-Hsien Lin
发明人： Chia-Cheng Chen , Chao-Ching Wang , Chiang-Hua Huang , Cheng-Hsien Lin
IPC分类号： H05K3/02
CPC分类号： H05K3/281 , H05K1/0269 , H05K1/0393 , H05K3/027 , H05K2201/0355 , H05K2201/09063 , H05K2201/09918 , H05K2203/063 , H05K2203/1545 , H05K2203/166 , Y10T29/49117 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： An exemplary method for manufacturing flexible printed circuit board is provided. A metal foil is supplied from a first feeding roller. The metal foil has a first surface and a second surface on two opposite sides of the metal foil. A first coverlay having a number of first openings defined therein is supplied from a second feeding roller and laminated on the first surface of the metal foil. Electrical traces are formed with the metal foil. A second coverlay having a number of second openings defined therein is supplied from a third feeding roller and laminated on the second surface of the metal foil. Each of the second openings registers with the respective first opening so that the electrical traces are exposed from the corresponding first and second openings. The method can improve quality and efficiency of manufacturing flexible printed circuit boards in a hollowed out form.
摘要翻译：提供了制造柔性印刷电路板的示例性方法。从第一供给辊供给金属箔。金属箔在金属箔的两个相对侧上具有第一表面和第二表面。具有限定在其中的多个第一开口的第一覆盖层从第二馈送辊供应并层压在金属箔的第一表面上。用金属箔形成电迹线。具有限定在其中的多个第二开口的第二覆盖物从第三进料辊供应并层压在金属箔的第二表面上。每个第二开口与相应的第一开口对准，使得电迹线从相应的第一和第二开口露出。该方法可以提高以空心形式制造柔性印刷电路板的质量和效率。

6. 发明申请

US20100289132A1 SUBSTRATE HAVING EMBEDDED SINGLE PATTERNED METAL LAYER, AND PACKAGE APPLIED WITH THE SAME, AND METHODS OF MANUFACTURING OF THE SUBSTRATE AND PACKAGE 审中-公开
标题翻译：具有嵌入式单一图案金属层的衬底及其应用的封装以及衬底和封装的制造方法
公开(公告)号：US20100289132A1
公开(公告)日：2010-11-18
申请号：US12716873
申请日：2010-03-03
申请人： Shih-Fu Huang , Yuan-Chang Su , Chia-Cheng Chen , Chia-Ching Chen
发明人： Shih-Fu Huang , Yuan-Chang Su , Chia-Cheng Chen , Chia-Ching Chen
IPC分类号： H01L23/48 , H05K1/03 , H05K3/10
CPC分类号： H05K3/20 , H01L21/4846 , H01L21/6835 , H01L23/49811 , H01L24/29 , H01L24/32 , H01L24/48 , H01L2221/68345 , H01L2224/29111 , H01L2224/2919 , H01L2224/32188 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/73265 , H01L2224/85411 , H01L2224/85439 , H01L2224/85444 , H01L2224/85455 , H01L2224/85464 , H01L2924/00014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/14 , H01L2924/181 , H05K3/007 , H05K3/28 , H05K2203/0152 , H05K2203/1536 , H05K2203/1563 , Y10T29/49155 , H01L2924/0665 , H01L2924/00 , H01L2224/45099 , H01L2924/00012
摘要： A substrate having single patterned metal layer applied in a package is provided. The substrate includes a first patterned dielectric layer, a patterned metal layer and a second patterned dielectric layer, wherein the patterned metal layer is embedded in the first patterned dielectric layer. Also, the top surfaces of the patterned metal layer and the first patterned dielectric layer lie in the same plane. At least part of the patterned metal layer are exposed from the holes formed on the lower surface of the first patterned dielectric layer, so as to form plural first contact pads for electrical connection downwardly. The second patterned dielectric layer, formed above the patterned metal layer and the first patterned dielectric layer, at least exposes part of the patterned metal layer to form plural second contact pads at the top surface of the patterned metal layer for electrical connection upwardly.
摘要翻译：提供了一种施加在封装中的具有单一图案化金属层的衬底。衬底包括第一图案化电介质层，图案化金属层和第二图案化电介质层，其中图案化金属层嵌入第一图案化电介质层中。此外，图案化金属层和第一图案化电介质层的顶表面位于相同的平面中。图案化金属层的至少一部分从形成在第一图案化电介质层的下表面上的孔露出，从而形成用于向下电连接的多个第一接触焊盘。形成在图案化金属层和第一图案化电介质层之上的第二图案化电介质层至少暴露图案化金属层的一部分以在图案化金属层的顶表面处形成多个第二接触焊盘，用于向上电连接。

7. 发明授权

US07799603B2 Method for mounting electronic component on printed circuit board 有权
标题翻译：将电子元件安装在印刷电路板上的方法
公开(公告)号：US07799603B2
公开(公告)日：2010-09-21
申请号：US12466361
申请日：2009-05-14
申请人： Chung-Jen Tsai , Chia-Cheng Chen , Hung-Yi Chang , Tung-Yao Kuo , Cheng-Hsien Lin
发明人： Chung-Jen Tsai , Chia-Cheng Chen , Hung-Yi Chang , Tung-Yao Kuo , Cheng-Hsien Lin
IPC分类号： H01L21/52
CPC分类号： H05K1/0271 , H05K3/0052 , H05K3/303 , H05K3/341 , H05K2201/09127 , H05K2201/09136 , H05K2201/09681 , H05K2201/09781 , H05K2201/10674 , H05K2201/2009
摘要： A method for assembling an electronic component on a printed circuit board includes following steps. Firstly, a printed circuit board substrate including a central main portion and a peripheral unwanted portion is provided. Secondly, electrically conductive patterns and reinforcing patterns are formed on the main portion and the unwanted portion respectively. Thirdly, an electronic component is mounted on the main portion and electrically connected with the electrically conductive patterns. Fifthly, the unwanted portion is removed.
摘要翻译：一种用于在印刷电路板上组装电子部件的方法包括以下步骤。首先，提供包括中央主要部分和外围不想要的部分的印刷电路板基板。其次，分别在主要部分和不想要的部分上形成导电图案和加强图案。第三，电子部件安装在主体部分上并与导电图形电连接。第五，去除不想要的部分。

8. 发明授权

US08399776B2 Substrate having single patterned metal layer, and package applied with the substrate , and methods of manufacturing of the substrate and package 有权
标题翻译：具有单一图案化金属层的基板和应用基板的封装以及基板和封装的制造方法
公开(公告)号：US08399776B2
公开(公告)日：2013-03-19
申请号：US12562950
申请日：2009-09-18
申请人： Bernd Karl Appelt , William T Chen , Calvin Cheung , Shih-Fu Huang , Yuan-Chang Su , Chia-Cheng Chen , Ta-Chun Lee
发明人： Bernd Karl Appelt , William T Chen , Calvin Cheung , Shih-Fu Huang , Yuan-Chang Su , Chia-Cheng Chen , Ta-Chun Lee
IPC分类号： H05K1/09
CPC分类号： H01L23/49827 , H01L21/486 , H01L21/6835 , H01L23/3121 , H01L23/498 , H01L24/12 , H01L24/16 , H01L24/28 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2221/68345 , H01L2224/13099 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/29111 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/484 , H01L2224/48599 , H01L2224/48699 , H01L2224/73265 , H01L2224/83385 , H01L2224/85439 , H01L2224/85444 , H01L2224/85455 , H01L2224/85664 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01059 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/14 , H01L2924/157 , H01L2924/181 , H01L2924/00014 , H01L2924/0665 , H01L2924/00012 , H01L2924/00
摘要： A substrate having single patterned metal layer includes a patterned base having at least a plurality of apertures, the patterned metal layer disposed on the patterned base, and a first surface finish layer. Parts of the lower surface of the patterned metal layer are exposed by the apertures of the patterned base to form a plurality of first contact pads for downward electrical connection externally, and parts of the upper surface of the patterned metal layer function as a plurality of second contact pads for upward electrical connection externally. The first surface finish layer is disposed at least on one or more surfaces of the second contact pads, and the first surface finish layer is wider than the second contact pad beneath. A package applied with the substrate disclosed herein further comprises at least a die conductively connected to the second contact pads of the substrate.
摘要翻译：具有单一图案化金属层的衬底包括具有至少多个孔的图案化基底，设置在图案化基底上的图案化金属层和第一表面光洁度层。图案化金属层的下表面的部分由图案化基底的孔暴露以形成用于向外电连接的多个第一接触焊盘，并且图案化金属层的上表面的一部分用作多个第二接触垫用于向外电连接。第一表面光洁度层设置在第二接触垫的至少一个或多个表面上，并且第一表面光洁度层比下面的第二接触垫宽。施加有本文公开的衬底的封装还包括至少一个导体连接到衬底的第二接触焊盘的管芯。

9. 发明授权

US08367473B2 Substrate having single patterned metal layer exposing patterned dielectric layer, chip package structure including the substrate, and manufacturing methods thereof 有权
标题翻译：具有暴露图案化电介质层的单一图案化金属层的衬底，包括衬底的芯片封装结构及其制造方法
公开(公告)号：US08367473B2
公开(公告)日：2013-02-05
申请号：US12779800
申请日：2010-05-13
申请人： Shih-Fu Huang , Yuan-Chang Su , Chia-Cheng Chen , Ta-Chun Lee , Kuang-Hsiung Chen
发明人： Shih-Fu Huang , Yuan-Chang Su , Chia-Cheng Chen , Ta-Chun Lee , Kuang-Hsiung Chen
IPC分类号： H01L21/768 , H01L21/786
CPC分类号： H01L23/498 , H01L23/3121 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L2224/27013 , H01L2224/29111 , H01L2224/2919 , H01L2224/32225 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/484 , H01L2224/48599 , H01L2224/48611 , H01L2224/48639 , H01L2224/48644 , H01L2224/48655 , H01L2224/48664 , H01L2224/48699 , H01L2224/48711 , H01L2224/48739 , H01L2224/48744 , H01L2224/48755 , H01L2224/48764 , H01L2224/48811 , H01L2224/48839 , H01L2224/48844 , H01L2224/48855 , H01L2224/48864 , H01L2224/73265 , H01L2224/83051 , H01L2224/85411 , H01L2224/85439 , H01L2224/85444 , H01L2224/85455 , H01L2224/85464 , H01L2924/01005 , H01L2924/01013 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/14 , H01L2924/1517 , H01L2924/1579 , H01L2924/181 , H01L2924/00014 , H01L2924/0665 , H01L2924/00 , H01L2924/00012
摘要： A chip package structure includes a substrate, a die, and a package body. The substrate includes a single patterned, electrically conductive layer, and a patterned dielectric layer adjacent to an upper surface of the electrically conductive layer. A part of a lower surface of the electrically conductive layer forms first contact pads for electrical connection externally. The patterned dielectric layer exposes a part of the upper surface of the electrically conductive layer to form second contact pads. The electrically conductive layer exposes the lower surface of the patterned dielectric layer on a lower periphery of the substrate. The die is electrically connected to the second contact pads, the patterned dielectric layer and the die being positioned on the same side of the electrically conductive layer. The package body is disposed adjacent to the upper surface of the electrically conductive layer and covers the patterned dielectric layer and the die.
摘要翻译：芯片封装结构包括基板，管芯和封装体。衬底包括单个图案化的导电层，以及与导电层的上表面相邻的图案化电介质层。导电层的下表面的一部分形成用于外部电连接的第一接触垫。图案化的电介质层暴露导电层的上表面的一部分以形成第二接触焊盘。导电层在图案化介电层的下表面暴露在基底的下周边。模具电连接到第二接触焊盘，图案化的介电层和管芯位于导电层的同一侧。封装体靠近导电层的上表面设置并覆盖图案化的介电层和管芯。

10. 发明授权

US08320164B2 Static random access memory with data controlled power supply 有权
标题翻译：具有数据控制电源的静态随机存取存储器
公开(公告)号：US08320164B2
公开(公告)日：2012-11-27
申请号：US12985289
申请日：2011-01-05
申请人： Ching-Te Chuang , Hao-I Yang , Mao-Chih Hsia , Yung-Wei Lin , Chien-Yu Lu , Ming-Hsien Tu , Wei Hwang , Shyh-Jye Jou , Chia-Cheng Chen , Wei-Chiang Shih
发明人： Ching-Te Chuang , Hao-I Yang , Mao-Chih Hsia , Yung-Wei Lin , Chien-Yu Lu , Ming-Hsien Tu , Wei Hwang , Shyh-Jye Jou , Chia-Cheng Chen , Wei-Chiang Shih
IPC分类号： G11C11/00
CPC分类号： G11C11/419
摘要： A static random access memory with data controlled power supply, which comprises a memory cell circuit and at least one Write-assist circuit, for providing power to the memory cell circuit according to data to be written to the memory cell circuit.
摘要翻译：一种具有数据控制电源的静态随机存取存储器，其包括存储单元电路和至少一个写辅助电路，用于根据要写入存储单元电路的数据向存储单元电路供电。

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