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1. 再颁专利

USRE41426E1 Manufacturing methods of liquid crystal displays 有权
标题翻译：液晶显示器的制造方法
公开(公告)号：USRE41426E1
公开(公告)日：2010-07-13
申请号：US11141675
申请日：2005-05-31
申请人： Woon-Yong Park , Won-Hee Lee
发明人： Woon-Yong Park , Won-Hee Lee
IPC分类号： H01L27/14
CPC分类号： G02F1/13458 , G02F1/13439 , G02F1/136227 , Y10S438/949
摘要： An ITO (indium tin oxide) layer and a negative photoresist are deposited sequentially on the substrate 100 having a gate wire, a storage wire, a data wire and a storage electrode. The negative photoresist is developed through front exposure and the ITO layer is etched to form a pixel electrode. Because the portions of negative photoresist exposed to light remain after development, pixel defects due to particles placed between pixel regions are reduced. Both the rear exposure and the front exposure may be used. In the rear exposure, it is difficult to remain the portions of the ITO layer at the positions corresponding to the contact portion of the drain electrode and the pixel electrode, the storage line, the gate pads and the data pads. Accordingly, the front exposure is then executed by using the first mask having openings thereon. The negative photoresist is developed, and the ITO layer is patterned. After etching the ITO layer, because the portion of the ITO layer outside the display region remains as a whole, the portions of the ITO layers on the gate pads and the data pads remains through front exposure using a positive photoresist.
摘要翻译：在具有栅极线，存储线，数据线和存储电极的基板100上依次沉积ITO（氧化铟锡）层和负性光致抗蚀剂。通过正面曝光显影负性光致抗蚀剂，蚀刻ITO层以形成像素电极。因为暴露于光的负性光致抗蚀剂的部分在显影之后保留，所以像素区域之间的颗粒所引起的像素缺陷减少。可以使用后曝光和前曝光。在后曝光中，难以将ITO层的部分保持在与漏电极和像素电极，存储线，栅极焊盘和数据焊盘的接触部分对应的位置。因此，通过使用其上具有开口的第一掩模来执行前曝光。显影负性光致抗蚀剂，并对ITO层进行图案化。在蚀刻ITO层之后，由于显示区域外部的ITO层的部分保持整体，所以栅极焊盘和数据焊盘上的ITO层的部分通过使用正性光致抗蚀剂的正面曝光而保持。

2. 再颁专利

USRE38901E1 Manufacturing methods of liquid crystal displays 有权
标题翻译：液晶显示器的制造方法
公开(公告)号：USRE38901E1
公开(公告)日：2005-11-29
申请号：US10071647
申请日：2002-02-08
申请人： Woon-Yong Park , Won-Hee Lee
发明人： Woon-Yong Park , Won-Hee Lee
IPC分类号： G02F1/1362 , H01L21/20 , H01L21/84
CPC分类号： G02F1/13458 , G02F1/13439 , G02F1/136227 , Y10S438/949
摘要： An ITO (indium tin oxide) layer and a negative photoresist are deposited sequentially on the substrate 100 having a gate wire, a storage wire, a data wire and a storage electrode. The negative photoresist is developed through front exposure and the ITO layer is etched to form a pixel electrode. Because the portions of negative photoresist exposed to light remain after development, pixel defects due to particles placed between pixel regions are reduced. Both the rear exposure and the front exposure may be used. In the rear exposure, it is difficult to remain the portions of the ITO layer at the positions corresponding to the contact portion of the drain electrode and the pixel electrode, the storage line, the gate pads and the data pads. Accordingly, the front exposure is then executed by using the first mask having openings thereon. The negative photoresist is developed, and the ITO layer is patterned. After etching the ITO layer, bemuse the portion of the ITO layer outside the display region remains as a whole, the portions of the ITO layers on the gate pads and the data pads remains through front exposure using a positive photoresist.
摘要翻译：在具有栅极线，存储线，数据线和存储电极的基板100上依次沉积ITO（氧化铟锡）层和负性光致抗蚀剂。通过正面曝光显影负性光致抗蚀剂，蚀刻ITO层以形成像素电极。因为暴露于光的负性光致抗蚀剂的部分在显影之后保留，所以像素区域之间的颗粒所引起的像素缺陷减少。可以使用后曝光和前曝光。在后曝光中，难以将ITO层的部分保持在与漏电极和像素电极，存储线，栅极焊盘和数据焊盘的接触部分对应的位置。因此，通过使用其上具有开口的第一掩模来执行前曝光。显影负性光致抗蚀剂，并对ITO层进行图案化。在蚀刻ITO层之后，将显示区域外部的ITO层的部分保持整体，栅极焊盘和数据焊盘上的ITO层的部分通过使用正性光致抗蚀剂的正面曝光而保持。

3. 发明授权

US6022753A Manufacturing methods of liquid crystal displays 失效
标题翻译：液晶显示器的制造方法
公开(公告)号：US6022753A
公开(公告)日：2000-02-08
申请号：US105732
申请日：1998-06-26
申请人： Woon-Yong Park , Won-Hee Lee
发明人： Woon-Yong Park , Won-Hee Lee
IPC分类号： G02F1/1362 , H01L21/20 , H01L21/84 , H01L21/00 , H01L21/89
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/13439 , Y10S438/949
摘要： An ITO (indium tin oxide) layer and a negative photoresist are deposited sequentially on the substrate 100 having a gate wire, a storage wire, a data wire and a storage electrode. The negative photoresist is developed through front exposure and the ITO layer is etched to form a pixel electrode. Because the portions of negative photoresist exposed to light remain after development, pixel defects due to particles placed between pixel regions are reduced. Both the rear exposure and the front exposure may be used. In the rear exposure, it is difficult to remain the portions of the ITO layer at the positions corresponding to the contact portion of the drain electrode and the pixel electrode, the storage line, the gate pads and the data pads. Accordingly, the front exposure is then executed by using the first mask having openings thereon. The negative photoresist is developed, and the ITO layer is patterned. After etching the ITO layer, because the portion of the ITO layer outside the display region remains as a whole, the portions of the ITO layers on the gate pads and the data pads remains through front exposure using a positive photoresist.
摘要翻译：在具有栅极线，存储线，数据线和存储电极的基板100上依次沉积ITO（氧化铟锡）层和负性光致抗蚀剂。通过正面曝光显影负性光致抗蚀剂，蚀刻ITO层以形成像素电极。因为暴露于光的负性光致抗蚀剂的部分在显影之后保留，所以由于放置在像素区域之间的颗粒而导致的像素缺陷减少。可以使用后曝光和前曝光。在后曝光中，难以将ITO层的部分保持在与漏电极和像素电极，存储线，栅极焊盘和数据焊盘的接触部分对应的位置。因此，通过使用其上具有开口的第一掩模来执行前曝光。显影负性光致抗蚀剂，并对ITO层进行图案化。在蚀刻ITO层之后，由于显示区域外部的ITO层的部分保持整体，所以栅极焊盘和数据焊盘上的ITO层的部分通过使用正性光致抗蚀剂的正面曝光而保持。

4. 发明授权

US07709304B2 Thin film transistor array panel, manufacturing method thereof, and mask therefor 失效
标题翻译：薄膜晶体管阵列面板及其制造方法及其掩模
公开(公告)号：US07709304B2
公开(公告)日：2010-05-04
申请号：US11824879
申请日：2007-07-02
申请人： Woon-Yong Park , Won-Hee Lee , Il-Gon Kim , Seung-Taek Lim , You-Lee Song , Sahng-Ik Jun
发明人： Woon-Yong Park , Won-Hee Lee , Il-Gon Kim , Seung-Taek Lim , You-Lee Song , Sahng-Ik Jun
IPC分类号： H01L21/00
CPC分类号： G02F1/136227 , G02F2001/136236 , G03F1/00
摘要： A passivation layer is deposited and a photoresist is formed. The photoresist includes first to third portions with decreased thickness, the second portions located on portions of drain electrodes and data lines and the third portions located on portions of gate lines. A mask for forming the photoresist has rectilinear slits with width and distance of about 0.8-2.0 microns on an area corresponding to the second portions. The passivation layer and an underlying semiconductor layer as well as the photoresist are etched to expose portions of the gate insulating layer under the third portions of the photoresist as well as portions of the passivation layer under the second portions of the photoresist. The exposed portions of the passivation layer and the gate insulating layer are removed to expose the drain electrodes, the gate lines and the data lines as well as portions of the semiconductor layer, which are subsequently removed.
摘要翻译：沉积钝化层并形成光致抗蚀剂。光致抗蚀剂包括具有减小的厚度的第一至第三部分，第二部分位于漏电极和数据线的部分上，第三部分位于栅极线的部分上。用于形成光致抗蚀剂的掩模具有在对应于第二部分的区域上具有约0.8-2.0微米的宽度和距离的直线狭缝。蚀刻钝化层和底层半导体层以及光致抗蚀剂以暴露在光致抗蚀剂的第三部分之下的栅绝缘层的部分以及在光致抗蚀剂的第二部分下的钝化层的部分。去除钝化层和栅极绝缘层的暴露部分，以暴露出漏电极，栅极线和数据线以及随后被去除的部分半导体层。

5. 发明申请

US20070259289A1 Thin film transistor array panel, manufacturing method thereof, and mask therefor 失效
标题翻译：薄膜晶体管阵列面板及其制造方法及其掩模
公开(公告)号：US20070259289A1
公开(公告)日：2007-11-08
申请号：US11824879
申请日：2007-07-02
申请人： Woon-Yong Park , Won-Hee Lee , Il-Gon Kim , Seung-Taek Lim , You-Lee Song , Sahng-Ik Jun
发明人： Woon-Yong Park , Won-Hee Lee , Il-Gon Kim , Seung-Taek Lim , You-Lee Song , Sahng-Ik Jun
IPC分类号： G03C5/00
CPC分类号： G02F1/136227 , G02F2001/136236 , G03F1/00
摘要： A passivation layer is deposited and a photoresist is formed. The photoresist includes first to third portions with decreased thickness, the second portions located on portions of drain electrodes and data lines and the third portions located on portions of gate lines. A mask for forming the photoresist has rectilinear slits with width and distance of about 0.8-2.0 microns on an area corresponding to the second portions. The passivation layer and an underlying semiconductor layer as well as the photoresist are etched to expose portions of the gate insulating layer under the third portions of the photoresist as well as portions of the passivation layer under the second portions of the photoresist. The exposed portions of the passivation layer and the gate insulating layer are removed to expose the drain electrodes, the gate lines and the data lines as well as portions of the semiconductor layer, which are subsequently removed.
摘要翻译：沉积钝化层并形成光致抗蚀剂。光致抗蚀剂包括具有减小的厚度的第一至第三部分，第二部分位于漏电极和数据线的部分上，第三部分位于栅极线的部分上。用于形成光致抗蚀剂的掩模具有在对应于第二部分的区域上具有约0.8-2.0微米的宽度和距离的直线狭缝。蚀刻钝化层和底层半导体层以及光致抗蚀剂以暴露在光致抗蚀剂的第三部分之下的栅极绝缘层的部分以及在光致抗蚀剂的第二部分下的钝化层的部分。去除钝化层和栅极绝缘层的暴露部分，以露出漏电极，栅极线和数据线以及随后被去除的部分半导体层。

6. 发明授权

US5684547A Liquid crystal display panel and method for fabricating the same 失效
标题翻译：液晶显示面板及其制造方法
公开(公告)号：US5684547A
公开(公告)日：1997-11-04
申请号：US522158
申请日：1995-08-03
申请人： Woon-Yong Park , Dong-Gyu Kim , Won-Hee Lee
发明人： Woon-Yong Park , Dong-Gyu Kim , Won-Hee Lee
IPC分类号： G02F1/1362 , G02F1/1333
CPC分类号： G02F1/136286 , G02F1/136259
摘要： The present invention is directed to a method for fabricating a liquid crystal display panel in which a repair line is formed of a gate line metal and a data line metal to facilitate the repair process of any broken gate line. Any disconnected data lines can be repaired. Repairing the disconnected data lines involves their short-circuit, using a laser beam, with the repair lines vertically formed underneath the data lines. That is one repair line, which is adjacent to the connection part of the repair lines, and the data lines are short-circuited. Thus, the disconnected data line can be repaired through the repair lines and the auxiliary repair lines with ease, thus providing a simple repair process.
摘要翻译：本发明涉及一种用于制造液晶显示面板的方法，其中修补线由栅极线金属和数据线金属形成，以便于任何断开的栅极线的修复处理。任何断开连接的数据线都可以修复。修复断开连接的数据线涉及使用激光束的短路，其中垂直形成在数据线下方的修复线。这是与维修线的连接部分相邻的一条修理线，数据线短路。因此，可以容易地通过修理线和辅助维修线修复断开的数据线，从而提供简单的修复过程。

7. 再颁专利

USRE43575E1 Liquid crystal display panels having control lines with uniform resistance 有权
标题翻译：具有均匀电阻的控制线的液晶显示面板
公开(公告)号：USRE43575E1
公开(公告)日：2012-08-14
申请号：US10218968
申请日：2002-08-14
申请人： Byoung-Sun Na , Dong-Gyu Kim , Woon-Yong Park
发明人： Byoung-Sun Na , Dong-Gyu Kim , Woon-Yong Park
IPC分类号： G02F1/1345
CPC分类号： G02F1/1345
摘要： A liquid crystal display (LCD) panel includes a substrate, a plurality of parallel control lines on the substrate, and a bonding pad area on the substrate having a plurality of bonding pads therein. A respective one of a plurality of interconnecting conductors connect a respective bonding pad of the bonding pad area to a respective one of the plurality of parallel control lines, each of the plurality of interconnecting conductors having a uniform resistance. According to embodiments of the invention, an interconnecting conductor of the plurality of interconnecting conductors may include a material selected to provide the uniform resistance. The interconnecting conductor may include a first portion including a first material having a first resistivity and a second portion including a second material having a second resistivity different from the first resistivity. The first and second portions may have respective first and second lengths selected to provide the uniform resistance. According to other embodiments, an interconnecting conductor of the plurality of interconnecting conductors may have a width selected to provide the uniform resistance. In one embodiment, the plurality of interconnecting conductors have a resistivity per unit length associated therewith and extend from the bonding pad area in a fanned configuration, with the resistivity of the interconnecting conductors increasing toward a medial portion of the fanned configuration. The width of the interconnecting conductors may decrease towards the medial portion of the fanned configuration to produce the desired resistivity. According to other embodiments, an interconnecting conductor of the plurality of interconnecting conductors has a length selected to provide the uniform resistance. In one embodiment, the interconnecting conductor has a serpentine portion to provide the desired length.
摘要翻译：液晶显示器（LCD）面板包括衬底，在衬底上的多个并行控制线，以及衬底上的焊盘区域，其中具有多个焊盘。多个互连导体中的相应一个将接合焊盘区域的相应接合焊盘连接到多个并联控制线中的相应一个，多个互连导体中的每一个具有均匀的电阻。根据本发明的实施例，多个互连导体的互连导体可以包括被选择以提供均匀电阻的材料。互连导体可以包括包括具有第一电阻率的第一材料的第一部分和包括具有不同于第一电阻率的第二电阻率的第二材料的第二部分。第一和第二部分可以具有相应的第一和第二长度，以提供均匀的电阻。根据其他实施例，多个互连导体的互连导体可以具有被选择为提供均匀电阻的宽度。在一个实施例中，多个互连导体具有与其相关联的每单位长度的电阻率，并且从结合焊盘区域以扇形配置延伸，互连导体的电阻率朝着扇形结构的中间部分增加。互连导体的宽度可以朝着扇形构型的中间部分减小以产生所需的电阻率。根据其他实施例，多个互连导体的互连导体具有选择的长度以提供均匀的电阻。在一个实施例中，互连导体具有蛇形部分以提供期望的长度。

8. 发明授权

US07888677B2 Method for manufacturing a thin film transistor array panel for a liquid crystal display and a photolithography method for fabricating thin films 有权
标题翻译：液晶显示器用薄膜晶体管阵列面板的制造方法及薄膜制造用光刻方法
公开(公告)号：US07888677B2
公开(公告)日：2011-02-15
申请号：US12467967
申请日：2009-05-18
申请人： Woon-Yong Park , Bum-Ki Baek
发明人： Woon-Yong Park , Bum-Ki Baek
IPC分类号： H01L21/00
CPC分类号： H01L27/1288 , G02F1/13458 , G02F1/136204 , G02F1/136227 , G02F2001/136236 , H01L27/1214
摘要： A thin film transistor (TFT) array panel that includes a substrate, a gate wire including a gate pad, a gate insulating layer pattern, a semiconductor layer pattern, an ohmic contact layer pattern, a data wire including a data pad and a drain electrode, and a passivation layer pattern is presented. The passivation layer pattern is formed on the data wire and has contact holes exposing the gate pad, the data pad, and the drain electrode. The passivation layer pattern also has a planar shape that is similar that of the semiconductor layer pattern due to simultaneous etching except for the portions adjoining the drain electrode and the data pad, having a width greater than that of the data wire, and covering a boundary line of the data wire. A pixel electrode is electrically connected to the exposed portion of the drain electrode and contacts the gate insulating layer pattern.
摘要翻译：一种薄膜晶体管（TFT）阵列面板，其包括基板，包括栅极焊盘的栅极线，栅极绝缘层图案，半导体层图案，欧姆接触层图案，包括数据焊盘和漏极的数据线，并且呈现钝化层图案。钝化层图案形成在数据线上，并且具有暴露栅极焊盘，数据焊盘和漏电极的接触孔。钝化层图案还具有与除了与漏极电极和数据焊盘相邻的部分之外的同时蚀刻而与半导体层图案类似的平面形状，其宽度大于数据线的宽度，并且覆盖边界线数据线。像素电极电连接到漏电极的露出部分并接触栅极绝缘层图案。

9. 发明申请

US20100181572A1 THIN FILM TRANSISTOR ARRAY PANEL 有权
标题翻译：薄膜晶体管阵列
公开(公告)号：US20100181572A1
公开(公告)日：2010-07-22
申请号：US12728138
申请日：2010-03-19
申请人： Joo-Hyung LEE , Dong-Gyu Kim , Woon-Yong Park
发明人： Joo-Hyung LEE , Dong-Gyu Kim , Woon-Yong Park
IPC分类号： H01L27/02
CPC分类号： G02F1/136204 , G02F2001/133388
摘要： A data line and an amorphous silicon pattern are formed on a substrate. The first electrode pattern is extended from the data line and overlaps an edge of the amorphous silicon pattern. The second electrode pattern is made of the same metal as the first electrode pattern and overlaps the edge of the amorphous silicon pattern at an opposite side of the first electrode pattern. Edges of the first and the second electrode patterns are sharply formed so that a tunneling effect easily occurs through the amorphous silicon pattern. An indium-tin-oxide pattern for a capacitor is formed at the end of the second electrode pattern. The capacitor is formed between the ITO pattern and a common electrode.
摘要翻译：在基板上形成数据线和非晶硅图案。第一电极图案从数据线延伸并与非晶硅图案的边缘重叠。第二电极图案由与第一电极图案相同的金属制成，并且在第一电极图案的相对侧与非晶硅图案的边缘重叠。尖锐地形成第一和第二电极图案的边缘，使得通过非晶硅图案容易发生隧道效应。在第二电极图案的末端形成用于电容器的铟锡氧化物图案。电容器形成在ITO图案和公共电极之间。

10. 发明授权

US07504290B2 Thin film transistor array panel for a liquid crystal display and a method for manufacturing the same 有权
标题翻译：一种用于液晶显示器的薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07504290B2
公开(公告)日：2009-03-17
申请号：US11750630
申请日：2007-05-18
申请人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
发明人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
IPC分类号： H01L21/84
CPC分类号： G02F1/13458 , G02F1/1362 , G02F1/136227 , G02F2001/136236 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/458 , Y10S438/942 , Y10S438/947 , Y10S438/949
摘要： Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched. After depositing a passivation layer, a opening is formed by using the fourth mask and the exposed semiconductor layer through the opening is etched to separate the semiconductor layer under the adjacent data line.
摘要翻译：制造液晶显示器的简化方法。通过使用第一掩模在基板上形成包括栅极线，栅极焊盘和栅电极的栅极线。依次沉积栅极绝缘层，半导体层，欧姆接触层和金属层以制成四层，并通过使用第二掩模的干蚀刻图案化。此时，四层被图案化以具有网状布局的矩阵并覆盖栅极线。在显示区域形成露出基板的开口，在周边区域形成露出栅极焊盘的接触孔。接下来，沉积ITO并且涂覆在ITO上的光致抗蚀剂层。然后，通过使用第三掩模和干蚀刻对ITO层进行图案化，并且数据导体层和未被ITO层覆盖的欧姆接触层被干蚀刻。在沉积钝化层之后，通过使用第四掩模形成开口，并蚀刻通过开口的暴露的半导体层以将相邻数据线下的半导体层分离。

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