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    • 4. 发明授权
    • Screening method for selecting semiconductor substrates having defects
below a predetermined level in an oxide layer
    • 在氧化物层中选择具有低于预定水平的缺陷的半导体衬底的筛选方法
    • US5786231A
    • 1998-07-28
    • US567679
    • 1995-12-05
    • William L. WarrenKarel J. R. VanheusdenJames R. SchwankDaniel M. FleetwoodMarty R. ShaneyfeltPeter S. WinokurRoderick A. B. Devine
    • William L. WarrenKarel J. R. VanheusdenJames R. SchwankDaniel M. FleetwoodMarty R. ShaneyfeltPeter S. WinokurRoderick A. B. Devine
    • H01L21/66G01R31/26
    • H01L22/14H01L22/20
    • A method for screening or qualifying semiconductor substrates for integrated circuit fabrication. The method comprises the steps of annealing at least one semiconductor substrate at a first temperature in a defect-activating ambient (e.g. hydrogen, forming gas, or ammonia) for sufficient time for activating any defects within on oxide layer of the substrate; measuring a defect-revealing electrical characteristic of at least a portion of the oxide layer for determining a quantity of activated defects therein; and selecting substrates for which the quantity of activated defects is below a predetermined level. The defect-revealing electrical characteristic may be a capacitance-versus-voltage (C-V) characteristic or a current-versus-voltage (I-V) characteristic that is dependent on an electrical charge in the oxide layer generated by the activated defects. Embodiments of the present invention may be applied for screening any type of semiconductor substrate or wafer having an oxide layer formed thereon or therein. This includes silicon-on-insulator substrates formed by a separation by the implantation of oxygen (SIMOX) process or the bond and etch back silicon-on-insulator (BESOI) process, as well as silicon substrates having a thermal oxide layer or a deposited oxide layer.
    • 一种用于集成电路制造的半导体衬底的筛选或限定方法。 该方法包括以下步骤:在缺陷活化环境(例如氢气,形成气体或氨)中的第一温度下退火至少一个半导体衬底足够的时间以激活衬底的氧化物层内的任何缺陷; 测量所述氧化物层的至少一部分的缺陷显露电特性,以确定其中的活化缺陷的量; 以及选择活性缺陷量低于预定水平的衬底。 缺陷显露的电气特性可以是取决于由激活的缺陷产生的氧化物层中的电荷的电容 - 电压(C-V)特性或电流 - 电压(I-V)特性。 本发明的实施例可以应用于筛选其上形成有氧化层的任何类型的半导体衬底或晶片。 这包括通过通过注入氧(SIMOX)工艺分离的绝缘体上硅衬底或绝缘体上的绝缘体(BESOI)工艺的接合和回蚀,以及具有热氧化物层或沉积 氧化层。
    • 5. 发明授权
    • Apparatus for sensing patterns of electrical field variations across a surface
    • 用于感测跨越表面的电场变化图案的装置
    • US06304666B1
    • 2001-10-16
    • US09167772
    • 1998-10-07
    • William L. WarrenRoderick A. B. Devine
    • William L. WarrenRoderick A. B. Devine
    • G06K928
    • G06F3/041G01R29/24G06K9/0002G11C16/0466
    • An array of nonvolatile field effect transistors used to sense electric potential variations. The transistors owe their nonvolatility to the movement of protons within the oxide layer that occurs only in response to an externally applied electric potential between the gate on one side of the oxide and the source/drain on the other side. The position of the protons within the oxide layer either creates or destroys a conducting channel in the adjacent source/channel/drain layer below it, the current in the channel being measured as the state of the nonvolatile memory. The protons can also be moved by potentials created by other instrumentalities, such as charges on fingerprints or styluses above the gates, pressure on a piezoelectric layer above the gates, light shining upon a photoconductive layer above the gates. The invention allows sensing of fingerprints, handwriting, and optical images, which are converted into digitized images thereof in a nonvolatile format.
    • 用于检测电位变化的非易失性场效应晶体管阵列。 晶体管对于氧化物层内的质子的运动具有非易失性,仅在氧化物一侧的栅极与另一侧的源极/漏极之间产生外部施加的电位而发生。 质子在氧化物层内的位置在其下面的相邻源极/沟道/漏极层中产生或破坏导电沟道,通道中的电流被测量为非易失性存储器的状态。 质子也可以由其他工具产生的电位移动,例如栅极上方的指纹或触针上的电荷,栅极上方的压电层上的压力,照射在栅极上方的光电导层上的光。 本发明允许感测以非易失性格式转换成数字化图像的指纹,手写和光学图像。