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1. 发明授权

US07288171B2 Method for using field emitter arrays in chemical and biological hazard mitigation and remediation 失效
标题翻译：在化学和生物危害减轻和补救中使用场发射器阵列的方法
公开(公告)号：US07288171B2
公开(公告)日：2007-10-30
申请号：US10051970
申请日：2002-01-18
申请人： Bruce E. Gnade , Robert M. Wallace
发明人： Bruce E. Gnade , Robert M. Wallace
IPC分类号： B01J19/08
CPC分类号： A61L9/22 , A61L2/08 , A61L2/14 , A61L9/18 , B01J19/085 , B01J19/087 , B01J2219/0803 , B01J2219/0875 , B01J2219/0877 , G01N27/68 , G01N33/0011
摘要： A method is provided, the method comprising operating a field emitter array (FEA) to generate at least one of a high electric field and a high electron flux, and exposing the field emitter array (FEA) to at least one gas. The method further comprises generating at least one radical species from the at least one gas exposed to the at least one of the high electric field and the high electron flux.
摘要翻译：提供了一种方法，所述方法包括操作场致发射阵列（FEA）以产生高电场和高电子通量中的至少一种，并将场致发射阵列（FEA）暴露于至少一种气体。该方法还包括从暴露于高电场和高电子通量中的至少一个的至少一种气体产生至少一种自由基物质。

2. 发明授权

US06730977B2 Lower temperature method for forming high quality silicon-nitrogen dielectrics 有权
标题翻译：用于形成高质量硅 - 氮电介质的较低温度方法
公开(公告)号：US06730977B2
公开(公告)日：2004-05-04
申请号：US10452999
申请日：2003-06-03
申请人： Glen D. Wilk , John Mark Anthony , Yi Wei , Robert M. Wallace
发明人： Glen D. Wilk , John Mark Anthony , Yi Wei , Robert M. Wallace
IPC分类号： H01L2976
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/3185 , H01L29/511 , H01L29/513 , H01L29/518
摘要： A method for forming a thermal silicon nitride on a semiconductor substrate is disclosed. This method allows formation of thermal silicon nitride that is thick enough for a FET gate dielectric, but has a low thermal budget.
摘要翻译：公开了一种在半导体衬底上形成热氮化硅的方法。该方法允许形成足够厚的用于FET栅极电介质但具有低热量预算的热氮化硅。

3. 发明授权

US06335238B1 Integrated dielectric and method 失效
标题翻译：集成电介质和方法
公开(公告)号：US06335238B1
公开(公告)日：2002-01-01
申请号：US09073087
申请日：1998-05-05
申请人： Sunil V. Hanttangady , Robert M. Wallace , Bruce E. Gnade , Yasutoshi Okuno
发明人： Sunil V. Hanttangady , Robert M. Wallace , Bruce E. Gnade , Yasutoshi Okuno
IPC分类号： H01L218242
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28211 , H01L27/10873 , H01L28/55 , H01L29/513 , H01L29/517 , Y10S438/931
摘要： This invention pertains generally to the integration of dielectrics with integrated circuits, and more particularly to reaction barriers between high-k dielectrics and an underlying Group IV semiconductor layer. Applications for high permittivity memory cells and gate dielectrics are disclosed. This method has steps of providing a partially completed integrated circuit having a semiconductor layer substantially comprising silicon, where the layer has an exposed face. The method also includes forming an ultra-thin SiC reaction barrier at the exposed face, and depositing a high permittivity storage dielectric on the SiC reaction barrier. Typically, the SiC reaction barrier is less then 25 Å thick, preferably one or two monolayers of SiC.
摘要翻译：本发明一般涉及电介质与集成电路的集成，更具体地涉及高k电介质和下伏IV族半导体层之间的反应势垒。公开了用于高介电常数存储单元和栅极电介质的应用。该方法具有提供具有基本上包含硅的半导体层的部分完成的集成电路的步骤，其中该层具有暴露的面。该方法还包括在暴露面上形成超薄SiC反应势垒，并在SiC反应势垒上沉积高介电常数存储电介质。通常，SiC反应势垒小于25埃，优选一个或两个单层的SiC。

4. 发明授权

US06258637B1 Method for thin film deposition on single-crystal semiconductor substrates 失效
标题翻译：在单晶半导体衬底上薄膜沉积的方法
公开(公告)号：US06258637B1
公开(公告)日：2001-07-10
申请号：US09452922
申请日：1999-12-02
申请人： Glen D. Wilk , Yi Wei , Robert M. Wallace
发明人： Glen D. Wilk , Yi Wei , Robert M. Wallace
IPC分类号： H01L2100
CPC分类号： H01L21/02043 , H01L21/02046 , H01L21/02238 , H01L21/02255 , H01L21/02301 , H01L21/02312 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/31662 , Y10S438/974
摘要： A method of preparing a surface for and forming a thin film on a single-crystal silicon substrate is disclosed. One embodiment of his method comprises forming an oxidized silicon layer (which may be a native oxide) on at least one region of the substrate, and thermally annealing the substrate in a vacuum while supplying a silicon-containing flux to the oxide surface, thus removing the oxidized silicon layer. Preferably, the thin film is formed immediately after removal of the oxidized silicon layer. The silicon-containing flux is preferably insufficient to deposit a silicon-containing layer on top of the oxidized silicon layer, and yet sufficient to substantially inhibit an SiO-forming reaction between the silicon substrate and the oxidized silicon layer. The method of the invention allows for growth or deposition of films which have exceptionally smooth interfaces (less than 0.1 nm rms roughness) with the underlying silicon substrate at temperatures less than 800° C., and is ideally suited for deposition of ultrathin films having thicknesses less than about 5 nm.
摘要翻译：公开了一种制备在单晶硅衬底上形成薄膜的表面的方法。他的方法的一个实施方案包括在衬底的至少一个区域上形成氧化硅层（其可以是天然氧化物），并且在真空中对衬底进行热退火，同时向氧化物表面提供含硅助焊剂，从而除去氧化硅层。优选地，在去除氧化硅层之后立即形成薄膜。含硅助焊剂优选不足以在氧化硅层的顶部上沉积含硅层，并且还足以基本上抑制硅衬底和氧化硅层之间的形成SiO的反应。本发明的方法允许在低于800℃的温度下与底层硅衬底具有非常平滑的界面（小于0.1nm均方根粗糙度）的生长或沉积，并且理想地适用于沉积具有厚度的超薄膜小于约5nm。

5. 发明授权

US6020243A Zirconium and/or hafnium silicon-oxynitride gate dielectric 失效
标题翻译：锆和/或铪硅 - 氧氮化物栅极电介质
公开(公告)号：US6020243A
公开(公告)日：2000-02-01
申请号：US115859
申请日：1998-07-15
申请人： Robert M. Wallace , Richard A. Stoltz , Glen D. Wilk
发明人： Robert M. Wallace , Richard A. Stoltz , Glen D. Wilk
IPC分类号： H01L21/28 , H01L21/314 , H01L21/316 , H01L29/51 , H01L21/283 , H01L21/31 , H01L21/441 , H01L21/469
CPC分类号： H01L21/31691 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/28229 , H01L29/513 , H01L29/517 , H01L29/518 , H01L21/3143 , H01L21/31612 , H01L21/31641 , H01L21/31645
摘要： A field effect semiconductor device comprising a high permittivity zirconium (or hafnium) silicon-oxynitride gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A zirconium silicon-oxynitride gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Zirconium silicon-oxynitride gate dielectric layer 36 has a dielectric constant is significantly higher than the dielectric constant of silicon dioxide. However, the zirconium silicon-oxynitride gate dielectric may also be designed to have the advantages of silicon dioxide, e.g. high breakdown, low interface state density, and high stability.
摘要翻译：本文公开了包括高介电常数锆（或铪）硅 - 氧氮化物栅极电介质的场效应半导体器件及其形成方法。该器件包括其中形成有半导体沟道区24的硅衬底20。在该衬底上形成锆硅氧烷栅极电介质层36，然后形成导电栅极38.具有介电常数的氧化硅 - 氧氮化硅栅极电介质层36显着高于二氧化硅的介电常数。然而，锆硅氧烷栅极电介质也可以被设计为具有二氧化硅的优点，例如，高击穿，低界面状态密度和高稳定性。

6. 发明授权

US5689151A Anode plate for flat panel display having integrated getter 失效
标题翻译：具有集成吸气剂的平板显示器的阳极板
公开(公告)号：US5689151A
公开(公告)日：1997-11-18
申请号：US535506
申请日：1995-09-28
申请人： Robert M. Wallace , John M. Anthony , Bruce E. Gnade , Chih-Chen Cho
发明人： Robert M. Wallace , John M. Anthony , Bruce E. Gnade , Chih-Chen Cho
IPC分类号： H01J7/18 , H01J29/08 , H01J29/94 , H01J17/24
CPC分类号： H01J29/94 , H01J29/085 , H01J7/18 , H01J2201/30403 , H01J2329/00
摘要： An anode plate (10) for use in a field emission flat panel display device (8) comprises a transparent substrate (26) having a plurality of spaced-apart, electrically conductive regions (28) which form the anode electrode of the display device (8). The conductive regions (28) are covered by a luminescent material (24). A getter material (29) is deposited on the substrate (26) and between the conductive regions (28) of the anode plate (10). The getter material (29) is preferably an electrically nonconductive, high porosity, and low density material, such as an aerogel or xerogel. Methods of fabricating the getter material (29) on the anode plate (10) are disclosed.
摘要翻译：一种用于场致发射平板显示装置（8）的阳极板（10）包括具有形成显示装置的阳极电极的多个间隔开的导电区域（28）的透明基板（26） 8）。导电区域（28）被发光材料（24）覆盖。吸气材料（29）沉积在衬底（26）上并在阳极板（10）的导电区域（28）之间。吸气材料（29）优选是不导电，高孔隙率和低密度材料，例如气凝胶或干凝胶。公开了在阳极板（10）上制造吸气材料（29）的方法。

7. 发明授权

US5614785A Anode plate for flat panel display having silicon getter 失效
标题翻译：具有硅吸气剂的平板显示器的阳极板
公开(公告)号：US5614785A
公开(公告)日：1997-03-25
申请号：US535863
申请日：1995-09-28
申请人： Robert M. Wallace , Bruce E. Gnade , Wiley P. Kirk
发明人： Robert M. Wallace , Bruce E. Gnade , Wiley P. Kirk
IPC分类号： H01J29/08 , H01J29/94 , H01J1/72 , H01J9/38
CPC分类号： H01J29/085 , H01J29/94 , H01J2329/00
摘要： An anode plate (10) for use in a field emission flat panel display device (8) includes a transparent substrate (26) having a plurality of spaced-apart, electrically conductive regions (28) are covered by a luminescent material (24) and from the anode electrode. A getter material (29) of porous silicon is deposited on the substrate (26) between the conductive regions (28) of the anode plate (10). The getter material (29) of porous silicon is preferably electrically nonconductive, opaque, and highly porous. Included are methods of fabricating the getter material (29) on the anode plate (10).
摘要翻译：一种用于场致发射平板显示装置（8）的阳极板（10）包括具有多个间隔开的导电区域（28）的透明基板（26）被发光材料（24）覆盖，并且从阳极电极。在阳极板（10）的导电区域（28）之间的衬底（26）上沉积多孔硅的吸气材料（29）。多孔硅的吸气材料（29）优选是不导电的，不透明的，并且是高度多孔的。包括在阳极板（10）上制造吸气材料（29）的方法。

8. 发明授权

US5520563A Method of making a field emission device anode plate having an integrated getter 失效
标题翻译：制造具有集成吸气剂的场致发射器件阳极板的方法
公开(公告)号：US5520563A
公开(公告)日：1996-05-28
申请号：US474429
申请日：1995-06-07
申请人： Robert M. Wallace , Bruce E. Gnade , Chi-Cheong Shen , Jules D. Levine , Robert H. Taylor
发明人： Robert M. Wallace , Bruce E. Gnade , Chi-Cheong Shen , Jules D. Levine , Robert H. Taylor
IPC分类号： H01J9/14 , H01J9/39 , H01J29/08 , H01J29/32 , H01J29/94 , H01J31/12 , H01J9/227
CPC分类号： H01J29/94 , H01J29/085 , H01J2329/00
摘要： An anode plate 40 for use in a field emission flat panel display device comprises a transparent planar substrate 42 having a plurality of electrically conductive, parallel stripes 46 comprising the anode electrode of the device, which are covered by phosphors 48.sub.R, 48.sub.G and 48.sub.B, and a gettering material 52 in the interstices of the stripes 46. The gettering material 52 is preferably selected from among zirconium-vanadium-iron and barium. The getter 52 may be thermally reactivated by passing a current through it at selected times, or by electron bombardment from microtips on the emitter substrate. The getter 52 may be formed on a substantially opaque, electrically insulating material 50 affixed to substrate 42 in the spaces formed between conductors 46, which acts as a barrier to the passage of ambient light into and out of the device. Methods of fabricating the getter stripes 52 on the anode plate 40 are disclosed.
摘要翻译：用于场致发射平板显示装置的阳极板40包括透明平面基板42，该透明平面基板42具有由荧光体48R，48G和48B覆盖的多个导电平行条带46，其包括该装置的阳极电极，以及吸收材料52优选地选自锆 - 铁 - 铁和钡。吸气剂52可以通过在选定的时间通过电流或者通过在发射极衬底上的微尖端的电子轰击来热再活化。吸气剂52可以形成在形成在导体46之间的空间中固定到基底42上的基本上不透明的电绝缘材料50上，所述空间充当环境光进入和离开装置的通道的屏障。公开了在阳极板40上制造吸气条52的方法。

9. 发明授权

US5316793A Directed effusive beam atomic layer epitaxy system and method 失效
标题翻译：导向射流原子层外延系统及方法
公开(公告)号：US5316793A
公开(公告)日：1994-05-31
申请号：US919685
申请日：1992-07-27
申请人： Robert M. Wallace , Bruce E. Gnade
发明人： Robert M. Wallace , Bruce E. Gnade
IPC分类号： B01J19/00 , C23C16/44 , C23C16/455 , C30B25/02 , C30B25/14 , H01L21/205 , C23C16/00
CPC分类号： C23C16/45544 , C23C16/45517 , C30B25/14
摘要： A system and method for epitaxial growth of high purity materials on an atomic or molecular layer by layer basis wherein a substrate is placed in an evacuated chamber which is evacuated to a pressure of less than about 10.sup.-9 Torr and predetermined amounts of predetermined precursor gases are injected into the chamber from a location in the chamber closely adjacent the substrate to form the atomic or molecular layer at the surface of the substrate while maintaining the pressure at less than about 10.sup.-9 Torr in the chamber in regions thereof distant from the substrate. The precursor gases are provided from a plurality of tanks containing the precursor gases therein under predetermined pressure and predetermined ones of the tanks are opened to the chamber for predetermined time periods while maintaining the pressure in the tanks. A dose limiting structure is provided for directing predetermined amounts of the precursor gases principally at the substrate with a dose limiting directional structure.
摘要翻译：一种用于以原子或分子层为基础外延生长高纯度材料的系统和方法，其中将衬底放置在抽真空至小于约10-9乇的压力的预抽真空室中，并将预定量的预定前体气体从与基板紧邻的室中的位置注入室中，以在基板的表面处形成原子层或分子层，同时在远离基板的区域中将室内的压力维持在小于约10-9乇。前体气体由预定压力下容纳其中的前体气体的多个容器提供，并且预定的这些罐在腔室中保持预定的时间段同时保持在罐中的压力。提供了剂量限制结构，用于以剂量限制的方向结构主要在衬底上引导预定量的前体气体。

10. 发明授权

US4567432A Apparatus for testing integrated circuits 失效
标题翻译：集成电路测试装置
公开(公告)号：US4567432A
公开(公告)日：1986-01-28
申请号：US490001
申请日：1983-06-09
申请人： Douglas A. Buol , Dean N. Mize , John W. Pattschull , Robert M. Wallace
发明人： Douglas A. Buol , Dean N. Mize , John W. Pattschull , Robert M. Wallace
IPC分类号： H01L21/66 , G01R1/073 , G01R31/28 , G01R1/06 , G01R31/26
CPC分类号： G01R31/2891
摘要： A system for statically and dynamically testing an integrated circuit die in wafer form at various temperatures includes a multilayer support fixture in which the probes, the static test switching circuitry, and the dynamic test switching circuitry are mounted on separate, spaced apart, planar layers detachably connected to one another, the probe and the probe support board being formed of materials having a low temperature coefficient of thermal expansion. A heated/cooled wafer positioning chuck controls the temperature of the wafer thereon during static and dynamic testing.
摘要翻译：用于在各种温度下以晶片形式静态和动态地测试集成电路管芯的系统包括多层支撑夹具，其中探针，静态测试开关电路和动态测试开关电路可拆卸地安装在分开的间隔开的平面层上彼此连接，探针和探针支撑板由具有低温度热膨胀系数的材料形成。加热/冷却的晶片定位卡盘在静态和动态测试期间控制其上的晶片的温度。

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