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1. 发明授权

US08674768B2 Signaling system with low-power automatic gain control 有权
标题翻译：信号系统具有低功率自动增益控制
公开(公告)号：US08674768B2
公开(公告)日：2014-03-18
申请号：US13352221
申请日：2012-01-17
申请人： William J. Dally , John W. Poulton
发明人： William J. Dally , John W. Poulton
IPC分类号： H03G3/10
CPC分类号： H03G3/3036 , H03G3/3052 , H03K2005/00039
摘要： An integrated circuit receiver includes a first channel comprising an amplifier responsive to a first gain control value in a first mode to receive an input signal and generate a first amplified signal having a transition rate. Detection circuitry in the first channel detects transitions in the first amplified signal in accordance with a detected transition rate. The detected transition rate is based on the first gain control value. Gain control logic adjusts the first gain control value based on a desired detected transition rate. The gain control logic generates a second gain control value for use during a second mode. The second gain control value being based on the first gain control value.
摘要翻译：集成电路接收器包括第一通道，其包括响应于第一模式中的第一增益控制值的放大器，以接收输入信号并产生具有转变速率的第一放大信号。第一通道中的检测电路根据检测到的转换速率来检测第一放大信号中的转换。所检测的转变速率基于第一增益控制值。增益控制逻辑基于期望的检测到的转变速率来调整第一增益控制值。增益控制逻辑产生在第二模式期间使用的第二增益控制值。第二增益控制值基于第一增益控制值。

2. 发明授权

US08487681B2 Dual-trigger low-energy flip-flop circuit 有权
公开(公告)号：US08487681B2
公开(公告)日：2013-07-16
申请号：US13033426
申请日：2011-02-23
申请人： William J. Dally , Jonah M. Alben , John W. Poulton , G E (Francis) Yang
发明人： William J. Dally , Jonah M. Alben , John W. Poulton , G E (Francis) Yang
IPC分类号： H03K3/356
CPC分类号： H03K3/36 , H03K3/012 , H03K3/356121
摘要： One embodiment of the present invention sets forth a technique for technique for capturing and storing a level of an input signal using a dual-trigger low-energy flip-flop circuit that is fully-static and insensitive to fabrication process variations. The dual-trigger low-energy flip-flop circuit presents only three transistor gate loads to the clock signal and none of the internal nodes toggle when the input signal remains constant. One of the clock signals may be a low-frequency “keeper clock” that toggles less frequently than the other two clock signal that is input to two transistor gates. The output signal Q is set or reset at the rising clock edge using separate trigger sub-circuits. Either the set or reset may be armed while the clock signal is low, and the set or reset is triggered at the rising edge of the clock.

3. 发明授权

US08102212B2 Signaling system with low-power automatic gain control 有权
标题翻译：信号系统具有低功率自动增益控制
公开(公告)号：US08102212B2
公开(公告)日：2012-01-24
申请号：US12840150
申请日：2010-07-20
申请人： William J. Dally , John W. Poulton
发明人： William J. Dally , John W. Poulton
IPC分类号： H03G3/10
CPC分类号： H03G3/3036 , H03G3/3052 , H03K2005/00039
摘要： An integrated circuit receiver includes a first channel comprising an amplifier responsive to a first gain control value in a first mode to receive an input signal and generate a first amplified signal having a transition rate. Detection circuitry in the first channel detects transitions in the first amplified signal in accordance with a detected transition rate. The detected transition rate is based on the first gain control value. Gain control logic adjusts the first gain control value based on a desired detected transition rate. The gain control logic generates a second gain control value for use during a second mode. The second gain control value being based on the first gain control value.
摘要翻译：集成电路接收器包括第一通道，其包括响应于第一模式中的第一增益控制值的放大器，以接收输入信号并产生具有转变速率的第一放大信号。第一通道中的检测电路根据检测到的转换速率来检测第一放大信号中的转换。所检测的转变速率基于第一增益控制值。增益控制逻辑基于期望的检测到的转变速率来调整第一增益控制值。增益控制逻辑产生在第二模式期间使用的第二增益控制值。第二增益控制值基于第一增益控制值。

4. 发明申请

US20090201090A1 SIGNALING SYSTEM WITH LOW-POWER AUT0MATIC GAIN CONTROL 有权
标题翻译：具有低功率自动增益控制的信号系统
公开(公告)号：US20090201090A1
公开(公告)日：2009-08-13
申请号：US12366612
申请日：2009-02-05
申请人： William J. Dally , John W. Poulton
发明人： William J. Dally , John W. Poulton
IPC分类号： H03G3/10
CPC分类号： H03G3/3036 , H03G3/3052 , H03K2005/00039
摘要： An integrated circuit device includes a variable-gain amplifier, memory circuit and gain control update circuit. The variable-gain amplifier generates an amplified signal having an amplitude according to a gain control value that is stored, at least during a first interval, within the memory circuit. The update circuit generates an updated gain control value based on the amplified signal during the first interval, and outputs the updated gain control value to the memory circuit to be stored therein at a conclusion of the first interval.
摘要翻译：集成电路装置包括可变增益放大器，存储电路和增益控制更新电路。可变增益放大器至少在第一间隔期间内在存储器电路内产生具有根据增益控制值的幅度的放大信号。更新电路基于第一间隔期间的放大信号产生更新的增益控制值，并且在第一间隔的结论处将更新的增益控制值输出到要存储在其中的存储器电路。

5. 发明授权

US06861916B2 Phase controlled oscillator circuit with input signal coupler 有权
标题翻译：具有输入信号耦合器的相控振荡电路
公开(公告)号：US06861916B2
公开(公告)日：2005-03-01
申请号：US10615819
申请日：2003-07-09
申请人： William J. Dally , Ramin Farjad-Rad , John W. Poulton , Thomas H. Greer, III , Hiok-Tiaq Ng , Teva J. Stone
发明人： William J. Dally , Ramin Farjad-Rad , John W. Poulton , Thomas H. Greer, III , Hiok-Tiaq Ng , Teva J. Stone
IPC分类号： H03K3/03 , H03K3/354 , H03L7/00 , H03L7/081 , H03L7/083 , H03L7/091 , H03L7/099 , H03L7/20 , H03L7/23 , H03L7/24 , H03B5/24
CPC分类号： H03L7/0805 , H03K3/0315 , H03K3/0322 , H03K3/354 , H03L7/07 , H03L7/0812 , H03L7/083 , H03L7/091 , H03L7/0995 , H03L7/0998 , H03L7/20 , H03L7/23 , H03L7/24
摘要： An oscillating signal in an oscillator is caused to phase shift toward the phase of an input signal coupled to the oscillating signal. The resonant frequency of the oscillator is about equal to an integer multiple of the frequency of the input signal. The input signal may be generated in a pulse generator to have an input pulse duration less than or equal to that of the oscillating signal. The oscillator circuit may be used as a filter to filter pulse width variations or to filter jitter from a reference clock. The oscillator circuit may also serve as a buffer by amplifying the input signal. Phase interpolation can be obtained by coupling at least one input signal with at least one oscillating signal.
摘要翻译：引起振荡器中的振荡信号朝耦合到振荡信号的输入信号的相位移相。振荡器的谐振频率约等于输入信号频率的整数倍。可以在脉冲发生器中产生输入信号以具有小于或等于振荡信号的输入脉冲持续时间的输入脉冲持续时间。振荡器电路可以用作滤波器以滤除脉冲宽度变化或者从参考时钟滤波抖动。振荡器电路也可以通过放大输入信号作为缓冲器。可以通过将至少一个输入信号与至少一个振荡信号耦合来获得相位插值。

6. 发明授权

US06807186B2 Architectures for a single-stage grooming switch 有权
标题翻译：单阶段美容开关架构
公开(公告)号：US06807186B2
公开(公告)日：2004-10-19
申请号：US10052233
申请日：2002-01-17
申请人： William J. Dally , John Edmondson , Donald A. Priore , Ephrem Wu , John W. Poulton
发明人： William J. Dally , John Edmondson , Donald A. Priore , Ephrem Wu , John W. Poulton
IPC分类号： H04L1228
CPC分类号： H04L49/405 , H04Q3/521
摘要： A single-stage grooming switch is provided for switching streams of multiplexed traffic, such as SONET STS-48, in both time and space domains. In particular, the switch implements a distributed demultiplexing architecture for switching between any input timeslot to any output timeslot at a reduced layout size. Furthermore, the distributed demultiplexing architecture results in low latencies being associated with reconfiguration of output permutations on the order of nanoseconds.
摘要翻译：提供单级梳理开关，用于在时域和空间域中切换多路复用业务流，如SONET STS-48。特别地，交换机实现分布式解复用架构，用于在减少的布局大小的任何输入时隙之间切换到任何输出时隙。此外，分布式解复用架构导致低延迟与纳秒级的输出排列的重新配置相关联。

7. 发明授权

US09338036B2 Data-driven charge-pump transmitter for differential signaling 有权
标题翻译：用于差分信号的数据驱动电荷泵发射器
公开(公告)号：US09338036B2
公开(公告)日：2016-05-10
申请号：US13361843
申请日：2012-01-30
申请人： John W. Poulton , Thomas Hastings Greer, III , William J. Dally
发明人： John W. Poulton , Thomas Hastings Greer, III , William J. Dally
IPC分类号： H03K19/0175 , H04L25/02
CPC分类号： H04L25/0272 , H01L2224/05554 , H01L2224/48137 , H01L2224/49175 , H01L2924/13091 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/00
摘要： One embodiment of the present invention sets forth a mechanism for transmitting and receiving differential signals. A transmitter combines a direct current (DC) to DC converter including a capacitor with a 2:1 multiplexer to drive a pair of differential signaling lines. The transmitter drives a pair of voltages that are symmetric about the ground power supply level. Signaling currents are returned to the ground plane to minimize the generation of noise that is a source of crosstalk between different differential signaling pairs. Noise introduced through the power supply is correlated with the switching rate of the data and may be reduced using an equalizer circuit.
摘要翻译：本发明的一个实施例提出了用于发送和接收差分信号的机制。发射机将直流（DC）到DC转换器组合，包括具有2：1多路复用器的电容器，以驱动一对差分信号线。发射机驱动一对对地面电源电平对称的电压。信号电流返回到接地平面，以最小化作为不同差分信号对之间串扰源的噪声的产生。通过电源引入的噪声与数据的切换速率相关，并且可以使用均衡器电路来减小。

8. 发明申请

US20120112837A1 SIGNALING SYSTEM WITH LOW-POWER AUTOMATIC GAIN CONTROL 有权
标题翻译：低功率自动增益控制信号系统
公开(公告)号：US20120112837A1
公开(公告)日：2012-05-10
申请号：US13352221
申请日：2012-01-17
申请人： William J. Dally , John W. Poulton
发明人： William J. Dally , John W. Poulton
IPC分类号： H03G3/10
CPC分类号： H03G3/3036 , H03G3/3052 , H03K2005/00039
摘要： An integrated circuit receiver includes a first channel comprising an amplifier responsive to a first gain control value in a first mode to receive an input signal and generate a first amplified signal having a transition rate. Detection circuitry in the first channel detects transitions in the first amplified signal in accordance with a detected transition rate. The detected transition rate is based on the first gain control value. Gain control logic adjusts the first gain control value based on a desired detected transition rate. The gain control logic generates a second gain control value for use during a second mode. The second gain control value being based on the first gain control value.
摘要翻译：集成电路接收器包括第一通道，其包括响应于第一模式中的第一增益控制值的放大器，以接收输入信号并产生具有转变速率的第一放大信号。第一通道中的检测电路根据检测到的转换速率来检测第一放大信号中的转换。检测到的转换速率基于第一增益控制值。增益控制逻辑基于期望的检测到的转变速率来调整第一增益控制值。增益控制逻辑产生在第二模式期间使用的第二增益控制值。第二增益控制值基于第一增益控制值。

9. 发明申请

US20100283547A1 SIGNALING SYSTEM WITH LOW-POWER AUTOMATIC GAIN CONTROL 有权
标题翻译：具有低功率自动增益控制的信号系统
公开(公告)号：US20100283547A1
公开(公告)日：2010-11-11
申请号：US12840150
申请日：2010-07-20
申请人： William J. Dally , John W. Poulton
发明人： William J. Dally , John W. Poulton
IPC分类号： H03G3/10
CPC分类号： H03G3/3036 , H03G3/3052 , H03K2005/00039
摘要： An integrated circuit receiver includes a first channel comprising an amplifier responsive to a first gain control value in a first mode to receive an input signal and generate a first amplified signal having a transition rate. Detection circuitry in the first channel detects transitions in the first amplified signal in accordance with a detected transition rate. The detected transition rate is based on the first gain control value. Gain control logic adjusts the first gain control value based on a desired detected transition rate. The gain control logic generates a second gain control value for use during a second mode. The second gain control value being based on the first gain control value.
摘要翻译：集成电路接收器包括第一通道，其包括响应于第一模式中的第一增益控制值的放大器，以接收输入信号并产生具有转变速率的第一放大信号。第一通道中的检测电路根据检测到的转换速率来检测第一放大信号中的转换。所检测的转变速率基于第一增益控制值。增益控制逻辑基于期望的检测到的转变速率来调整第一增益控制值。增益控制逻辑产生在第二模式期间使用的第二增益控制值。第二增益控制值基于第一增益控制值。

10. 发明授权

US07782138B2 Signaling system with low-power automatic gain control 有权
标题翻译：信号系统具有低功率自动增益控制
公开(公告)号：US07782138B2
公开(公告)日：2010-08-24
申请号：US12366612
申请日：2009-02-05
申请人： William J. Dally , John W. Poulton
发明人： William J. Dally , John W. Poulton
IPC分类号： H03G3/10
CPC分类号： H03G3/3036 , H03G3/3052 , H03K2005/00039
摘要： An integrated circuit device includes a variable-gain amplifier, memory circuit and gain control update circuit. The variable-gain amplifier generates an amplified signal having an amplitude according to a gain control value that is stored, at least during a first interval, within the memory circuit. The update circuit generates an updated gain control value based on the amplified signal during the first interval, and outputs the updated gain control value to the memory circuit to be stored therein at a conclusion of the first interval.
摘要翻译：集成电路装置包括可变增益放大器，存储电路和增益控制更新电路。可变增益放大器至少在第一间隔期间内在存储器电路内产生具有根据增益控制值的幅度的放大信号。更新电路基于第一间隔期间的放大信号产生更新的增益控制值，并且在第一间隔的结论处将更新的增益控制值输出到要存储在其中的存储器电路。

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