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1. 发明授权

US07230506B2 Crosstalk reduction for a system of differential line pairs 失效
标题翻译：差分线对系统的串扰降低
公开(公告)号：US07230506B2
公开(公告)日：2007-06-12
申请号：US10682617
申请日：2003-10-09
申请人： William Beale , John T. Stonick , Jeffrey L. Sonntag
发明人： William Beale , John T. Stonick , Jeffrey L. Sonntag
IPC分类号： H01P3/04
CPC分类号： H05K1/0245 , H01P3/02 , H05K1/0228 , H05K1/0248 , H05K1/115 , H05K2201/044 , H05K2201/09236 , H05K2201/09263
摘要： A technique is presented for minimizing crosstalk between adjacent differential signal pairs in communications. A backplane embodiment wherein the backplane includes a plurality of differential signal line pairs, is presented. A first differential signal line pair can include a first differential signal line and a second differential signal line. The backplane can have the first differential signal line connected between first and second vias. The second differential signal line can be connected between third and fourth vias. A third signal line can be connected between fifth and sixth vias. The first via can be spatially adjacent to the fifth via such that a signal on the third signal line is coupled to the first differential signal line and the fourth via can be spatially located adjacent to the sixth via such that a signal on the third signal line is coupled to the second differential signal line.
摘要翻译：提出了一种用于最小化通信中相邻差分信号对之间的串扰的技术。提出了背板实施例，其中背板包括多个差分信号线对。第一差分信号线对可以包括第一差分信号线和第二差分信号线。背板可以具有连接在第一和第二通孔之间的第一差分信号线。第二差分信号线可以连接在第三和第四通孔之间。第三个信号线可以连接在第五和第六个通孔之间。第一通孔可以在空间上与第五通孔相邻，使得第三信号线上的信号耦合到第一差分信号线，并且第四通孔可以在空间上位于第六通孔附近，使得第三信号线上的信号耦合到第二差分信号线。

2. 发明授权

US07263122B2 Receiver based decision feedback equalization circuitry and techniques 有权
标题翻译：基于接收机的判决反馈均衡电路和技术
公开(公告)号：US07263122B2
公开(公告)日：2007-08-28
申请号：US10630991
申请日：2003-07-29
申请人： John T. Stonick , Jeffrey L. Sonntag , Daniel Keith Weinlader
发明人： John T. Stonick , Jeffrey L. Sonntag , Daniel Keith Weinlader
IPC分类号： H03H7/30 , H03H7/40 , H03K5/159
CPC分类号： H04L25/03057 , H04L2025/0349
摘要： In one aspect, the present invention is directed to a technique of, and circuitry and system for enhancing the performance of data communication systems using receiver based decision feedback equalization circuitry. In one embodiment, the equalization circuitry and technique employs a plurality of data slicers (for example, two) to receive an analog input and output a binary value based on the reference or slicer level. The output of the data slicers is provided to logic circuitry to determine whether the analog input was a binary high or binary low. In those instances where the data slicers “agree” and both indicate either a high or a low, the logic circuitry outputs the corresponding binary value. In those instances where the data slicer do not “agree”—that is, where one data slicer indicates the input to be a binary or logic high value and the other data slicer indicates the input to be a binary or logic low value, in one embodiment, the logic circuitry outputs the complement of the previous binary value. In another embodiment, the logic circuitry selects the output from the slicer that changed its output from the previous binary value. In yet another embodiment where the slicers do not “agree”, the logic circuitry selects the decision of the data slicer with higher slicer value if the previous binary value was “high”, or selects the decision of the data slicer with the lower slicer value if the previous binary value was “low”. The data slicers employ slicer levels that may be fixed, pre-programmed, predetermined, preset, changed, modified, optimized, enhanced and/or programmed or re-programmed (for example, adaptively) before or during operation of the decision feedback equalization circuitry.
摘要翻译：一方面，本发明涉及一种使用基于接收机的判决反馈均衡电路来增强数据通信系统的性能的技术和电路和系统。在一个实施例中，均衡电路和技术采用多个数据限幅器（例如，两个）来接收模拟输入并基于参考或限幅器电平输出二进制值。数据限幅器的输出被提供给逻辑电路，以确定模拟输入是二进制高还是二进制低。在数据限幅器“同意”并且都表示高电平或低电平的情况下，逻辑电路输出相应的二进制值。在数据限幅器不“同意”的情况下，即一个数据限幅器将输入指示为二进制值或逻辑高电平值，另一个数据限幅器将输入指示为二进制值或逻辑低电平值，逻辑电路输出先前二进制值的补码。在另一个实施例中，逻辑电路选择来自限幅器的输出，其从先前的二进制值改变其输出。在限幅器不“同意”的又一个实施例中，如果先前的二进制值为“高”，则逻辑电路选择具有较高限幅器值的数据限幅器的判定，或者选择具有较低限幅器值的数据限幅器的判定如果先前的二进制值为“低”。数据限幅器采用可在固定，预编程，预定，预设，改变，修改，优化，增强和/或编程或重新编程（例如，自适应地）自适应地在决策反馈均衡电路的操作期间的限幅器电平。

3. 发明申请

US20130321010A1 DETECTION OF DEFECTS IN TOUCH SENSORS 有权
标题翻译：检测触摸传感器中的缺陷
公开(公告)号：US20130321010A1
公开(公告)日：2013-12-05
申请号：US13483465
申请日：2012-05-30
申请人： Daniel J. Cooley , Jeffrey L. Sonntag
发明人： Daniel J. Cooley , Jeffrey L. Sonntag
IPC分类号： G01R31/00 , G01R31/02
CPC分类号： G06F3/0418 , G01R31/025
摘要： Defects in a touch sensor are detected by coupling the sensor lines to a common signal line. Each of the sensor lines is tested by disconnecting the sensor line from the common signal line, connecting it to a voltage (e.g., ground) and comparing the voltage on the common signal line to a reference voltage. Detected defects include a short circuit between any two transmit and/or receive lines and a short between any transmit or receive line to ground.
摘要翻译：通过将传感器线耦合到公共信号线来检测触摸传感器中的缺陷。通过将传感器线与公共信号线断开，将其连接到电压（例如接地）并将公共信号线上的电压与参考电压进行比较来测试每个传感器线。检测到的缺陷包括任何两个发射线和/或接收线之间的短路，以及任何发射线或接地线之间的短路。

4. 发明申请

US20130320955A1 TEMPERATURE COMPENSATED OSCILLATOR WITH IMPROVED NOISE PERFORMANCE 有权
标题翻译：具有改进噪声性能的温度补偿振荡器
公开(公告)号：US20130320955A1
公开(公告)日：2013-12-05
申请号：US13485356
申请日：2012-05-31
申请人： Volodymyr Kratyuk , Jeffrey L. Sonntag , Aaron J. Caffee
发明人： Volodymyr Kratyuk , Jeffrey L. Sonntag , Aaron J. Caffee
IPC分类号： G05F3/02
CPC分类号： H03L1/022 , G05F3/242 , H01L23/50 , H01L2924/0002 , H02M3/07 , H03K3/011 , H03K3/03 , H03L7/00 , H01L2924/00
摘要： An oscillator system addresses power supply noise and temperature dependence. The system includes a multi-stage regulator circuit that receives a supply voltage and generates a lower voltage oscillator supply voltage that is less noisy than the supply voltage. A charge pump circuit receives the oscillator supply voltage and the oscillator output signal and supplies the regulator circuit with a boosted voltage. A reference generator circuit supplies a reference signal that is used to determine the oscillator supply voltage. The reference signal varies with temperature and is used to offset the temperature coefficient of the oscillator.
摘要翻译：振荡器系统解决电源噪声和温度依赖性。该系统包括多级调节器电路，其接收电源电压并产生比电源电压噪声较小的较低电压振荡器电源电压。电荷泵电路接收振荡器电源电压和振荡器输出信号，并向稳压器电路提供升压电压。参考发生器电路提供用于确定振荡器电源电压的参考信号。参考信号随温度变化，用于抵消振荡器的温度系数。

5. 发明申请

US20110187462A1 PRODUCING A DESIRED FREQUENCY USING A CONTROLLED OSCILLATOR WITH KNOWN TEMPERATURE SENSITIVITY 有权
标题翻译：使用具有已知温度灵敏度的控制振荡器生产所需的频率
公开(公告)号：US20110187462A1
公开(公告)日：2011-08-04
申请号：US12774453
申请日：2010-05-05
申请人： Jeffrey L. Sonntag
发明人： Jeffrey L. Sonntag
IPC分类号： H03L7/00
CPC分类号： H03L7/00
摘要： A controlled oscillator is tuned to produce a desired, temperature independent frequency. A first frequency ratio is determined between a first frequency of the output signal generated by the controlled oscillator and a frequency of an output signal from another oscillator. The first frequency is determined based on a sensed temperature. A desired frequency of the output signal of the controlled oscillator is used to determine a desired frequency ratio between the desired frequency and the frequency of the output signal from the other oscillator. The controlled oscillator is tuned and the frequency ratio measured until the tuning has caused the desired frequency ratio to be achieved, thereby causing the controlled oscillator to provide the desired frequency.
摘要翻译：受控振荡器被调谐以产生期望的与温度无关的频率。在由受控振荡器产生的输出信号的第一频率和来自另一个振荡器的输出信号的频率之间确定第一频率比。第一个频率是基于感测的温度来确定的。使用受控振荡器的输出信号的期望频率来确定期望频率与来自另一个振荡器的输出信号的频率之间的期望频率比。调节受控振荡器，并测量频率比，直到调谐已经达到所需的频率比，从而使受控振荡器提供所需的频率。

6. 发明授权

US5012142A Differential controlled delay elements and skew correcting detector for delay-locked loops and the like 失效
标题翻译：用于延迟锁定环路的差分控制延迟元件和偏斜校正检测器等
公开(公告)号：US5012142A
公开(公告)日：1991-04-30
申请号：US387458
申请日：1989-07-28
申请人： Jeffrey L. Sonntag
发明人： Jeffrey L. Sonntag
IPC分类号： H03K5/00 , H03K5/13
CPC分类号： H03K5/133 , H03K2005/00045 , H03K2005/00195 , H03K2005/00228
摘要： A fully differential variable delay element for providing precision delays for use in digital phase-locked loops or the like. The delay in each stage is controlled by changing bias currents and the coupling of a capacitance load thereto, therby reducing the sensitivity of the delay element to electrical noise at low bias current levels (long delay times). Included is a circuit which substantially removes any skew in the differentially delayed signals from the delay element.
摘要翻译：一种全差分可变延迟元件，用于提供用于数字锁相环等的精确延迟。通过改变偏置电流和电容负载的耦合来控制每个级的延迟，这是由于在低偏置电流电平（长延迟时间）下降低延迟元件对电噪声的灵敏度。包括基本上消除了延迟元件的差分延迟信号中的任何偏斜的电路。

7. 发明授权

US07999523B1 Driver with improved power supply rejection 有权
标题翻译：驱动器具有改进的电源抑制
公开(公告)号：US07999523B1
公开(公告)日：2011-08-16
申请号：US12201070
申请日：2008-08-29
申请人： Aaron J. Caffee , Jeffrey L. Sonntag
发明人： Aaron J. Caffee , Jeffrey L. Sonntag
IPC分类号： G05F1/10 , G05F1/44
CPC分类号： H03K19/00361 , H03K3/356104
摘要： A technique reduces effects of power supply noise on a signal output by an integrated circuit output driver circuit powered at least partially by an external power supply. An integrated circuit includes a first circuit that provides a first version of a signal to be output referenced between a first regulated voltage and a first power supply voltage of an external power supply. A second circuit provides a second version of the signal to be output referenced between a second regulated voltage and a second power supply voltage of the external power supply. A third circuit provides a third version of the signal to be output referenced between the first power supply voltage and the second power supply voltage and based on the first and second versions of the signal to be output and power received from the external power supply.
摘要翻译：一种技术减少了由至少部分由外部电源供电的集成电路输出驱动器电路对电源噪声对信号输出的影响。集成电路包括第一电路，其提供在外部电源的第一调节电压和第一电源电压之间参考的要输出的信号的第一版本。第二电路提供要在外部电源的第二调节电压和第二电源电压之间参考的待输出信号的第二版本。第三电路提供在第一电源电压和第二电源电压之间的输出信号的第三版本，并且基于待输出的信号的第一和第二版本以及从外部电源接收的功率。

8. 发明授权

US06728894B2 System and method for clock adjustment by subsequently detecting a target bit of data stream, re-adjusting, and correcting clock based on difference in detected bit 有权
标题翻译：通过随后检测数据流的目标位置，根据检测到的位的差异重新调整和校正时钟来进行时钟调整的系统和方法
公开(公告)号：US06728894B2
公开(公告)日：2004-04-27
申请号：US09785430
申请日：2001-02-16
申请人： Peter McEwen , Ara Patapoutian , Ke Han , Eduardo Veiga , Jeffrey L. Sonntag
发明人： Peter McEwen , Ara Patapoutian , Ke Han , Eduardo Veiga , Jeffrey L. Sonntag
IPC分类号： G06F1100
CPC分类号： G11B20/1403 , H03L7/091
摘要： Adjusting a clock signal includes receiving a data stream, detecting a bit in the data stream using a first amount of data in the data stream, adjusting the clock signal based on the detected bit, detecting the bit in the data stream using a second amount of data in the data stream, the second amount of data comprising more data than the first amount of data, and correcting the clock signal if a result of initial detecting differs from a result of subsequent detecting.
摘要翻译：调整时钟信号包括接收数据流，使用数据流中的第一数据量来检测数据流中的位，基于检测到的位来调整时钟信号，使用第二量的数据流检测数据流中的位数据流中的数据，第二数据量包括比第一数据量多的数据，以及如果初始检测结果与随后检测的结果不同，则校正时钟信号。

9. 发明授权

US06587987B1 Method and apparatus for extracting reliability information from partial response channels 有权
标题翻译：从部分响应信道中提取可靠性信息的方法和装置
公开(公告)号：US06587987B1
公开(公告)日：2003-07-01
申请号：US09611887
申请日：2000-07-07
申请人： Bane V. Vasic , Inkyu Lee , Jeffrey L. Sonntag
发明人： Bane V. Vasic , Inkyu Lee , Jeffrey L. Sonntag
IPC分类号： H03M1300
CPC分类号： H03M13/47
摘要： The present invention is a method and system for generating soft outputs by taking advantage of the fact that, in PR channels, there exists a set of error event sequences that occurs more often than others. This results in a soft output extractor with significantly lower complexity than the prior art SOVA system. Minimum distance error event sequences are identified and soft information or bit reliabilities are extracted from the PR channel based on the identified sequences. The soft information is then used by an iterative error control decoder correct errors more efficiently.
摘要翻译：本发明是一种通过利用以下事实来生成软输出的方法和系统：在PR信道中存在比其他的更频繁出现的一组错误事件序列。这导致软输出提取器具有比现有技术的SOVA系统低得多的复杂度。识别最小距离误差事件序列，并且基于所识别的序列从PR信道提取软信息或比特可靠性。然后，软信息由迭代误差控制解码器更有效地校正错误。

10. 发明授权

US5604497A Apparatus and method for increasing density of run length limited block codes without increasing error propagation 失效
标题翻译：增加运行长度限制块码密度而不增加误差传播的装置和方法
公开(公告)号：US5604497A
公开(公告)日：1997-02-18
申请号：US540510
申请日：1995-10-10
申请人： Jeffrey L. Sonntag
发明人： Jeffrey L. Sonntag
IPC分类号： G06F3/06 , G06F5/08 , G06F11/10 , G11B20/14 , H03M7/42
CPC分类号： G11B20/1426 , G11B2020/1434
摘要： The present invention is an apparatus and method for increasing the density of run-length-limited (RLL) block codes without increasing error propagation. By inserting a number of uncoded bytes (M) between each coded byte, the coding density is thereby increased. Starting with an RLL code with a block length (I) which is, for example, a multiple of 8, a number (M) of uncoded bytes may be inserted between each coded byte. The resulting density is: (I+8M)/(J+8M), wherein the resulting k constraint, of the (d,k,l) constraints is increased by 8M, and the resulting l constraint is increased by 4M. For example, starting with an RLL code having a coding density of 8/9 (I=8, J=9) and constraint set of (0,4,4), inserting one uncoded byte between each coded byte (M=1) results in a coding density of 16/17 which is 5.88% greater than the original 8/9 coding density. The constraint set is also increased to (0,12,8), where k is increased by 8 and l is increased by 4. The coding density is significantly increased without increasing the error propagation, since the size of the coded block is not increased.
摘要翻译：本发明是一种用于在不增加误差传播的情况下增加游程长度限制（RLL）块码的密度的装置和方法。通过在每个编码字节之间插入多个未编码字节（M），从而增加了编码密度。以具有例如8的倍数的块长度（I）的RLL码开始，可以在每个编码字节之间插入未编码字节数（M）。所得到的密度为：（I + 8M）/（J + 8M），其中（d，k，l）约束的结果k约束增加8M，并且所得到的约束增加4M。例如，从编码密度为8/9（I = 8，J = 9）和约束集（0,4,4）的RLL码开始，在每个编码字节（M = 1）之间插入一个未编码字节，导致编码密度为16/17，比原始8/9编码密度大5.88％。约束集也增加到（0,12,8），其中k增加8并且l增加4.编码密度显着增加而不增加误差传播，因为编码块的大小不增加。

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