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1. 发明授权

US07087526B1 Method of fabricating a p-type CaO-doped SrCu2O2 thin film 有权
标题翻译：制造p型CaO掺杂SrCu2O2薄膜的方法
公开(公告)号：US07087526B1
公开(公告)日：2006-08-08
申请号：US11261020
申请日：2005-10-27
申请人： Wei-Wei Zhuang , Wei Gao , Yoshi Ono
发明人： Wei-Wei Zhuang , Wei Gao , Yoshi Ono
IPC分类号： H01L23/02
CPC分类号： C23C26/00
摘要： A method of CaO-doped SrCu2O2 spin-on precursor synthesis and low temperature p-type thin film deposition, includes preparing a wafer to receive a spin-coating thereon; selecting metalorganic compounds to form a SrCu2O2 precursor, mixing and refluxing the metalorganic compounds to form a precursor mixture; filtering the precursor mixture to produce a spin-coating precursor; applying the spin-coating precursor to the wafer in a two-step spin coating procedure; baking the spin-coated wafer using a hot-plate bake to evaporate substantially all of the solvents; and annealing the spin-coated wafer to form a CaO-doped SrCu2O2 layer thereon.
摘要翻译：掺有CaO的SrCu 2 O 2 O 2旋涂前体合成和低温p型薄膜沉积的方法包括制备晶片以在其上接受旋涂法 ; 选择金属有机化合物以形成SrCu 2 O 2 O 2前体，将金属有机化合物混合并回流以形成前体混合物; 过滤前体混合物以产生旋涂前体; 以两步旋涂方法将旋涂前驱体施加到晶片上; 使用热板烘烤烘烤旋涂的晶片以基本上蒸发所有溶剂; 以及对旋涂的晶片退火以在其上形成掺杂CaO的SrCu 2 O 2 O 2层。

2. 发明申请

US20060046204A1 Directly patternable microlens 审中-公开
标题翻译：直接图案化的微透镜
公开(公告)号：US20060046204A1
公开(公告)日：2006-03-02
申请号：US10931596
申请日：2004-08-31
申请人： Yoshi Ono , Wei-Wei Zhuang , Wei Gao , Bruce Ulrich
发明人： Yoshi Ono , Wei-Wei Zhuang , Wei Gao , Bruce Ulrich
IPC分类号： G02B3/00
CPC分类号： G02B3/0012
摘要： A method of forming a microlens structure using a patternable lens material is provided. An organic-inorganic hybrid polymer comprising titanium dioxide is exposed to light using a defocused mask image and then developed to produce a lens-shaped region.
摘要翻译：提供了使用可图案的透镜材料形成微透镜结构的方法。使用散焦的掩模图像将包含二氧化钛的有机 - 无机杂化聚合物暴露于光，然后显影以产生透镜形区域。

3. 发明申请

US20080026494A1 Method of fabricating a terbium-doped electroluminescence device via metal organic deposition processes 审中-公开
标题翻译：通过金属有机沉积工艺制造掺铒电致发光器件的方法
公开(公告)号：US20080026494A1
公开(公告)日：2008-01-31
申请号：US11494181
申请日：2006-07-26
申请人： Wei-Wei Zhuang , Yoshi Ono , Wei Gao , Tingkai Li
发明人： Wei-Wei Zhuang , Yoshi Ono , Wei Gao , Tingkai Li
IPC分类号： H01L21/00
CPC分类号： H05B33/10
摘要： A method of fabricating an electroluminescent device includes preparing a wafer and a doped-silicon oxide precursor solution. The doped-silicon oxide precursor solution is spin coated onto the wafer to form a doped-silicon oxide thin film on the wafer, which is baked at progressively increasing temperatures. The wafer is then rapidly thermally annealed, further annealed in a wet oxygen ambient atmosphere. A transparent top electrode is deposited on the doped-silicon oxide thin film, which is patterned, etched, and annealed. The doped-silicon oxide thin film and the wafer undergo a final annealing step to enhance electroluminescent properties.
摘要翻译：制造电致发光器件的方法包括制备晶片和掺杂的氧化硅前体溶液。将掺杂的氧化硅前体溶液旋涂在晶片上以在晶片上形成掺杂的氧化硅薄膜，其在逐渐升高的温度下烘烤。然后将晶片快速热退火，在湿氧环境气氛中进一步退火。透明的顶部电极沉积在掺杂的氧化硅薄膜上，其被图案化，蚀刻和退火。掺杂氧化硅薄膜和晶片进行最终退火步骤以增强电致发光性能。

4. 发明申请

US20070054042A1 Method of SrCu2O2 spin-on precursor synthesis and low temperature p-type thin film deposition 审中-公开
标题翻译： SrCu2O2旋涂前驱体合成方法及低温p型薄膜沉积方法
公开(公告)号：US20070054042A1
公开(公告)日：2007-03-08
申请号：US11220885
申请日：2005-09-06
申请人： Wei-Wei Zhuang , Yoshi Ono , Wei Gao
发明人： Wei-Wei Zhuang , Yoshi Ono , Wei Gao
IPC分类号： B05D3/12 , B05D3/02
CPC分类号： C01G3/00 , C01P2002/72 , H01L21/02381 , H01L21/02403 , H01L21/02472 , H01L21/02565 , H01L21/02579 , H01L21/02628
摘要： A method of SrCu2O2 spin-on precursor synthesis and low temperature p-type thin film deposition, includes preparing a wafer to receive a spin-coating thereon; selecting metalorganic compounds to form a SrCu2O2 precursor, mixing and refluxing the metalorganic compounds to form a precursor mixture; filtering the precursor mixture to produce a spin-coating precursor; applying the spin-coating precursor to the wafer in a two-step spin coating procedure; baking the spin-coated wafer using a hot-plate bake to evaporate substantially all of the solvents; and annealing the spin-coated wafer to form a SrCu2O2 layer thereon in a two-step post-anneal process.
摘要翻译： SrCu 2 O 2 O 2旋转前体合成和低温p型薄膜沉积的方法包括制备晶片以在其上接受旋涂; 选择金属有机化合物以形成SrCu 2 O 2 O 2前体，将金属有机化合物混合并回流以形成前体混合物; 过滤前体混合物以产生旋涂前体; 以两步旋涂方法将旋涂前驱体施加到晶片上; 使用热板烘烤烘烤旋涂的晶片以基本上蒸发所有溶剂; 并在两步后退火工艺中退火旋涂晶片以形成SrCu 2 O 2 O 2层。

5. 发明授权

US07811837B2 Terbium-doped, silicon-rich oxide electroluminescent devices and method of making the same 有权
标题翻译：铽掺杂，富硅氧化物电致发光器件及其制造方法
公开(公告)号：US07811837B2
公开(公告)日：2010-10-12
申请号：US11582275
申请日：2006-10-16
申请人： Tingkai Li , Wei Gao , Yoshi Ono , Sheng Teng Hsu
发明人： Tingkai Li , Wei Gao , Yoshi Ono , Sheng Teng Hsu
IPC分类号： H01L29/00
CPC分类号： H01L27/15 , H01L33/0004 , H01L33/343
摘要： A method of fabricating an electroluminescent device includes, on a prepared substrate, depositing a rare earth-doped silicon-rich layer on gate oxide layer as a light emitting layer; and annealing and oxidizing the structure to repair any damage caused to the rare earth-doped silicon-rich layer; and incorporating the electroluminescent device into a CMOS IC. An electroluminescent device fabricated according to the method of the invention includes a substrate, a rare earth-doped silicon-rich layer formed on the gate oxide layer for emitting a light of a pre-determined wavelength; a top electrode formed on the rare earth-doped silicon-rich layer; and associated CMOS IC structures fabricated thereabout.
摘要翻译：一种制造电致发光器件的方法包括：在制备的衬底上，在作为发光层的栅极氧化物层上沉积稀土掺杂的富硅层; 并对该结构进行退火和氧化以修复对稀土掺杂的富硅层造成的任何损伤; 并将电致发光器件并入CMOS IC。根据本发明的方法制造的电致发光器件包括：衬底，形成在栅极氧化物层上的用于发射预定波长的光的稀土掺杂富硅层; 在稀土掺杂的富硅层上形成的顶部电极; 并在其附近制造相关的CMOS IC结构。

6. 发明申请

US20100040959A1 Error Diffusion-Derived Sub-Resolutional Grayscale Reticle 有权
标题翻译：误差扩散次级分辨灰度光栅
公开(公告)号：US20100040959A1
公开(公告)日：2010-02-18
申请号：US12247130
申请日：2008-10-07
申请人： Bruce D. Ulrich , Yoshi Ono , Wei Gao
发明人： Bruce D. Ulrich , Yoshi Ono , Wei Gao
IPC分类号： G03F1/00
CPC分类号： G03F1/50 , G03F7/0005
摘要： A method is provided for forming an error diffusion-derived sub-resolutional grayscale reticle. The method forms at least one partial-light transmissive layer overlying a transparent substrate. At least one unit cell in formed in the transmissive layer. The unit cell is formed by selecting the number of reduced-transmission pixels in the unit cell, and forming a sub-pattern of reduced-transmission pixels in the unit cell. The unit cell is sub-resolutional at a first wavelength.
摘要翻译：提供了一种用于形成误差扩散衍生的子分辨灰度掩模版的方法。该方法形成了覆盖透明衬底的至少一个部分透光层。在透射层中形成至少一个单电池。通过选择单位单元中的缩小透射像素的数量，并且在单位单元中形成减少透射像素的子图案来形成单位单元。单元在第一波长处是次分辨的。

7. 发明申请

US20100040958A1 Sub-Resolutional Grayscale Reticle 有权
标题翻译：子分辨灰度光栅
公开(公告)号：US20100040958A1
公开(公告)日：2010-02-18
申请号：US12193568
申请日：2008-08-18
申请人： Bruce D. Ulrich , Yoshi Ono , Wei Gao
发明人： Bruce D. Ulrich , Yoshi Ono , Wei Gao
IPC分类号： G03F1/00
CPC分类号： G03F1/50 , G03F7/0005
摘要： A sub-resolutional grayscale reticle and associated fabrication method have been presented. The method provides a transparent substrate, and forms a plurality of coincident partial-light transmissive layers overlying the transparent substrate. A pattern is formed, sub-resolutional at a first wavelength, in at least one of the transmissive layers. If there are n transmissive layers, the reticle transmits at least (n+1) intensities of light. In one aspect, each of the plurality of transmissive layers has the same extinction coefficient and the same thickness. In other aspects, the transmissive layers may have different thickness. Then, even if the extinction coefficients are the same, the attenuation of light through each layer is different. The transmission characteristics of the reticle can be further varied if the transmissive layers have different extinction coefficients. Likewise, the transmission characteristics through the sub-resolutional patterns can be varied.
摘要翻译：已经提出了一种亚分辨灰度标线和相关的制造方法。该方法提供透明基板，并且形成覆盖透明基板的多个重合部分透光层。在至少一个透射层中形成在第一波长处副溶液的图案。如果存在n个透射层，则光罩传播至少（n + 1）个光强。在一个方面，多个透射层中的每一个具有相同的消光系数和相同的厚度。在其它方面，透射层可以具有不同的厚度。那么即使消光系数相同，每层的光的衰减也是不同的。如果透射层具有不同的消光系数，则可以进一步改变掩模版的透射特性。同样，可以改变通过子解决图案的传输特性。

8. 发明授权

US06873048B2 System and method for integrating multiple metal gates for CMOS applications 失效
标题翻译：用于集成多个金属栅极用于CMOS应用的系统和方法
公开(公告)号：US06873048B2
公开(公告)日：2005-03-29
申请号：US10376795
申请日：2003-02-27
申请人： Wei Gao , John F. Conley, Jr. , Yoshi Ono
发明人： Wei Gao , John F. Conley, Jr. , Yoshi Ono
IPC分类号： H01L21/28 , H01L21/336 , H01L21/8238 , H01L27/092 , H01L29/423 , H01L29/49 , H01L29/78 , H01L23/48
CPC分类号： H01L29/66583 , H01L21/823842 , H01L29/495 , H01L29/4958 , H01L29/4966 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要： A dual-gate MOSFET with metal gates and a method for setting threshold voltage in such a MOSFET is provided. The method comprises: forming a gate oxide layer overlying first and second channel regions; forming a first metal layer having a first thickness overlying the gate oxide layer; forming a second metal layer having a second thickness overlying the first metal layer first thickness; selectively removing the second metal layer overlying the first channel region; forming a third metal layer; establishing a first MOSFET with a gate work function responsive to the thicknesses of the first and third metal layer overlying the first channel region; and, establishing a second MOSFET, complementary to the first MOSFET, with a gate work function responsive to the combination of the thicknesses of the first, second, and third metal layers overlying the second channel region.
摘要翻译：提供了具有金属栅极的双栅极MOSFET和用于设置这种MOSFET中的阈值电压的方法。该方法包括：形成覆盖第一和第二沟道区的栅极氧化层; 形成具有覆盖所述栅极氧化物层的第一厚度的第一金属层; 形成具有覆盖所述第一金属层第一厚度的第二厚度的第二金属层; 选择性地去除覆盖在第一沟道区上的第二金属层; 形成第三金属层; 建立具有响应于覆盖在第一沟道区上的第一和第三金属层的厚度的栅极功函数的第一MOSFET; 以及响应于覆盖在第二沟道区上的第一，第二和第三金属层的厚度的组合，建立与第一MOSFET互补的第二MOSFET。

9. 发明授权

US06825106B1 Method of depositing a conductive niobium monoxide film for MOSFET gates 失效
标题翻译：沉积用于MOSFET栅极的导电铌氧化物膜的方法
公开(公告)号：US06825106B1
公开(公告)日：2004-11-30
申请号：US10676987
申请日：2003-09-30
申请人： Wei Gao , Yoshi Ono
发明人： Wei Gao , Yoshi Ono
IPC分类号： H01L213205
CPC分类号： H01L29/66545 , H01L21/28088 , H01L29/78
摘要： A method is provided to deposit niobium monoxide gates. An elemental metal target, or a composite niobium monoxide target is provided within a sputtering chamber. A substrate with gate dielectric, for example silicon dioxide or a high-k gate dielectric, is provided in the sputtering chamber. The sputtering power and oxygen partial pressure within the chamber is set to deposit a film comprising niobium monoxide, without excess amounts of elemental niobium, NbO2 insulator, or Nb2O5 insulator. The deposition method may be incorporated into a standard CMOS fabrication process, or a replacement gate CMOS process.
摘要翻译：提供了一种沉积一氧化monoxide栅的方法。在溅射室内设置元素金属靶或复合铌靶。在溅射室中提供具有栅极电介质的衬底，例如二氧化硅或高k栅极电介质。室内的溅射功率和氧分压被设定为沉积包含一氧化铌的膜，而不含过量的元素铌，NbO 2绝缘体或Nb 2 O 5绝缘体。沉积方法可以结合到标准CMOS制造工艺或替代栅极CMOS工艺中。

10. 发明授权

US07208768B2 Electroluminescent device 失效
标题翻译：电致发光器件
公开(公告)号：US07208768B2
公开(公告)日：2007-04-24
申请号：US10836669
申请日：2004-04-30
申请人： Yoshi Ono , Wei Gao , John F. Conley, Jr. , Osamu Nishio , Keizo Sakiyama
发明人： Yoshi Ono , Wei Gao , John F. Conley, Jr. , Osamu Nishio , Keizo Sakiyama
IPC分类号： H01L27/15
CPC分类号： H01L33/28 , H01L33/18 , H01L33/34 , Y10S977/95
摘要： A method is provided for forming an electroluminescent device. The method comprises: providing a type IV semiconductor material substrate; forming a p+/n+ junction in the substrate, typically a plurality of interleaved p+/n+ junctions are formed; and, forming an electroluminescent layer overlying the p+/n+ junction(s) in the substrate. The type IV semiconductor material substrate can be Si, C, Ge, SiGe, or SiC. For example, the substrate can be Si on insulator (SOI), bulk Si, Si on glass, or Si on plastic. The electroluminescent layer can be a material such as nanocrystalline Si, nanocrystalline Ge, fluorescent polymers, or type II–VI materials such as ZnO, ZnS, ZnSe, CdSe, and CdS. In some aspect, the method further comprises forming an insulator film interposed between the substrate and the electroluminescent layer. In another aspect, the method comprises forming a conductive electrode overlying the electroluminescent layer.
摘要翻译：提供了形成电致发光器件的方法。该方法包括：提供IV型半导体材料基板; 在衬底中形成p + / n +结，通常形成多个交错的p + / n +结; 并且形成覆盖衬底中的p + / n +结的电致发光层。 IV型半导体材料基板可以是Si，C，Ge，SiGe或SiC。例如，衬底可以是绝缘体上的硅（SOI），玻璃上的体积Si，Si或塑料上的Si。电致发光层可以是诸如纳米晶体Si，纳米晶体Ge，荧光聚合物或诸如ZnO，ZnS，ZnSe，CdSe和CdS的II-VI族材料的材料。在一些方面，所述方法还包括形成介于基片和电致发光层之间的绝缘膜。另一方面，该方法包括形成覆盖电致发光层的导电电极。

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