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1. 发明授权

US06777327B2 Method of barrier metal surface treatment prior to Cu deposition to improve adhesion and trench filling characteristics 失效
标题翻译：在Cu沉积之前进行阻隔金属表面处理以提高粘附性和沟槽填充特性的方法
公开(公告)号：US06777327B2
公开(公告)日：2004-08-17
申请号：US09820068
申请日：2001-03-28
申请人： Wei Pan , Jer-Shen Maa , David R. Evans , Sheng Teng Hsu
发明人： Wei Pan , Jer-Shen Maa , David R. Evans , Sheng Teng Hsu
IPC分类号： H01L2144
CPC分类号： H01L21/76843 , C23C16/0209 , C23C16/18 , H01L21/28556 , H01L21/76864 , H01L21/76876
摘要： A rapid thermal process (RTP) provides steps wherein silicon wafers that are pre-coated with barrier metal films by either in-situ or ex-situ CVD or physical vapor deposition (PVD) are pre-treated, prior to deposition of a Cu film thereon, in a temperature range of between 250 and 550 degrees Celsius in a non-reactive gas such as hydrogen gas (H2), argon (Ar), or helium (He), or in an ambient vacuum. The chamber pressure typically is between 0.1 mTorr and 20 Torr, and the RTP time typically is between 30 to 100 seconds. Performing this rapid thermal process before deposition of the Cu film results in a thin, shiny, densely nucleated, and adhesive Cu film deposited on a variety of barrier metal surfaces. The pre-treatment process eliminates variations in the deposited Cu film caused by Cu precursors and is insensitive to variation in precursor composition, volatility, and other precursor variables. Accordingly, the process disclosed herein is an enabling technology for the use of metal organic CVD (MOCVD) Cu in IC fabrication.
摘要翻译：快速热处理（RTP）提供了在沉积Cu膜之前预处理通过原位或原位CVD或物理气相沉积（PVD）预涂覆有阻挡金属膜的硅晶片的步骤在非反应性气体如氢气（H 2），氩气（Ar）或氦气（He））或在环境真空中，在250-550摄氏度的温度范围内。室压力通常在0.1mTorr和20Torr之间，并且RTP时间通常在30至100秒之间。在沉积Cu膜之前进行这种快速热处理会导致沉积在各种阻挡金属表面上的薄而有光泽，致密成核和粘附的Cu膜。预处理过程消除了由Cu前体引起的沉积的Cu膜的变化，并且对前体组成，挥发性和其它前体变量的变化不敏感。因此，本文公开的方法是在IC制造中使用金属有机CVD（MOCVD）Cu的使能技术。

2. 发明授权

US07361574B1 Single-crystal silicon-on-glass from film transfer 有权
标题翻译：单晶硅玻璃从膜转移
公开(公告)号：US07361574B1
公开(公告)日：2008-04-22
申请号：US11601173
申请日：2006-11-17
申请人： Jer-Shen Maa , David R. Evans , Jong-Jan Lee , Douglas J. Tweet , Sheng Teng Hsu
发明人： Jer-Shen Maa , David R. Evans , Jong-Jan Lee , Douglas J. Tweet , Sheng Teng Hsu
IPC分类号： H01L21/30 , H01L21/461
CPC分类号： H01L21/76251 , H01L21/84 , Y10S438/926 , Y10S438/933
摘要： A method is provided for transferring a single-crystal silicon (Si) film to a glass substrate. The method deposits a germanium (Ge)-containing material overlying a Si wafer, forming a sacrificial Ge-containing film. A single-crystal Si film is formed overlying the sacrificial Ge-containing film. The Si film surface is bonded to a transparent substrate, forming a bonded substrate. The bonded substrate is immersed in a Ge etching solution to remove the sacrificial Ge-containing film, which separates the transparent substrate from the Si wafer. The result is a transparent substrate with an overlying single crystal Si film. Optionally, channels can be formed to distribute the Ge etching solution, and promote the removal of the Ge-containing film.
摘要翻译：提供了将单晶硅（Si）膜转印到玻璃基板上的方法。该方法沉积覆盖Si晶片的含锗（Ge）的材料，形成牺牲含Ge膜。形成覆盖牺牲的含Ge膜的单晶Si膜。将Si膜表面粘合到透明基板上，形成键合衬底。将键合衬底浸入Ge蚀刻溶液中以除去将透明衬底与Si晶片分离的牺牲Ge含量膜。结果是具有上覆单晶Si膜的透明衬底。可选地，可以形成通道以分布Ge蚀刻溶液，并促进除去含Ge膜。

3. 发明授权

US07241670B2 Method to form relaxed SiGe layer with high Ge content using co-implantation of silicon with boron or helium and hydrogen 失效
标题翻译：使用硅与硼或氦和氢的共同注入形成具有高Ge含量的弛豫SiGe层的方法
公开(公告)号：US07241670B2
公开(公告)日：2007-07-10
申请号：US10936400
申请日：2004-09-07
申请人： Douglas J. Tweet , David R. Evans , Sheng Teng Hsu , Jer-Shen Maa
发明人： Douglas J. Tweet , David R. Evans , Sheng Teng Hsu , Jer-Shen Maa
IPC分类号： H01L21/26 , H01L21/42
CPC分类号： H01L21/02694 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L29/1054 , Y10S438/933
摘要： A method of forming a relaxed SiGe layer having a high germanium content in a semiconductor device includes preparing a silicon substrate; depositing a strained SiGe layer; implanting ions into the strained SiGe layer, wherein the ions include silicon ions and ions selected from the group of ions consisting of boron and helium, and which further includes implanting H+ ions; annealing to relax the strained SiGe layer, thereby forming a first relaxed SiGe layer; and completing the semiconductor device.
摘要翻译：在半导体器件中形成具有高锗含量的弛豫SiGe层的方法包括制备硅衬底; 沉积应变SiGe层; 将离子注入到应变SiGe层中，其中离子包括选自由硼和氦构成的离子组的硅离子和离子，并且还包括注入H +离子; 退火以使应变SiGe层松弛，从而形成第一弛豫SiGe层; 并完成半导体器件。

4. 发明授权

US07267996B2 Iridium etching for FeRAM applications 失效
标题翻译：用于FeRAM应用的铱蚀刻
公开(公告)号：US07267996B2
公开(公告)日：2007-09-11
申请号：US10923165
申请日：2004-08-20
申请人： Fengyan Zhang , David R. Evans , Wei Pan , Lisa H. Stecker , Jer-Shen Maa
发明人： Fengyan Zhang , David R. Evans , Wei Pan , Lisa H. Stecker , Jer-Shen Maa
IPC分类号： H01L21/467
CPC分类号： H01L21/32136 , H01L21/28291
摘要： A method of etching an iridium layer for use in a ferroelectric device includes preparing a substrate; depositing a barrier layer on the substrate; depositing an iridium layer on the barrier layer; depositing a hard mask layer on the iridium layer; depositing, patterning and developing a photoresist layer on the hard mask; etching the hard mask layer; etching the iridium layer using argon, oxygen and chlorine chemistry in a high-density plasma reactor; and completing the ferroelectric device.
摘要翻译：蚀刻用于铁电体器件的铱层的方法包括：制备衬底; 在衬底上沉积阻挡层; 在阻挡层上沉积铱层; 在铱层上沉积硬掩模层; 在硬掩模上沉积，图案化和显影光致抗蚀剂层; 蚀刻硬掩模层; 在高密度等离子体反应器中使用氩，氧和氯化学蚀刻铱层; 并完成铁电器件。

5. 发明授权

US07675056B2 Germanium phototransistor with floating body 有权
标题翻译：具有浮体的锗光电晶体管
公开(公告)号：US07675056B2
公开(公告)日：2010-03-09
申请号：US11891574
申请日：2007-08-10
申请人： Jong-Jan Lee , Sheng Teng Hsu , Jer-Shen Maa , Douglas J. Tweet
发明人： Jong-Jan Lee , Sheng Teng Hsu , Jer-Shen Maa , Douglas J. Tweet
IPC分类号： H01L29/06 , H01L31/072 , H01L31/109 , H01L31/0328 , H01L31/062 , H01L31/113 , H01L31/0232
CPC分类号： H01L31/1136 , H01L31/028 , H01L31/1808 , Y02E10/547
摘要： A floating body germanium (Ge) phototransistor and associated fabrication process are presented. The method includes: providing a silicon (Si) substrate; selectively forming an insulator layer overlying the Si substrate; forming an epitaxial Ge layer overlying the insulator layer using a liquid phase epitaxy (LPE) process; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers overlying the channel region; and, forming source/drain regions in the Ge layer. The LPE process involves encapsulating the Ge with materials having a melting temperature greater than a first temperature, and melting the Ge using a temperature lower than the first temperature. The LPE process includes: forming a dielectric layer overlying deposited Ge; melting the Ge; and, in response to cooling the Ge, laterally propagating an epitaxial growth front into the Ge from an underlying Si substrate surface.
摘要翻译：提出了一种浮体锗（Ge）光电晶体管及其制造工艺。该方法包括：提供硅（Si）衬底; 选择性地形成覆盖Si衬底的绝缘体层; 使用液相外延（LPE）工艺形成覆盖绝缘体层的外延Ge层; 在Ge层中形成沟道区; 形成覆盖所述沟道区的栅极电介质，栅电极和栅极间隔; 并且在Ge层中形成源/漏区。 LPE工艺包括用具有大于第一温度的熔化温度的材料包封Ge，并且使用低于第一温度的温度来熔化Ge。 LPE工艺包括：形成覆盖沉积Ge的介电层; 融化Ge; 并且响应于冷却Ge，将外延生长前沿从下面的Si衬底表面横向传播到Ge中。

6. 发明申请

US20080280426A1 Gallium nitride-on-silicon interface 审中-公开
标题翻译：氮化镓在硅界面
公开(公告)号：US20080280426A1
公开(公告)日：2008-11-13
申请号：US11801210
申请日：2007-05-09
申请人： Tingkai Li , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
发明人： Tingkai Li , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
IPC分类号： H01L29/739 , H01L21/20
CPC分类号： C30B29/406 , C30B25/183 , H01L21/02381 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L21/02642 , H01L21/02647 , H01L29/2003 , H01L29/267
摘要： A method is provided for forming a matching thermal expansion interface between silicon (Si) and gallium nitride (GaN) films. The method provides a (111) Si substrate and forms a first aluminum (Al)-containing film in compression overlying the Si substrate. Nano-column holes are formed in the first Al-containing film, which exposes regions of the underlying Si substrate. A layer of GaN layer is selectively grown from the exposed regions, covering the first Al-containing film. The GaN is grown using a lateral nanoheteroepitaxy overgrowth (LNEO) process. The above-mentioned processes are reiterated, forming a second Al-containing film in compression, forming nano-column holes in the second Al-containing film, and selectively growing a second GaN layer. Film materials such as Al2O3, Si1-xGex, InP, GaP, GaAs, AlN, AlGaN, or GaN, may be initially grown at a low temperature. By increasing the growth temperatures, a compressed layer of epitaxial GaN can be formed on a Si substrate.
摘要翻译：提供了一种在硅（Si）和氮化镓（GaN）膜之间形成匹配的热膨胀界面的方法。该方法提供（111）Si衬底并且在压缩覆盖Si衬底上形成第一含铝（Al）的膜。在第一含Al膜中形成纳米柱孔，其暴露下面的Si衬底的区域。从暴露区域选择性地生长GaN层，覆盖第一含Al膜。使用横向纳米外延生长（LNEO）工艺生长GaN。重复上述过程，在压缩中形成第二含Al膜，在第二含Al膜中形成纳米柱孔，并选择性地生长第二GaN层。可以最初在低温下生长诸如Al 2 O 3 3，Si 1-x Ge x，InP，GaP，GaAs，AlN，AlGaN或GaN的膜材料。通过增加生长温度，可以在Si衬底上形成外延GaN的压缩层。

7. 发明授权

US07351995B2 Floating body germanium phototransistor having a photo absorption threshold bias region 有权
标题翻译：具有光吸收阈值偏置区域的浮体锗光电晶体管
公开(公告)号：US07351995B2
公开(公告)日：2008-04-01
申请号：US11894938
申请日：2007-08-22
申请人： Sheng Teng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas J. Tweet
发明人： Sheng Teng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas J. Tweet
IPC分类号： H01L29/06 , H01L31/072 , H01L31/109 , H01L31/0328 , H01L31/062 , H01L31/113 , H01L31/0232
CPC分类号： H01L31/1136
摘要： A floating body germanium (Ge) phototransistor with a photo absorption threshold bias region, and an associated fabrication process are presented. The method includes: providing a p-doped Silicon (Si) substrate; selectively forming an insulator layer overlying a first surface of the Si substrate; forming an epitaxial Ge layer overlying the insulator layer; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers; forming source/drain (S/D) regions in the Ge layer; and, forming a photo absorption threshold bias region in the Ge layer, adjacent the channel region. In one aspect, the second S/D region has a length, longer than the first S/D length. The photo absorption threshold bias region underlies the second S/D region. Alternately, the second S/D region is separated from the channel by an offset, and the photo absorption threshold bias region is the offset in the Ge layer, after a light p-doping.
摘要翻译：提出了具有光吸收阈值偏置区域的浮体锗（Ge）光电晶体管，以及相关的制造工艺。该方法包括：提供p掺杂硅（Si）衬底; 选择性地形成覆盖在所述Si衬底的第一表面上的绝缘体层; 形成覆盖绝缘体层的外延Ge层; 在Ge层中形成沟道区; 形成栅极电介质，栅电极和栅极间隔物; 在Ge层中形成源极/漏极（S / D）区域; 并且在Ge层中形成邻近沟道区的光吸收阈值偏置区域。在一个方面，第二S / D区域具有比第一S / D长度更长的长度。光吸收阈值偏置区域位于第二S / D区域的下方。或者，第二S / D区域与沟道分离偏移，光吸收阈值偏置区域是在光p掺杂之后的Ge层中的偏移。

8. 发明授权

US06746902B2 Method to form relaxed sige layer with high ge content 有权
标题翻译：形成具有高Ge含量的轻松精神层的方法
公开(公告)号：US06746902B2
公开(公告)日：2004-06-08
申请号：US10062319
申请日：2002-01-31
申请人： Jer-Shen Maa , Douglas James Tweet , Sheng Teng Hsu
发明人： Jer-Shen Maa , Douglas James Tweet , Sheng Teng Hsu
IPC分类号： H01L2100
CPC分类号： H01L21/322 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02694 , Y10S438/933
摘要： A method of forming a SiGe layer having a relatively high Ge content includes preparing a silicon substrate; depositing a layer of SiGe to a thickness of between about 100 nm to 500 nm, wherein the Ge content of the SiGe layer is equal to or greater than 22%, by molecular weight; implanting H+ ions into the SiGe layer at a dose of between about 1·1016 cm−2 to 5·1016 cm−2, at an energy of between about 20 keV to 45 keV; thermal annealing the substrate and SiGe layer, to relax the SiGe layer, in an inert atmosphere at a temperature of between about 650° C. to 950° C. for between about 30 seconds and 30 minutes; and depositing a layer of tensile-strained silicon on the relaxed SiGe layer to a thickness of between about 5 nm to 30 nm.
摘要翻译：形成Ge含量较高的SiGe层的方法包括制备硅衬底; 将SiGe层沉积至约100nm至500nm的厚度，其中SiGe层的Ge含量通过分子量等于或大于22％; 以约20keV至45keV之间的能量以约1.10 16 cm -2至5.10 16 cm -2的剂量将H +离子注入SiGe层; 热处理基板和SiGe层，以在约650℃至950℃的温度的惰性气氛中放松SiGe层约30秒至30分钟; 以及在弛豫的SiGe层上沉积拉伸应变硅层至约5nm至30nm的厚度。

9. 发明授权

US06562703B1 Molecular hydrogen implantation method for forming a relaxed silicon germanium layer with high germanium content 失效
标题翻译：用于形成具有高锗含量的松弛硅锗层的分子氢注入方法
公开(公告)号：US06562703B1
公开(公告)日：2003-05-13
申请号：US10099374
申请日：2002-03-13
申请人： Jer-Shen Maa , Douglas J. Tweet , Sheng Teng Hsu , Jong-Jan Lee
发明人： Jer-Shen Maa , Douglas J. Tweet , Sheng Teng Hsu , Jong-Jan Lee
IPC分类号： H01L21265
CPC分类号： H01L21/263 , H01L21/02381 , H01L21/0245 , H01L21/02502 , H01L21/0251 , H01L21/02532 , H01L21/02694 , H01L29/1054 , Y10S438/933
摘要： A method is provided for forming a relaxed silicon germanium layer with a high germanium content on a silicon substrate. The method comprises: depositing a single-crystal silicon (Si) buffer layer overlying the silicon substrate; depositing a layer of single-crystal silicon germanium (Si1−xGex) overlying the Si buffer layer having a thickness of 1000 to 5000 Å; implanting the Si1−xGex layer with ionized molecular hydrogen (H2+) a projected range of approximately 100 to 300 Å into the underlying Si buffer layer; optionally, implanting the Si1−xGex layer with a species selected such as boron, He, or Si; annealing; and, in response to the annealing, converting the Si1−xGex layer to a relaxed Si1−xGex layer. Optionally, after annealing, an additional layer of single-crystal Si1−xGex having a thickness of greater than 1000 Å can be deposited overlying the relaxed layer of Si1−xGex.
摘要翻译：提供了一种在硅衬底上形成具有高锗含量的松弛硅锗层的方法。该方法包括：沉积覆盖硅衬底的单晶硅（Si）缓冲层; 沉积覆盖厚度为1000至5000的Si缓冲层的单晶硅锗层（Si1-xGex）; 将具有离子化分子氢（H 2 +）的Si 1-x Ge x层投射到下面的Si缓冲层中约100至300埃的投影范围; 任选地，将Si1-xGex层用诸如硼，氦或硅的物质进行注入; 退火; 并且响应于退火，将Si1-xGex层转化为弛豫的Si1-xGex层。任选地，在退火之后，可以沉积厚度大于的附加层的单晶Si1-xGex覆盖在Si1-xGex的松弛层上。

10. 发明授权

US07811913B2 Method of fabricating a low, dark-current germanium-on-silicon pin photo detector 有权
标题翻译：制造低，暗电流硅 - 硅引脚光电探测器的方法
公开(公告)号：US07811913B2
公开(公告)日：2010-10-12
申请号：US11312967
申请日：2005-12-19
申请人： Jong-Jan Lee , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
发明人： Jong-Jan Lee , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
IPC分类号： H01L21/265
CPC分类号： H01L31/105 , H01L31/1808 , H01L31/1864 , Y02E10/50 , Y02P70/521 , Y10S438/933
摘要： A method of fabricating a low, dark-current germanium-on-silicon PIN photo detector includes preparing a P-type silicon wafer; implanting the P-type silicon wafer with boron ions; activating the boron ions to form a P+ region on the silicon wafer; forming a boron-doped germanium layer on the P+ silicon surface; depositing an intrinsic germanium layer on the boron-doped germanium layer; cyclic annealing, including a relatively high temperature first anneal step and a relatively low temperature second anneal step; repeating the first and second anneal steps for about twenty cycles, thereby forcing crystal defects to the P+ germanium layer; implanting ions in the surface of germanium layer to form an N+ germanium surface layer and a PIN diode; activating the N+ germanium surface layer by thermal anneal; and completing device according to known techniques to form a low dark-current germanium-on-silicon PIN photodetector.
摘要翻译：制造低，暗电流锗硅PIN光检测器的方法包括制备P型硅晶片; 用硼离子注入P型硅晶片; 激活硼离子以在硅晶片上形成P +区; 在P +硅表面上形成硼掺杂锗层; 在硼掺杂的锗层上沉积本征锗层; 循环退火，包括相对高温的第一退火步骤和相对低温的第二退火步骤; 重复第一和第二退火步骤约20个循环，由此迫使晶体缺陷到P +锗层; 在锗层表面注入离子以形成N +锗表面层和PIN二极管; 通过热退火来活化N +锗表面层; 并根据已知技术完成器件以形成低暗电流锗硅PIN光电探测器。

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