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1. 发明授权

US07418068B2 Data capture technique for high speed signaling 失效
标题翻译：高速信号数据采集技术
公开(公告)号：US07418068B2
公开(公告)日：2008-08-26
申请号：US10468992
申请日：2002-02-25
申请人： Wayne Melvin Barrett , Dong Chen , Paul William Coteus , Alan Gene Gara , Rory Jackson , Gerard Vincent Kopcsay , Ben Jesse Nathanson , Paylos Michael Vranas , Todd E. Takken
发明人： Wayne Melvin Barrett , Dong Chen , Paul William Coteus , Alan Gene Gara , Rory Jackson , Gerard Vincent Kopcsay , Ben Jesse Nathanson , Paylos Michael Vranas , Todd E. Takken
IPC分类号： H04L7/00
CPC分类号： H05K7/20836 , F24F11/77 , G06F9/52 , G06F9/526 , G06F15/17381 , G06F17/142 , G09G5/008 , H04L7/0338
摘要： A data capture technique for high speed signaling to allow for optimal sampling of an asynchronous data stream. This technique allows for extremely high data rates and does not require that a clock be sent with the data as is done in source synchronous systems. The present invention also provides a hardware mechanism for automatically adjusting transmission delays for optimal two-bit simultaneous bi-directional (SiBiDi) signaling.
摘要翻译：用于高速信令的数据捕获技术，以允许异步数据流的最佳采样。这种技术允许极高的数据速率，并且不要求在源同步系统中进行数据发送时钟。本发明还提供了用于自动调整用于最佳两比特双向（SiBiDi）信令的传输延迟的硬件机制。

2. 发明申请

US20090028073A1 DATA CAPTURE TECHNIQUE FOR HGH SPEED SIGNALING 有权
标题翻译： HGH速度信号的数据采集技术
公开(公告)号：US20090028073A1
公开(公告)日：2009-01-29
申请号：US12191893
申请日：2008-08-14
申请人： Wayne Melvin Barrett , Dong Chen , Paul William Coteus , Alan Gene Gara , Rory Jackson , Gerard Vincent Kopcsay , Ben Jesse Nathanson , Pavlos Michael Vranas
发明人： Wayne Melvin Barrett , Dong Chen , Paul William Coteus , Alan Gene Gara , Rory Jackson , Gerard Vincent Kopcsay , Ben Jesse Nathanson , Pavlos Michael Vranas
IPC分类号： H04L5/14
CPC分类号： H05K7/20836 , F24F11/77 , G06F9/52 , G06F9/526 , G06F15/17381 , G06F17/142 , G09G5/008 , H04L7/0338
摘要： A data capture technique for high speed signaling to allow for optimal sampling of an asynchronous data stream. This technique allows for extremely high data rates and does not require that a clock be sent with the data as is done in source synchronous systems. The present invention also provides a hardware mechanism for automatically adjusting transmission delays for optimal two-bit simultaneous bi-directional (SiBiDi) signaling.
摘要翻译：用于高速信令的数据捕获技术，以允许异步数据流的最佳采样。这种技术允许极高的数据速率，并且不要求在源同步系统中进行数据发送时钟。本发明还提供了用于自动调整用于最佳两比特双向（SiBiDi）信令的传输延迟的硬件机制。

3. 发明授权

US6098176A Sinusoidal clock signal distribution using resonant transmission lines 失效
标题翻译：使用谐振传输线的正弦时钟信号分配
公开(公告)号：US6098176A
公开(公告)日：2000-08-01
申请号：US16788
申请日：1998-01-30
申请人： Paul William Coteus , Daniel Mark Dreps , Frank Ferraiolo , Gerard Vincent Kopcsay , Todd Edward Takken
发明人： Paul William Coteus , Daniel Mark Dreps , Frank Ferraiolo , Gerard Vincent Kopcsay , Todd Edward Takken
IPC分类号： G06F1/10 , G06F1/12
CPC分类号： G06F1/10
摘要： A clock signal distribution system is disclosed for providing synchronous clock signals to a plurality of electronic circuit devices. The system includes a clock signal generator means for providing a single frequency sinusoidal clock signal output and a plurality of electronic circuit devices. A clock signal distribution network including interconnected resonant segments of a transmission line 13 connected to the clock signal of the clock signal generator and to the plurality of electronic circuit devices for providing separate synchronous, phase aligned clock signals to the electronic circuit devices. The transmission line segments have lengths matched to the clock signal frequency wavelengths to eliminate clock signal distribution problems such as skew, jitter and pulse distortions.
摘要翻译：公开了一种用于向多个电子电路装置提供同步时钟信号的时钟信号分配系统。该系统包括用于提供单频正弦时钟信号输出的时钟信号发生器装置和多个电子电路装置。时钟信号分配网络，包括连接到时钟信号发生器的时钟信号的传输线路13的互连谐振段，以及多个电子电路装置，用于向电子电路装置提供单独的同步相位对准的时钟信号。传输线段具有与时钟信号频率波长匹配的长度，以消除诸如偏斜，抖动和脉冲失真的时钟信号分配问题。

4. 发明授权

US08604828B1 Variable voltage CMOS off-chip driver and receiver circuits 失效
标题翻译：可变电压CMOS片外驱动和接收电路
公开(公告)号：US08604828B1
公开(公告)日：2013-12-10
申请号：US08657849
申请日：1996-05-31
申请人： Harry Randall Bickford , Paul William Coteus , Robert Heath Dennard , Daniel Mark Dreps , Gerard Vincent Kopcsay
发明人： Harry Randall Bickford , Paul William Coteus , Robert Heath Dennard , Daniel Mark Dreps , Gerard Vincent Kopcsay
IPC分类号： H03K19/0175
CPC分类号： H03K19/0005 , H03K19/018521 , H03K19/018585
摘要： A structure is described having a plurality of electronic devices with the same or different internal CMOS voltages; an interconnection between two or more of the electronic devices; driver and receiver circuits which provide selectable input/output voltage levels for interfacing with several generations of CMOS technology, thus allowing chips fabricated in such technologies to communicate using a signal voltage range most suitable for each chip; Circuitry for selecting or adjusting the type of receiver circuit used, thus allowing either the use of a differential comparator circuit with an externally supplied reference voltage, or alternatively, the use of an inverter style receiver with an adjustable threshold, the selection being accomplished by setting the external reference to a predetermined voltage; Circuitry for selecting or adjusting the switching threshold of the inverter receiver circuit, which enables the threshold to be set appropriately for a given input signal voltage range.
摘要翻译：描述了具有多个具有相同或不同的内部CMOS电压的电子器件的结构; 两个或多个电子设备之间的互连; 驱动器和接收器电路，其提供用于与几代CMOS技术接口的可选输入/输出电压电平，从而允许以这种技术制造的芯片使用最适合于每个芯片的信号电压范围进行通信; 用于选择或调整所使用的接收器电路的类型的电路，从而允许使用具有外部提供的参考电压的差分比较器电路，或者使用具有可调阈值的逆变器式接收器，该选择通过设置外部参考预定电压; 用于选择或调整逆变器接收器电路的开关阈值的电路，其使得能够针对给定输入信号电压范围适当地设定阈值。

5. 发明授权

US6060905A Variable voltage, variable impedance CMOS off-chip driver and receiver interface and circuits 失效
标题翻译：可变电压，可变阻抗CMOS片外驱动器和接收器接口和电路
公开(公告)号：US6060905A
公开(公告)日：2000-05-09
申请号：US598084
申请日：1996-02-07
申请人： Harry Randall Bickford , Chin-An Chang , Paul William Coteus , Robert Heath Dennard , Daniel Mark Dreps , Gerard Vincent Kopcsay
发明人： Harry Randall Bickford , Chin-An Chang , Paul William Coteus , Robert Heath Dennard , Daniel Mark Dreps , Gerard Vincent Kopcsay
IPC分类号： H01L21/8238 , G11C11/407 , H01L27/092 , H03K19/00 , H03K19/0185 , H03K19/0175
CPC分类号： H03K19/018585 , H03K19/0005
摘要： An electronic apparatus is disclosed having: a plurality of electronic devices with the same or different internal voltages; an interconnection between two or more of the plurality of electronic devices; each of said two or more electronic devices has an internal voltage; driver and receiver circuits which send and receive signals at a selectable communication voltage levels for interfacing between said two or more electronic devices, at a common communication voltage which is less than the highest value of said internal voltages of said two or more electronic devices; a circuit for configuring the driver and receiver circuits; and the driver circuit are configured to have a substantially constant output impedance independent of their output voltage.
摘要翻译：公开了一种电子设备，其具有：具有相同或不同内部电压的多个电子设备; 所述多个电子设备中的两个或更多个之间的互连; 所述两个或更多个电子设备中的每一个具有内部电压; 驱动器和接收器电路，其以可选择的通信电压电平发送和接收信号，用于在所述两个或更多个电子设备的所述内部电压的最高值的公共通信电压下在所述两个或更多个电子设备之间进行接口; 用于配置驱动器和接收器电路的电路; 并且驱动器电路被配置为具有独立于其输出电压的基本上恒定的输出阻抗。

6. 发明授权

US08899060B2 Methods and apparatus for cooling electronics 有权
标题翻译：冷却电子元件的方法和装置
公开(公告)号：US08899060B2
公开(公告)日：2014-12-02
申请号：US13173082
申请日：2011-06-30
申请人： Shawn Anthony Hall , Gerard Vincent Kopcsay
发明人： Shawn Anthony Hall , Gerard Vincent Kopcsay
IPC分类号： H05K7/20 , G05D23/19 , G06F1/20
CPC分类号： G05D23/1919 , F25B49/02 , F25D17/02 , G06F1/206 , Y02D10/16
摘要： Methods and apparatus are provided for choosing an energy-efficient coolant temperature for electronics by considering the temperature dependence of the electronics' power dissipation. This dependence is explicitly considered in selecting the coolant temperature T0 that is sent to the equipment. To minimize power consumption PTotal for the entire system, where PTotal=P0+PCool is the sum of the electronic equipment's power consumption P0 plus the cooling equipment's power consumption PCool, PTotal is obtained experimentally, by measuring P0 and PCool, as a function of three parameters: coolant temperature T0; weather-related temperature T3 that affects the performance of free-cooling equipment; and computational state C of the electronic equipment, which affects the temperature dependence of its power consumption. This experiment provides, for each possible combination of T3 and C, the value T0* of T0 that minimizes PTotal. During operation, for any combination of T3 and C that occurs, the corresponding optimal coolant temperature T0* is selected, and the cooling equipment is commanded to produce it.
摘要翻译：提供了通过考虑电子设备功耗的温度依赖性来选择用于电子设备的节能冷却剂温度的方法和装置。在选择发送到设备的冷却剂温度T0时，明确考虑到这种依赖性。为了最大限度地降低功耗PT total为整个系统，其中PTotal = P0 + PCool是电子设备功耗P0加冷却设备功耗PCool的总和，PTotal通过实验得到，通过测量P0和PCool作为三个函数参数：冷却液温度T0; 影响自由冷却设备性能的天气相关温度T3; 和电子设备的计算状态C，影响其功耗的温度依赖性。该实验为T3和C的每个可能的组合提供使PTotal最小化的T0的值T0 *。在运行期间，对于发生的T3和C的任何组合，选择相应的最佳冷却剂温度T0 *，并命令冷却设备进行生产。

7. 发明申请

US20130006427A1 METHODS AND APPARATUS FOR COOLING ELECTRONICS 有权
标题翻译：冷却电子的方法和装置
公开(公告)号：US20130006427A1
公开(公告)日：2013-01-03
申请号：US13173082
申请日：2011-06-30
申请人： Shawn Anthony Hall , Gerard Vincent Kopcsay
发明人： Shawn Anthony Hall , Gerard Vincent Kopcsay
IPC分类号： G05D23/19 , G05D7/06
CPC分类号： G05D23/1919 , F25B49/02 , F25D17/02 , G06F1/206 , Y02D10/16
摘要： Methods and apparatus are provided for choosing an energy-efficient coolant temperature for electronics by considering the temperature dependence of the electronics' power dissipation. This dependence is explicitly considered in selecting the coolant temperature T0 that is sent to the equipment. To minimize power consumption PTotal for the entire system, where PTotal=P0+PCool is the sum of the electronic equipment's power consumption P0 plus the cooling equipment's power consumption PCool, PTotal is obtained experimentally, by measuring P0 and PCool, as a function of three parameters: coolant temperature T0; weather-related temperature T3 that affects the performance of free-cooling equipment; and computational state C of the electronic equipment, which affects the temperature dependence of its power consumption. This experiment provides, for each possible combination of T3 and C, the value T*0 of T0 that minimizes PTotal. During operation, for any combination of T3 and C that occurs, the corresponding optimal coolant temperature T*0 is selected, and the cooling equipment is commanded to produce it.
摘要翻译：提供了通过考虑电子设备功耗的温度依赖性来选择用于电子设备的节能冷却剂温度的方法和装置。在选择发送到设备的冷却剂温度T0时，明确考虑到这种依赖性。为了最大限度地降低功耗PT total为整个系统，其中PTotal = P0 + PCool是电子设备功耗P0加冷却设备功耗PCool的总和，PTotal通过实验得到，通过测量P0和PCool作为三个函数参数：冷却液温度T0; 影响自由冷却设备性能的天气相关温度T3; 和电子设备的计算状态C，影响其功耗的温度依赖性。该实验为T3和C的每个可能的组合提供了将PTotal最小化的T0的值T * 0。在运行期间，对于发生的T3和C的任何组合，选择相应的最佳冷却剂温度T * 0，并且命令冷却设备进行生产。

8. 发明授权

US06342823B1 System and method for reducing calculation complexity of lossy, frequency-dependent transmission-line computation 失效
标题翻译：用于降低有损耗，频率依赖传输线计算的计算复杂度的系统和方法
公开(公告)号：US06342823B1
公开(公告)日：2002-01-29
申请号：US09140643
申请日：1998-08-26
申请人： Allan Harvey Dansky , Alina Deutsch , Gerard Vincent Kopcsay , Phillip John Restle , Howard Harold Smith
发明人： Allan Harvey Dansky , Alina Deutsch , Gerard Vincent Kopcsay , Phillip John Restle , Howard Harold Smith
IPC分类号： H01P500
CPC分类号： G06F17/5036
摘要： A method and system for reducing the computation complexity and improving accuracy of delay and crosstalk calculation in transmission-lines with frequency-dependent losses. An analysis tool based on restricted coupled-line topologies, simple two-dimensional to three-dimensional RLC matrix conversion, and use of prestored synthesized circuits that accurately capture frequency-dependent loss effects. The CAD tool can handle frequency-dependent resistive and inductive effects for coupled-interconnections on large microprocessor chips with >10K of critical nets. This is done in an interactive manner during the design cycle and allows first path fast product design.
摘要翻译：一种降低计算复杂度，提高频率依赖损耗的传输线延迟和串扰计算精度的方法和系统。基于限制耦合线拓扑的分析工具，简单的二维至三维RLC矩阵转换，以及使用准备捕获频率相关损耗效应的预存储合成电路。 CAD工具可以处理具有> 10K关键网络的大型微处理器芯片上的耦合互连的频率相关电阻和电感效应。这在设计周期中以交互的方式完成，并允许第一路径快速产品设计。

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