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    • 5. 发明申请
    • SYSTEM, METHOD AND STORAGE MEDIUM FOR PREFETCHING VIA MEMORY BLOCK TAGS
    • 用于通过存储块标签进行预制的系统,方法和存储介质
    • US20070204109A1
    • 2007-08-30
    • US11743697
    • 2007-05-03
    • Peter FranaszekLuis Lastras
    • Peter FranaszekLuis Lastras
    • G06F12/00
    • G06F12/0862
    • A method and system for memory management are provided. The system includes a tag cache in communication with one or more cache devices in a storage hierarchy. The tag cache includes tags of recently accessed memory blocks, each tag corresponding to one of the memory blocks and including tag contents. The tag contents control which memory lines of the corresponding memory block are prefetched into at least one of the cache devices. The tag contents further include a bit to control prefetching of memory lines from a next virtual memory block, the bit referred to as a next virtual memory block bit. The next virtual memory block bit in a preceding memory block in a virtual address space is set to a prefetch status when the preceding memory block tag is in the tag cache.
    • 提供了一种用于存储器管理的方法和系统。 该系统包括与存储层级中的一个或多个缓存设备通信的标签缓存。 标签缓存包括最近访问的存储器块的标签,每个标签对应于一个存储器块并且包括标签内容。 标签内容控制对应的存储器块的哪些存储器行被预取到至少一个高速缓存器件中。 标签内容还包括用于控制来自下一个虚拟存储器块的存储器行预取的位,该位被称为下一个虚拟存储器块位。 虚拟地址空间中前一个存储块中的下一个虚拟内存块位被设置为当前一个存储块标记位于标记高速缓存中时的预取状态。
    • 8. 发明申请
    • SYSTEM, METHOD AND STORAGE MEDIUM FOR PREFETCHING VIA MEMORY BLOCK TAGS
    • 用于通过存储块标签进行预制的系统,方法和存储介质
    • US20080059714A1
    • 2008-03-06
    • US11936414
    • 2007-11-07
    • Peter FranaszekLuis Lastras
    • Peter FranaszekLuis Lastras
    • G06F12/00G06F13/00
    • G06F12/0862
    • A system for memory management including a tag cache in communication with one or more cache devices in a storage hierarchy is provided. The tag cache includes tags of recently accessed memory blocks, each tag corresponding to one of the memory blocks and each tag including tag contents. The tag contents include a memory block real address and one bit for every memory line in the memory block. The bits are referred to as prefetch bits. Each of the prefetch bits is reset to a non-prefetch status with a selected probability of between zero and one. The tag contents control which memory lines of the corresponding memory block are prefetched into at least one of the cache devices. The tag contents are updated using a selected subset of processor references. The subset is referred to as filtered references. The tag contents are modified probabilistically at selected times or events.
    • 提供了一种用于存储器管理的系统,其包括与存储层级中的一个或多个高速缓存设备通信的标签高速缓存。 标签缓存包括最近访问的存储块的标签,每个标签对应于一个存储器块,每个标签包括标签内容。 标签内容包括存储器块实际地址和存储器块中每个存储器线的一位。 这些位被称为预取位。 每个预取位被复位到具有0和1之间的所选概率的非预取状态。 标签内容控制对应的存储器块的哪些存储器行被预取到至少一个高速缓存器件中。 使用选定的处理器引用子集来更新标签内容。 该子集称为过滤引用。 标签内容在选定的时间或事件中被概率地修改。
    • 9. 发明授权
    • Page descriptors for prefetching and memory management
    • 页面描述符用于预取和内存管理
    • US07334088B2
    • 2008-02-19
    • US10326634
    • 2002-12-20
    • Peter Franaszek
    • Peter Franaszek
    • G06F12/00G06F15/00
    • G06F12/0862G06F2212/6022G06F2212/6024
    • A computer system and a method for enhancing the cache prefetch behavior. A computer system including a processor, a main memory, a prefetch controller, a cache memory, a prefetch buffer, and a main memory, wherein each page in the main memory has associated with it a tag, which is used for controling the prefetching of a variable subset of lines from this page as well as lines from at least one other page. And, coupled to the processor is a prefetch controller, wherein the prefetch controller responds to the processor determining a fault (or miss) occurred to a line of data by fetching a corresponding line of data with the corresponding tag, with the corresponding tag to be stored in the prefetch buffer, and sending the corresponding line of data to the cache memory.
    • 一种用于增强缓存预取行为的计算机系统和方法。 一种包括处理器,主存储器,预取控制器,高速缓冲存储器,预取缓冲器和主存储器的计算机系统,其中主存储器中的每个页面与其相关联,该标签用于控制预取 来自该页面的行的可变子集以及至少一个其他页面的行。 并且,耦合到处理器的是预取控制器,其中预取控制器响应于处理器确定一行数据发生的故障(或未命中),通过相应的标签获取相应的数据行,相应的标签为 存储在预取缓冲器中,并将相应的数据行发送到高速缓冲存储器。