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    • 3. 发明授权
    • Method of generating a blockiness indicator for a video signal
    • 产生视频信号的块效应指示符的方法
    • US09131213B2
    • 2015-09-08
    • US12203433
    • 2008-09-03
    • Jeff WeiRakesh Patel
    • Jeff WeiRakesh Patel
    • H04N7/26H04N17/00H04N19/86H04N19/17H04N19/82
    • H04N19/176H04N7/0155H04N17/004H04N19/167H04N19/17H04N19/182H04N19/66H04N19/82H04N19/86H04N19/865H04N19/88
    • The described embodiments relate to methods and systems for detecting the blockiness of a video signal comprised of a number of pixels. The method includes the steps of calculating a total number of pixels in the video signal in flat blocks and visible block edge transitions, and generating a blockiness indicator from the total number of pixels in flat blocks and visible block edge transitions. The step of calculating the total number of pixels in flat blocks and the total number of pixels in visible block edge transitions may include calculating differential values for each pixel in the video signal, analyzing the differential values to determine if the pixel is part of a transition and/or a flat area and then counting the number of pixels in flat blocks and visible block edge transitions to produce a total number of pixels in flat blocks and a total number of pixels in visible block edge transitions.
    • 所描述的实施例涉及用于检测包括多个像素的视频信号的块效应的方法和系统。 该方法包括以下步骤:在平面块和可见块边缘转换中计算视频信号中的像素总数,并从平面块和可见块边缘转换中的像素总数生成块状指示符。 计算平面块中的像素总数和可见块边缘转换中的像素总数的步骤可以包括计算视频信号中每个像素的差分值,分析差分值以确定像素是否是转变的一部分 和/或平坦区域,然后对平坦块和可见块边缘过渡中的像素数进行计数,以产生平坦块中的像素总数和可见块边缘转换中的像素总数。
    • 5. 发明申请
    • ASSISTED STAIR TRAINING MACHINE AND METHODS OF USING
    • 辅助平台培训机及其使用方法
    • US20110177917A1
    • 2011-07-21
    • US13075987
    • 2011-03-30
    • Rakesh Patel
    • Rakesh Patel
    • A63B22/00
    • A63B23/0405A63B21/00181A63B23/0417A63B23/0458A63B2022/0094A63B2023/006A63B2071/009A63B2220/56A63B2225/093A63B2230/06
    • A method of performing a stair-training exercise. The method includes the steps of placing a foot of an affected leg on a stationary platform having a planar upper surface positioned parallel to a reference plane and at a predetermined distance above the reference plane; placing a foot of the other leg on a movable platform having a planar upper surface and being configured to move from a first position, wherein the planar upper surface of the movable platform is substantially level with the reference plane, to a second position, wherein the planar upper surface of the movable platform is substantially level with the planar upper surface of the stationary platform; and moving the movable platform between the first position and the second position using a lifting mechanism.
    • 执行台阶训练的方法。 该方法包括以下步骤:将受影响的脚的脚放置在具有平行的上表面的固定平台上,该平面上表面平行于参考平面并且在参考平面上方预定的距离; 将另一条腿的脚放置在具有平坦上表面的可移动平台上,并且构造成从第一位置移动,其中可移动平台的平面上表面与参考平面基本平齐,到第二位置,其中, 可移动平台的平面上表面与固定平台的平面上表面基本平齐; 以及使用提升机构在所述第一位置和所述第二位置之间移动所述可移动平台。
    • 7. 发明申请
    • Assisted Stair Training Machine and Methods of Using
    • 辅助楼梯训练机及使用方法
    • US20100099541A1
    • 2010-04-22
    • US12603581
    • 2009-10-21
    • Rakesh Patel
    • Rakesh Patel
    • A63B22/04
    • A63B23/0405A63B21/00181A63B23/0417A63B23/0458A63B2022/0094A63B2023/006A63B2071/009A63B2220/56A63B2225/093A63B2230/06
    • An assisted stair training machine. The machine includes a stationary platform having a planar upper surface positioned parallel to a reference plane and at a predetermined distance above the reference plane; a movable platform having a planar upper surface and being configured to move from a first position to a second position, and a lifting mechanism. The planar upper surface of the movable platform is substantially level with the reference plane in the first position, and the planar upper surface of the movable platform is substantially level with the planar upper surface of the stationary platform in the second position. The lifting mechanism is configured to move the movable platform from the first position to the second position and from the second position back to the first position at a predetermined speed.
    • 辅助楼梯训练机。 该机器包括固定平台,该固定平台具有平行的上表面,该平面上表面平行于参考平面并且在参考平面上方预定距离; 具有平面上表面并且被构造成从第一位置移动到第二位置的可移动平台和提升机构。 可移动平台的平面上表面基本上与第一位置中的参考平面平齐,并且可移动平台的平面上表面与第二位置中的固定平台的平面上表面基本平齐。 提升机构构造成将可移动平台从第一位置移动到第二位置,并且以预定速度从第二位置移动到第一位置。
    • 9. 发明授权
    • Programmable transceivers that are able to operate over wide frequency ranges
    • 能够在宽频率范围内工作的可编程收发器
    • US07539278B2
    • 2009-05-26
    • US11292565
    • 2005-12-02
    • Sergey Yuryevich ShumarayevRakesh Patel
    • Sergey Yuryevich ShumarayevRakesh Patel
    • H03D3/24
    • H03K19/17744H03L7/0995
    • A field-programmable gate array (“FPGA”) may include data receiver and/or transmitter circuitry that is adapted to receive and/or transmit data at any frequency(ies) or data rate(s) in a wide range of possible frequencies or data rates. Phase-locked loop (PLL) circuitry may be needed for operation of such receiver and/or transmitter circuitry. For satisfactory operation over the wide frequency range, multiple PLL circuits are provided. One of these PLL circuits may be capable of operating over the entire frequency range, possibly with better jitter performance in some portions of the range than in other portions of the range. One or more other PLL circuits may be provided that are focused on particular parts of the broad range, especially where the jitter performance of the first-mentioned PLL may not be adequate to meet some possible needs.
    • 现场可编程门阵列(“FPGA”)可以包括数据接收器和/或发射机电路,其适于在宽范围的可能频率中以任何频率或数据速率接收和/或发射数据,或 数据速率。 可能需要锁相环(PLL)电路来操作这种接收器和/或发射器电路。 为了在宽频率范围内的令人满意的操作,提供了多个PLL电路。 这些PLL电路中的一个可能能够在整个频率范围内运行,可能在该范围的某些部分中具有比该范围的其他部分更好的抖动性能。 可以提供一个或多个其他PLL电路,其集中在宽范围的特定部分上,特别是在首先提到的PLL的抖动性能可能不足以满足一些可能需要的地方。
    • 10. 发明授权
    • Apparatus and method for reset distribution
    • 复位分配的装置和方法
    • US07343569B1
    • 2008-03-11
    • US11351425
    • 2006-02-10
    • John LamArch ZaliznyakChong LeeRakesh PatelVinson Chan
    • John LamArch ZaliznyakChong LeeRakesh PatelVinson Chan
    • G06F17/50
    • G06F17/5054G06F2217/66
    • A skew-tolerant, glitch-free reset distribution apparatus and method are provided in an intellectual property (IP) block that supports a multi-channel input/output protocol. During reset mode, synchronizers are used to create more predictable timing, to pipeline the propagation delay, and to tolerate RC-induced skews of up to a clock period in routing a reset signal to all the channels and within the channels in an IP block. Two control signals, which are available from programmable logic resource core circuitry, are used to control the input of the reset signal into the IP block. Because the control signals are designed to be glitch-free, the reset signal is therefore also glitch-free, thus preventing the IP block from inadvertently transitioning into or out of reset mode.
    • 在支持多通道输入/输出协议的知识产权(IP)块中提供了容错,无毛刺的复位分配装置和方法。 在复位模式期间,使用同步器创建更可预测的时序,流水线传播延迟,并允许在将复位信号路由到IP模块中的所有通道和通道内的RC时钟周期的RC引起的偏差。 两个控制信号可从可编程逻辑资源核心电路获得,用于控制复位信号输入到IP模块。 由于控制信号被设计为无毛刺,因此复位信号也无毛刺,从而防止IP块无意中转换或复位。