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1. 发明专利

JP2007336534A Single stage balanced voltage amplifier 审中-公开
标题翻译：单级平衡电压放大器
公开(公告)号：JP2007336534A
公开(公告)日：2007-12-27
申请号：JP2007143426
申请日：2007-05-30
申请人： Chi Ming John Lam , ラム・チ・ミン・ジョンLAM Chi Ming John
发明人： LAM CHI MING JOHN
IPC分类号： H03F1/24 , H03F3/45
CPC分类号： H03F3/52 , H03F3/45 , H03F2203/45291 , H03F2203/45318 , H03F2203/45338 , H03F2203/45372 , H03F2203/45631
摘要： PROBLEM TO BE SOLVED: To provide a single stage balanced voltage amplifier to achieve a high signal gain while holding an output impedance low.
SOLUTION: The balanced voltage amplifier includes a single stage having three pairs of vacuum tube triodes for amplifying two input signals (+ Input and - Input), and generating two output signals (+ Output and - Output). The balanced voltage amplifier provides a high voltage gain, wide bandwidth and low output impedance. A local feedback may be provided between the outputs and a second pair of the vacuum tube triodes. An overall feedback may be provided between the outputs and a first pair of the vacuum tube triodes. With the use of the local or overall feedback, further broadening the bandwidth and lowering the output impedance improve the overall balancing.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供单级平衡电压放大器，以在保持输出阻抗低的同时实现高信号增益。
解决方案：平衡电压放大器包括一个单级，具有三对用于放大两个输入信号（+输入和 - 输入）的真空管三极管，并产生两个输出信号（+输出和 - 输出）。平衡电压放大器提供高电压增益，宽带宽和低输出阻抗。可以在输出端和第二对真空管三极管之间提供局部反馈。可以在输出和第一对真空管三极管之间提供总体反馈。通过使用本地或整体反馈，进一步拓宽带宽和降低输出阻抗，提高整体平衡。版权所有（C）2008，JPO＆INPIT

2. 发明专利

JP2007184918A Balanced amplifier 审中-公开
标题翻译：平衡放大器
公开(公告)号：JP2007184918A
公开(公告)日：2007-07-19
申请号：JP2006349684
申请日：2006-12-26
申请人： Chi Ming John Lam , ラム・チ・ミン・ジョンLAM Chi Ming John
发明人： LAM CHI MING JOHN
IPC分类号： H03F3/22 , H03F1/36 , H03F3/181 , H03F3/28 , H03F3/45
CPC分类号： H03F3/22 , H03F3/45
摘要： PROBLEM TO BE SOLVED: To provide a novel balanced amplifier available for a power amplifier comprising a vacuum valve for characteristic enhancement.
SOLUTION: A balanced amplifier includes a first stage which is connected with a second stage and outputs signals to the second stage, and the first stage includes a first differential amplifier which receives a balanced input signal and comprises two sets of feedback loops. At least one set of feedback loops feeds part of signals output from the second stage back to the first differential amplifier. The second stage includes a second differential amplifier for amplifying signals received from the first stage and holds the balanced signal.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供可用于功率放大器的新型平衡放大器，其包括用于特征增强的真空阀。解决方案：平衡放大器包括与第二级连接并将信号输出到第二级的第一级，并且第一级包括接收平衡输入信号并包括两组反馈回路的第一差分放大器。至少一组反馈回路将从第二级输出的信号的一部分返回到第一差分放大器。第二级包括用于放大从第一级接收的信号并保持平衡信号的第二差分放大器。版权所有（C）2007，JPO＆INPIT

3. 发明授权

US09338843B2 High power factor, electrolytic capacitor-less driver circuit for light-emitting diode lamps 有权
标题翻译：高功率因数，无电解电容器的驱动电路，用于发光二极管灯
公开(公告)号：US09338843B2
公开(公告)日：2016-05-10
申请号：US14219692
申请日：2014-03-19
申请人： Praveen K. Jain , John Lam
发明人： Praveen K. Jain , John Lam
IPC分类号： H05B33/08 , H02M1/42 , H05B41/282
CPC分类号： H05B33/0815 , H02M1/4258 , H05B41/282
摘要： A driver circuit for use with LED lamps. The driver circuit uses a rectifier, a power factor correction subcircuit, a voltage conversion subcircuit, and a semiconductor switch. The power factor correction subcircuit uses a film capacitor instead of an electrolytic capacitor. As well, the power factor correction subcircuit uses either an inductor or a transformer to shape the incoming current to a substantially sinusoidal waveform that is in phase with the input AC current. The semiconductor switch provides a high frequency pulsating triangular current at the output of the rectifier.
摘要翻译：用于LED灯的驱动电路。驱动器电路使用整流器，功率因数校正子电路，电压转换子电路和半导体开关。功率因数校正子电路使用薄膜电容器而不是电解电容器。同样，功率因数校正子电路使用电感器或变压器将输入电流整形为与输入AC电流同相的基本正弦波形。半导体开关在整流器的输出端提供高频脉动三角形电流。

4. 发明授权

US08416583B2 Energy output circuit and its control method 有权
标题翻译：能量输出电路及其控制方法
公开(公告)号：US08416583B2
公开(公告)日：2013-04-09
申请号：US12809668
申请日：2008-11-14
申请人： John Lam
发明人： John Lam
IPC分类号： H02M3/335
CPC分类号： H02M3/33507 , H02M5/293
摘要： An energy output circuit and its control method includes a switch device (2), a transformer (4) and a controller (1). The switch device (2) is connected between a primary of the transformer (4) and an input power source in series. The controller (1) calculates an energy output waveform and sends a command according to a request or a level to control the switch device (2), to control the on/off time of the primary of the transformer (4). The transformer (4) is an ordinary low-frequency transformer.
摘要翻译：能量输出电路及其控制方法包括开关装置（2），变压器（4）和控制器（1）。开关装置（2）连接在变压器（4）的主电源和串联的输入电源之间。控制器（1）计算能量输出波形并根据请求或电平发送命令以控制开关装置（2），以控制变压器（4）的初级开关时间。变压器（4）是普通的低频变压器。

5. 发明申请

US20120138501A1 Receptacle for Produce 审中-公开
标题翻译：产品插座
公开(公告)号：US20120138501A1
公开(公告)日：2012-06-07
申请号：US13154555
申请日：2011-06-07
申请人： John Lam
发明人： John Lam
IPC分类号： B65D85/00 , B65B61/00
CPC分类号： B65D1/34 , B65D25/205 , B65D2203/02 , B65D2203/06
摘要： The present invention relates to a receptacle for produce. The receptacle includes a side wall and a label area for a label including a code. The label area is substantially flat and located on the side wall. The label is adapted to be adhered to the label area. The wall is disposed at a selected acute angle to the vertical so as to facilitate reading of the code by a code reader.
摘要翻译：本发明涉及一种用于生产的容器。插座包括侧壁和用于包括代码的标签的标签区域。标签区域基本上平坦且位于侧壁上。该标签适于粘贴到标签区域。墙壁以垂直方向设置成锐角，以便于通过代码阅读器读取代码。

6. 发明授权

US07482867B2 Single stage balanced voltage amplifier 失效
标题翻译：单级平衡电压放大器
公开(公告)号：US07482867B2
公开(公告)日：2009-01-27
申请号：US11748508
申请日：2007-05-15
申请人： Chi Ming John Lam
发明人： Chi Ming John Lam
IPC分类号： H03F3/45
CPC分类号： H03F3/52 , H03F3/45 , H03F2203/45291 , H03F2203/45318 , H03F2203/45338 , H03F2203/45372 , H03F2203/45631
摘要： A balanced voltage amplifier is disclosed as comprising a single stage containing three pairs of vacuum tube triodes configured to amplify two input signals (+INPUT, −INPUT) and to generate two output signals (+OUTPUT, −OUTPUT). The balanced voltage amplifier offers high voltage gain, wide bandwidth and low output impedance. Local feedback may be applied between the outputs and the second pair of triodes. Overall feedback may be applied between the outputs and the first pair of triodes. If local or overall feedback is used, it will further broaden the bandwidth, lower the output impedance and improve the overall balancing.
摘要翻译：公开了一种平衡电压放大器，其包括单个级，其包含三对配置成放大两个输入信号（+ INPUT，-INPUT）并产生两个输出信号（+ OUTPUT，-OUTPUT）的真空管三极管。平衡电压放大器提供高电压增益，宽带宽和低输出阻抗。可以在输出和第二对三极管之间应用局部反馈。可以在输出和第一对三极管之间应用总体反馈。如果使用本地或整体反馈，它将进一步扩大带宽，降低输出阻抗并改善整体平衡。

7. 发明授权

US07304535B2 Balanced amplifier 失效
公开(公告)号：US07304535B2
公开(公告)日：2007-12-04
申请号：US11351764
申请日：2006-02-10
申请人： Chi Ming John Lam
发明人： Chi Ming John Lam
IPC分类号： H03F3/45
CPC分类号： H03F3/22 , H03F3/45
摘要： A balanced amplifier is disclosed as comprising an input stage connected with a second stage, in which the input stage outputs signals to the second stage, and the first stage includes a first differential amplifier for receiving balanced input signals and is provided with two pairs of feedback loops, at least one of the pair of feedback loops for feedbacking part of signals outputted by the second stage to the first differential amplifier, and the second stage includes a second differential amplifier for amplifying signals received from the first stage and for maintaining the balanced signals.

8. 发明申请

US20060222871A1 Method for lowering deposition stress, improving ductility, and enhancing lateral growth in electrodeposited iron-containing alloys 审中-公开
标题翻译：降低沉积应力，改善延展性和增强电沉积含铁合金的横向生长的方法
公开(公告)号：US20060222871A1
公开(公告)日：2006-10-05
申请号：US11097538
申请日：2005-03-31
申请人： Christian Bonhote , John Lam , Lubomyr Romankiw , Xiaoyan Shao
发明人： Christian Bonhote , John Lam , Lubomyr Romankiw , Xiaoyan Shao
IPC分类号： B32B15/04 , C25D5/18
CPC分类号： C25D5/18 , C25D3/562 , Y10T428/31678
摘要： The present invention provides an electrodeposition/plating method for metal films and alloys in a bath which contain ferric ions and which usually deposit with high stress, but which when electrodeposited under pulse plating conditions in the presence of low valence vanadium or other ions capable of existing in multiple valence states produce low stress films and alloys and furthermore when plated through a mask creep laterally through walls and creep laterally along the surface of the mask to permit formation of overhangers, bridges, heat exchangers, and other complex three dimensional micro structures of low stress.
摘要翻译：本发明提供了一种用于金属膜和合金的电沉积/电镀方法，其中含有铁离子并且通常以高应力沉积的金属膜和合金，但是当在低价钒或其它能够存在的其它离子的存在下在脉冲电镀条件下电沉积时在多价态下产生低应力膜和合金，此外当通过掩模电镀通过壁横向穿过壁并沿着掩模的表面横向蠕变以允许形成悬臂，桥，热交换器以及其它复杂的三维微结构强调。

9. 发明授权

US07028270B1 Apparatus and method for reset distribution 失效
标题翻译：复位分配的装置和方法
公开(公告)号：US07028270B1
公开(公告)日：2006-04-11
申请号：US10621074
申请日：2003-07-15
申请人： John Lam , Arch Zaliznyak , Chong Lee , Rakesh Patel , Vinson Chan
发明人： John Lam , Arch Zaliznyak , Chong Lee , Rakesh Patel , Vinson Chan
IPC分类号： G06F17/50
CPC分类号： G06F17/5054 , G06F2217/66
摘要： A skew-tolerant, glitch-free reset distribution apparatus and method are provided in an intellectual property (IP) block that supports a multi-channel input/output protocol. During reset mode, synchronizers are used to create more predictable timing, to pipeline the propagation delay, and to tolerate RC-induced skews of up to a clock period in routing a reset signal to all the channels and within the channels in an IP block. Two control signals, which are available from programmable logic resource core circuitry, are used to control the input of the reset signal into the IP block. Because the control signals are designed to be glitch-free, the reset signal is therefore also glitch-free, thus preventing the IP block from inadvertently transitioning into or out of reset mode.
摘要翻译：在支持多通道输入/输出协议的知识产权（IP）块中提供了容错，无毛刺的复位分配装置和方法。在复位模式期间，使用同步器创建更可预测的时序，流水线传播延迟，并允许在将复位信号路由到IP模块中的所有通道和通道内的RC时钟周期的RC引起的偏差。两个控制信号可从可编程逻辑资源核心电路获得，用于控制复位信号输入到IP模块。由于控制信号被设计为无毛刺，因此复位信号也无毛刺，从而防止IP块无意中转换或复位。

10. 发明授权

US06970117B1 Byte alignment for serial data receiver 失效
标题翻译：串行数据接收器的字节对齐
公开(公告)号：US06970117B1
公开(公告)日：2005-11-29
申请号：US10789406
申请日：2004-02-26
申请人： Henry Y. Lui , Chong H. Lee , Rakesh Patel , Ramanand Venkata , John Lam , Vinson Chan , Malik Kabani
发明人： Henry Y. Lui , Chong H. Lee , Rakesh Patel , Ramanand Venkata , John Lam , Vinson Chan , Malik Kabani
IPC分类号： H03M9/00 , H04L7/02
CPC分类号： H04L7/0054 , H03M9/00
摘要： A serial data interface for a programmable logic device includes a receiver that deserializes a plurality of channels of received serial data using a recovered clock signal or a phase-aligned received clock signal. Byte boundaries are initially assigned, perhaps arbitrarily, and the deserialized signal is sent to the programmable logic core of the programmable logic device. Programmable logic in the core monitors the byte boundaries on each channel based on the criteria, including any user-defined parameters, programmed into the logic. If a boundary misalignment is detected, a signal is send from the core to bit-slipping circuitry on that channel of the interface to adjust the boundary. The signal could instruct the bit-slipping circuitry to adjust the boundary by the number of bits needed to correct the alignment. Alternatively, the bit-slipping circuitry could operate iteratively, adjusting the boundary by one bit, each cycle, until the signal stops indicating misalignment.
摘要翻译：用于可编程逻辑器件的串行数据接口包括使用恢复的时钟信号或相位对准的接收时钟信号对接收的串行数据的多个信道反串行的接收器。字节边界最初可以任意分配，反序列化信号被发送到可编程逻辑器件的可编程逻辑核心。内核中的可编程逻辑基于标准（包括任何用户定义的参数）来监视每个通道上的字节边界，编程到逻辑中。如果检测到边界未对准，则在该接口的该通道上将信号从核心发送到位滑动电路以调整边界。信号可以指示位滑动电路将边界调整校正对准所需的位数。或者，位打滑电路可以迭代地操作，每个周期将边界调整一个位，直到信号停止指示未对准。

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