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1. 发明授权

US09059245B2 Semiconductor-on-insulator (SOI) substrates with ultra-thin SOI layers and buried oxides 有权
标题翻译：具有超薄SOI层和掩埋氧化物的绝缘体上半导体（SOI）衬底
公开(公告)号：US09059245B2
公开(公告)日：2015-06-16
申请号：US13483781
申请日：2012-05-30
申请人： Tze-Chiang Chen , Joel P. de Souza , Devendra K. Sadana , Ghavam G. Shahidi
发明人： Tze-Chiang Chen , Joel P. de Souza , Devendra K. Sadana , Ghavam G. Shahidi
IPC分类号： H01L21/76 , H01L21/762
CPC分类号： H01L21/76243
摘要： Semiconductor-on-insulator (SOI) substrates including a buried oxide (BOX) layer having a thickness of less than 300 Å are provided. The (SOI) substrates having the thin BOX layer are provided using a method including a step in which oxygen ions are implanted at high substrate temperatures (greater than 600° C.), and at a low implant energy (less than 40 keV). An anneal step in an oxidizing atmosphere follows the implant step and is performed at a temperature less than 1250° C. The anneal step in oxygen containing atmosphere converts the region containing implanted oxygen atoms formed by the implant step into a BOX having a thickness of less than 300 Å. In some instances, the top semiconductor layer of the SOI substrate has a thickness of less than 300 Å.
摘要翻译：提供了包括厚度小于300埃的掩埋氧化物（BOX）层的绝缘体上半导体（SOI）衬底。使用包括以高衬底温度（大于600℃）和低注入能量（小于40keV）注入氧离子的步骤的方法提供具有薄BOX层的（SOI）衬底。氧化气氛中的退火步骤遵循注入步骤，并且在低于1250℃的温度下进行。含氧气氛中的退火步骤将包含由注入步骤形成的注入的氧原子的区域转换成厚度较小的BOX 比300Å。在一些情况下，SOI衬底的顶部半导体层具有小于300埃的厚度。

2. 发明申请

US20130320483A1 SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATES WITH ULTRA-THIN SOI LAYERS AND BURIED OXIDES 有权
标题翻译：半导体绝缘体（SOI）衬底，具有超薄SOI层和铜氧化物
公开(公告)号：US20130320483A1
公开(公告)日：2013-12-05
申请号：US13483781
申请日：2012-05-30
申请人： Tze-Chiang Chen , Joel P. de Souza , Devendra K. Sadana , Ghavam G. Shahidi
发明人： Tze-Chiang Chen , Joel P. de Souza , Devendra K. Sadana , Ghavam G. Shahidi
IPC分类号： H01L21/762 , H01L29/02
CPC分类号： H01L21/76243
摘要： Semiconductor-on-insulator (SOI) substrates including a buried oxide (BOX) layer having a thickness of less than 300 Å are provided. The (SOI) substrates having the thin BOX layer are provided using a method including a step in which oxygen ions are implanted at high substrate temperatures (greater than 600° C.), and at a low implant energy (less than 40 keV). An anneal step in an oxidizing atmosphere follows the implant step and is performed at a temperature less than 1250° C. The anneal step in oxygen containing atmosphere converts the region containing implanted oxygen atoms formed by the implant step into a BOX having a thickness of less than 300 Å. In some instances, the top semiconductor layer of the SOI substrate has a thickness of less than 300 Å.
摘要翻译：提供了包括厚度小于300埃的掩埋氧化物（BOX）层的绝缘体上半导体（SOI）衬底。使用包括以高衬底温度（大于600℃）和低注入能量（小于40keV）注入氧离子的步骤的方法提供具有薄BOX层的（SOI）衬底。氧化气氛中的退火步骤遵循注入步骤，并且在低于1250℃的温度下进行。含氧气氛中的退火步骤将包含由注入步骤形成的注入的氧原子的区域转换成厚度较小的BOX 比300Å。在一些情况下，SOI衬底的顶部半导体层具有小于300埃的厚度。

3. 发明授权

US07084050B2 Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal 失效
标题翻译：通过整体高温SIMOX-Ge相互扩散退火形成绝缘体上硅锗（SGOI）
公开(公告)号：US07084050B2
公开(公告)日：2006-08-01
申请号：US11039602
申请日：2005-01-19
申请人： Stephen W. Bedell , Joel P. de Souza , Keith E. Fogel , Devendra K. Sadana , Ghavam G. Shahidi
发明人： Stephen W. Bedell , Joel P. de Souza , Keith E. Fogel , Devendra K. Sadana , Ghavam G. Shahidi
IPC分类号： H01L21/20 , H01L21/76 , H01L21/31
CPC分类号： H01L21/76243 , H01L21/26506 , H01L21/76267 , Y10T428/12674 , Y10T428/12681
摘要： A method of forming a substantially relaxed, high-quality SiGe-on-insulator substrate material using SIMOX and Ge interdiffusion is provided. The method includes first implanting ions into a Si-containing substrate to form an implanted-ion rich region in the Si-containing substrate. The implanted-ion rich region has a sufficient ion concentration such that during a subsequent anneal at high temperatures a barrier layer that is resistant to Ge diffusion is formed. Next, a Ge-containing layer is formed on a surface of the Si-containing substrate, and thereafter a heating step is performed at a temperature which permits formation of the barrier layer and interdiffusion of Ge thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer.
摘要翻译：提供了使用SIMOX和Ge相互扩散形成基本上松弛的，优质的绝缘体上硅衬底材料的方法。该方法包括首先将离子注入到含Si衬底中以在含Si衬底中形成植入离子富集区。注入离子富集区具有足够的离子浓度，使得在随后的高温退火期间形成耐Ge扩散的阻挡层。接下来，在含Si衬底的表面上形成Ge含有层，然后在允许形成阻挡层和Ge的相互扩散的温度下进行加热步骤，从而形成基本上松弛的单晶SiGe层阻挡层顶部。

4. 发明授权

US08361889B2 Strained semiconductor-on-insulator by addition and removal of atoms in a semiconductor-on-insulator 有权
标题翻译：通过在绝缘体上半导体中加入和除去原子的绝缘体上的应变半导体
公开(公告)号：US08361889B2
公开(公告)日：2013-01-29
申请号：US12830626
申请日：2010-07-06
申请人： Thomas N. Adam , Stephen W. Bedell , Joel P. de Souza , Keith E. Fogel , Alexander Reznicek , Devendra K. Sadana , Ghavam G. Shahidi
发明人： Thomas N. Adam , Stephen W. Bedell , Joel P. de Souza , Keith E. Fogel , Alexander Reznicek , Devendra K. Sadana , Ghavam G. Shahidi
IPC分类号： H01L21/20
CPC分类号： H01L29/1054 , H01L29/7833
摘要： A method of forming a strained semiconductor-on-insulator (SSOI) substrate that does not include wafer bonding is provided. In this disclosure a relaxed and doped silicon layer is formed on an upper surface of a silicon-on-insulator (SOI) substrate. In one embodiment, the dopant within the relaxed and doped silicon layer has an atomic size that is smaller than the atomic size of silicon and, as such, the in-plane lattice parameter of the relaxed and doped silicon layer is smaller than the in-plane lattice parameter of the underlying SOI layer. In another embodiment, the dopant within the relaxed and doped silicon layer has an atomic size that is larger than the atomic size of silicon and, as such, the in-plane lattice parameter of the relaxed and doped silicon layer is larger than the in-plane lattice parameter of the underlying SOI layer. After forming the relaxed and doped silicon layer on the SOI substrate, the dopant within the relaxed and doped silicon layer is removed from that layer converting the relaxed and doped silicon layer into a strained (compressively or tensilely) silicon layer that is formed on an upper surface of an SOI substrate.
摘要翻译：提供了一种形成不包括晶片接合的应变绝缘体上半导体（SSOI）衬底的方法。在本公开中，在绝缘体上硅（SOI）衬底的上表面上形成松弛和掺杂的硅层。在一个实施例中，松弛和掺杂硅层内的掺杂剂具有小于硅的原子尺寸的原子尺寸，因此松弛和掺杂硅层的面内晶格参数小于硅的原子尺寸，下层SOI层的平面晶格参数。在另一实施例中，松弛和掺杂硅层内的掺杂剂具有大于硅的原子尺寸的原子尺寸，因此松弛和掺杂硅层的面内晶格参数大于硅原子尺寸，下层SOI层的平面晶格参数。在SOI衬底上形成松弛和掺杂的硅层之后，从该层去除松弛和掺杂硅层内的掺杂剂，将松散和掺杂的硅层转化成形成在上层的应变（压缩或拉伸）硅层 SOI衬底的表面。

5. 发明申请

US20120009766A1 STRAINED SEMICONDUCTOR-ON-INSULATOR BY ADDITION AND REMOVAL OF ATOMS IN A SEMICONDUCTOR-ON-INSULATOR 有权
标题翻译：通过在半导体绝缘体中添加和去除原子的应变半导体绝缘体
公开(公告)号：US20120009766A1
公开(公告)日：2012-01-12
申请号：US12830626
申请日：2010-07-06
申请人： Thomas N. Adam , Stephen W. Bedell , Joel P. de Souza , Keith E. Fogel , Alexander Reznicek , Devendra K. Sadana , Ghavam G. Shahidi
发明人： Thomas N. Adam , Stephen W. Bedell , Joel P. de Souza , Keith E. Fogel , Alexander Reznicek , Devendra K. Sadana , Ghavam G. Shahidi
IPC分类号： H01L21/20
CPC分类号： H01L29/1054 , H01L29/7833
摘要： A method of forming a strained semiconductor-on-insulator (SSOI) substrate that does not include wafer bonding is provided. In this disclosure a relaxed and doped silicon layer is formed on an upper surface of a silicon-on-insulator (SOI) substrate. In one embodiment, the dopant within the relaxed and doped silicon layer has an atomic size that is smaller than the atomic size of silicon and, as such, the in-plane lattice parameter of the relaxed and doped silicon layer is smaller than the in-plane lattice parameter of the underlying SOI layer. In another embodiment, the dopant within the relaxed and doped silicon layer has an atomic size that is larger than the atomic size of silicon and, as such, the in-plane lattice parameter of the relaxed and doped silicon layer is larger than the in-plane lattice parameter of the underlying SOI layer. After forming the relaxed and doped silicon layer on the SOI substrate, the dopant within the relaxed and doped silicon layer is removed from that layer converting the relaxed and doped silicon layer into a strained (compressively or tensilely) silicon layer that is formed on an upper surface of an SOI substrate.
摘要翻译：提供了一种形成不包括晶片接合的应变绝缘体上半导体（SSOI）衬底的方法。在本公开中，在绝缘体上硅（SOI）衬底的上表面上形成松弛和掺杂的硅层。在一个实施例中，松弛和掺杂硅层内的掺杂剂具有小于硅的原子尺寸的原子尺寸，因此松弛和掺杂硅层的面内晶格参数小于硅的原子尺寸，下层SOI层的平面晶格参数。在另一实施例中，松弛和掺杂硅层内的掺杂剂具有大于硅的原子尺寸的原子尺寸，因此松弛和掺杂硅层的面内晶格参数大于硅原子尺寸，下层SOI层的平面晶格参数。在SOI衬底上形成松弛和掺杂的硅层之后，从该层去除松弛和掺杂硅层内的掺杂剂，将松散和掺杂的硅层转化成形成在上层的应变（压缩或拉伸）硅层 SOI衬底的表面。

6. 发明授权

US07749869B2 Crystalline silicon substrates with improved minority carrier lifetime including a method of annealing and removing SiOx precipitates and getterning sites 失效
标题翻译：具有改善的少数载流子寿命的晶体硅衬底，包括退火和除去SiO x沉淀物和起始位点的方法
公开(公告)号：US07749869B2
公开(公告)日：2010-07-06
申请号：US12186243
申请日：2008-08-05
申请人： Joel P. De Souza , Harold John Hovel , Daniel A. Inns , Devendra K. Sadana , Ghavam G. Shahidi
发明人： Joel P. De Souza , Harold John Hovel , Daniel A. Inns , Devendra K. Sadana , Ghavam G. Shahidi
IPC分类号： H01L21/322 , H01L21/302 , H01L21/461
CPC分类号： H01L21/3225 , H01L21/02032
摘要： A method for improving the minority lifetime of silicon containing wafer having metallic contaminants therein is described incorporating annealing at 1200° C. or greater and providing a gaseous ambient of oxygen, an inert gas and a chlorine containing gas such as HCl.
摘要翻译：描述了一种用于改善其中具有金属污染物的含硅晶片的少数寿命的方法，其包括在1200℃或更高温度下退火并提供氧气，惰性气体和含氯气体如HCl的气态环境。

7. 发明授权

US06861158B2 Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal 失效
标题翻译：通过整体高温SIMOX-Ge相互扩散退火形成绝缘体上硅锗（SGOI）
公开(公告)号：US06861158B2
公开(公告)日：2005-03-01
申请号：US10696601
申请日：2003-10-29
申请人： Stephen W. Bedell , Joel P. de Souza , Keith E. Fogel , Devendra K. Sadana , Ghavam G. Shahidi
发明人： Stephen W. Bedell , Joel P. de Souza , Keith E. Fogel , Devendra K. Sadana , Ghavam G. Shahidi
IPC分类号： H01L27/08 , H01L21/02 , H01L21/20 , H01L21/265 , H01L21/762 , H01L27/12 , B32B9/04
CPC分类号： H01L21/76243 , H01L21/26506 , H01L21/76267 , Y10T428/12674 , Y10T428/12681
摘要： A method of forming a substantially relaxed, high-quality SiGe-on-insulator substrate material using SIMOX and Ge interdiffusion is provided. The method includes first implanting ions into a Si-containing substrate to form an implanted-ion rich region in the Si-containing substrate. The implanted-ion rich region has a sufficient ion concentration such that during a subsequent anneal at high temperatures a barrier layer that is resistant to Ge diffusion is formed. Next, a Ge-containing layer is formed on a surface of the Si-containing substrate, and thereafter a heating step is performed at a temperature which permits formation of the barrier layer and interdiffusion of Ge thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer.
摘要翻译：提供了使用SIMOX和Ge相互扩散形成基本上松弛的，优质的绝缘体上硅衬底材料的方法。该方法包括首先将离子注入到含Si衬底中以在含Si衬底中形成植入离子富集区。注入离子富集区具有足够的离子浓度，使得在随后的高温退火期间形成耐Ge扩散的阻挡层。接下来，在含Si衬底的表面上形成Ge含有层，然后在允许形成阻挡层和Ge的相互扩散的温度下进行加热步骤，从而形成基本上松弛的单晶SiGe层阻挡层顶部。

8. 发明申请

US20100221867A1 LOW COST SOI SUBSTRATES FOR MONOLITHIC SOLAR CELLS 审中-公开
标题翻译：用于单晶太阳能电池的低成本SOI衬底
公开(公告)号：US20100221867A1
公开(公告)日：2010-09-02
申请号：US12436249
申请日：2009-05-06
申请人： Stephen W. Bedell , Joel P. de Souza , Keith E. Fogel , Harold J. Hovel , Daniel A. Inns , Jeehwan Kim , Devendra K. Sadana , Katherine L. Saenger , Ghavam G. Shahidi
发明人： Stephen W. Bedell , Joel P. de Souza , Keith E. Fogel , Harold J. Hovel , Daniel A. Inns , Jeehwan Kim , Devendra K. Sadana , Katherine L. Saenger , Ghavam G. Shahidi
IPC分类号： H01L31/0376 , H01L21/762
CPC分类号： H01L31/03921 , H01L21/02529 , H01L21/02532 , H01L21/02573 , H01L21/02667 , H01L21/7624 , H01L21/76245 , H01L21/76262 , H01L31/046 , H01L31/0463 , H01L31/0465 , H01L31/1872 , Y02E10/50 , Y02P70/521
摘要： A lost cost method for fabricating SOI substrates is provided. The method includes forming a stack of p-type doped amorphous Si-containing layers on a semiconductor region of a substrate by utilizing an evaporation deposition process. A solid phase recrystallization step is then performed to convert the amorphous Si-containing layers within the stack into a stack of p-type doped single crystalline Si-containing layers. After recrystallization, the single crystalline Si-containing layers are subjected to anodization and at least an oxidation step to form an SOI substrate. Solar cells and/or other semiconductor devices can be formed on the upper surface of the inventive SOI substrate.
摘要翻译：提供了一种用于制造SOI衬底的损耗成本方法。该方法包括通过利用蒸发沉积工艺在衬底的半导体区域上形成一层p型掺杂的非晶态含Si层。然后进行固相重结晶步骤，以将叠层内的非晶态含硅层转化为p型掺杂单晶含Si层的堆叠。重结晶后，对单晶含Si层进行阳极氧化和至少氧化步骤以形成SOI衬底。太阳能电池和/或其他半导体器件可以形成在本发明的SOI衬底的上表面上。

9. 发明申请

US20100035409A1 CRYSTALLINE SILICON SUBSTRATES WITH IMPROVED MINORITY CARRIER LIFETIME 失效
标题翻译：具有改进的少数载体寿命的晶体硅衬底
公开(公告)号：US20100035409A1
公开(公告)日：2010-02-11
申请号：US12186243
申请日：2008-08-05
申请人： Joel P De Souza , Harold John Hovel , Daniel A. Inns , Devendra K. Sadana , Ghavam G. Shahidi
发明人： Joel P De Souza , Harold John Hovel , Daniel A. Inns , Devendra K. Sadana , Ghavam G. Shahidi
IPC分类号： H01L21/322
CPC分类号： H01L21/3225 , H01L21/02032
摘要： A method for improving the minority lifetime of silicon containing wafer having metallic contaminants therein is described incorporating annealing at 1200° C. or greater and providing a gaseous ambient of oxygen, an inert gas and a chlorine containing gas such as HCl.
摘要翻译：描述了一种用于改善其中具有金属污染物的含硅晶片的少数寿命的方法，其包括在1200℃或更高温度下退火并提供氧气，惰性气体和含氯气体如HCl的气态环境。

10. 发明授权

US07498235B2 Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-insulator (GOI) substrates 有权
标题翻译：用于制造绝缘体上硅（SGOI）和绝缘体上（GeI）绝缘体（GOI）基板的方法
公开(公告)号：US07498235B2
公开(公告)日：2009-03-03
申请号：US11924207
申请日：2007-10-25
申请人： Tze-chiang Chen , Guy M. Cohen , Alexander Reznicek , Devendra K. Sadana , Ghavam G. Shahidi
发明人： Tze-chiang Chen , Guy M. Cohen , Alexander Reznicek , Devendra K. Sadana , Ghavam G. Shahidi
IPC分类号： H01L21/30
CPC分类号： H01L21/76254 , H01L31/02327 , H01L31/028 , H01L31/1812 , Y02E10/547
摘要： A method for fabricating germanium-on-insulator (GOI) substrate materials, the GOI substrate materials produced by the method and various structures that can include at least the GOI substrate materials of the present invention are provided. The GOI substrate material include at least a substrate, a buried insulator layer located atop the substrate, and a Ge-containing layer, preferably pure Ge, located atop the buried insulator layer. In the GOI substrate materials of the present invention, the Ge-containing layer may also be referred to as the GOI film. The GOI film is the layer of the inventive substrate material in which devices can be formed.
摘要翻译：提供了绝缘体上（锗）绝缘体（GOI）衬底材料的方法，通过该方法生产的GOI衬底材料和至少可以包括本发明的GOI衬底材料的各种结构。 GOI衬底材料至少包括衬底，位于衬底顶部的掩埋绝缘体层，以及位于掩埋绝缘体层顶部的优选纯Ge的Ge含有层。在本发明的GOI基板材料中，Ge含有层也可以称为GOI膜。 GOI膜是可以形成器件的本发明的基底材料的层。

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