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    • 1. 发明授权
    • Write circuit having current mirrors between predriver and write driver
circuits for maximum head voltage swing
    • 写电路在预驱动器和写驱动器电路之间具有电流镜,用于最大磁头电压摆幅
    • US5287231A
    • 1994-02-15
    • US957612
    • 1992-10-06
    • John S. ShierTuan V. NgoDouglas R. Peterson
    • John S. ShierTuan V. NgoDouglas R. Peterson
    • G11B5/09G11B5/02
    • G11B5/022G11B5/09
    • A write circuit for driving a magnetic head in a magnetic storage system which greatly improves the voltage swing across the magnetic head. The write circuit includes data input for receiving data input signals, a predriver current source, a predriver circuit, and a write driver circuit. The predriver circuit is connected to the data input and has first and second predriver current paths. The predriver current paths are connected to a predriver current source. The predriver circuit directs current from the predriver current source through the first and second predriver current paths as a function of the data input signals. The write driver circuit has first and second write currents paths connected across the magnetic head. The first write current path directs current through the magnetic head in a first direction and the second write current path directs current through the magnetic head in a second direction, opposite to the first direction. The predriver circuit and the write driver circuit are connected together in a current mirror configuration to mirror the predriver current from the first and second predriver currents paths into the first and second write driver currents paths, respectively.
    • 用于在磁存储系统中驱动磁头的写入电路,其极大地改善了跨磁头的电压摆动。 写入电路包括用于接收数据输入信号的数据输入,预驱动电流源,预驱动电路和写入驱动器电路。 预驱动电路连接到数据输入端,并具有第一和第二预驱动电流路径。 预驱动电流路径连接到预驱动电流源。 预驱动电路将来自预驱动电流源的电流作为数据输入信号的函数引导通过第一和第二预驱动电流路径。 写入驱动器电路具有连接在磁头上的第一和第二写入电流路径。 第一写入电流路径在第一方向上引导电流通过磁头,并且第二写入电流路径在与第一方向相反的第二方向上引导电流通过磁头。 预驱动电路和写驱动器电路以电流镜配置连接在一起,以分别将来自第一和第二预驱动电流路径的预驱动电流反映到第一和第二写驱动器电流路径中。
    • 2. 发明授权
    • Write driver with H-switch synchronizing transistors
    • 用H开关同步晶体管写驱动
    • US5291347A
    • 1994-03-01
    • US067673
    • 1993-05-26
    • Tuan V. NgoDouglas R. Peterson
    • Tuan V. NgoDouglas R. Peterson
    • G11B5/09G11B5/02G11B5/03
    • G11B5/022G11B5/09
    • A write driver for driving a transducer in a storage system. The write driver includes first and second supply terminals and a H-switch for switching current flow through the transducer between a first direction and a second direction, opposite to the first direction. The H-switch includes pull-up transistors and pull-down transistors connected across the transducer for switching current flow through the transducer. Each pull-up transistor and pull-down transistor has a control terminal for controlling current flow through the transistor. The write driver further includes data input terminals for receiving data signals. A bias circuit is connected between the control terminals of the pull-up and pull-down transistors and the data input terminals for switching the pull-up and pull-down transistors between conducting and non-conducting states as a function of the received data signals. Each pull-down transistor has a corresponding synchronizing transistor connected between the control terminal of the pull-down transistor and the second supply terminal, which pulls current away from the control terminal of the pull-down transistor when the pull-down transistor is switched to the non-conducting state.
    • 用于驱动存储系统中的换能器的写入驱动器。 写入驱动器包括第一和第二电源端子和H开关,用于在与第一方向相反的第一方向和第二方向之间切换通过换能器的电流。 H开关包括连接在换能器上的上拉晶体管和下拉晶体管,用于切换通过换能器的电流。 每个上拉晶体管和下拉晶体管具有用于控制通过晶体管的电流的控制端子。 写入驱动器还包括用于接收数据信号的数据输入端。 偏置电路连接在上拉和下拉晶体管的控制端子和数据输入端之间,用于根据接收的数据信号在导通状态和非导通状态之间切换上拉和下拉晶体管 。 每个下拉晶体管具有连接在下拉晶体管的控制端子和第二电源端子之间的对应的同步晶体管,当下拉晶体管切换到时,其将电流从下拉晶体管的控制端子拉出 非导电状态。
    • 6. 发明授权
    • Input offset voltage trimming network and method
    • 输入失调电压调整网络及方法
    • US4827222A
    • 1989-05-02
    • US131804
    • 1987-12-11
    • Richard E. HesterTuan V. Ngo
    • Richard E. HesterTuan V. Ngo
    • H01C17/23H03F3/45
    • H03F3/45623H01C17/23H03F2203/45048
    • Trimming of input offset voltage of a diferential amplifier is provided by a pair of resistance networks which are connected to the emitters of a pair of current mirror transistors. By adjusting the resistances of the resistance networks, the adjustment currents flowing through the current mirror transistors are selected to cancel out the input offset voltage of the differential amplifier. Each resistance network includes a plurality of resistors connected in series with a low resistance shorting link connected in parallel with each of the plurality of resistances. The input offset voltage is trimmed by selectively cutting the shorting links with a two-phase measure and trim process.
    • 通过连接到一对电流镜晶体管的发射极的一对电阻网络来提供差分放大器的输入失调电压的微调。 通过调整电阻网络的电阻,选择流过电流镜晶体管的调节电流来抵消差分放大器的输入偏移电压。 每个电阻网络包括与与多个电阻中的每一个平行连接的低电阻短路连杆串联连接的多个电阻器。 通过用两相测量和修整过程选择性地切割短路链路来修剪输入失调电压。
    • 7. 发明授权
    • Impedance pseudo-matched write driver
    • 阻抗伪匹配写驱动
    • US06236247B1
    • 2001-05-22
    • US09433177
    • 1999-11-03
    • Tuan V. Ngo
    • Tuan V. Ngo
    • H03K100
    • G11B5/022G11B5/012G11B5/02G11B2005/0013
    • An impedance matching circuit for a write driver matches the differential impedance of the winding of the write head and the transmission line to the write head. The impedance matching circuit includes a resistor connected between a node and a current switch of the write driver. The resistor has an impedance value matching the differential impedance value of the transmission line and head. During quiescent or steady state operation, the write driver provides a DC write current in a selected direction through the winding, and the resistor matches the differential impedance of the head and transmission line. During switching to reverse direction of write current through the winding, however, the resistor dampens voltage swings at the node to minimize current undershoot. Optionally, a capacitor is in parallel with the resistor to short-circuit the resistor during switching to improve the rise-time characteristics of the current reversal, but at a sacrifice of the impedance characteristics during switching.
    • 用于写入驱动器的阻抗匹配电路将写入头和传输线的绕组的差分阻抗与写入头匹配。 阻抗匹配电路包括连接在节点和写入驱动器的电流开关之间的电阻器。 电阻器具有与传输线和头部的差分阻抗值相匹配的阻抗值。 在静态或稳态操作期间,写驱动器通过绕组在所选方向提供DC写入电流,并且电阻器匹配磁头和传输线的差分阻抗。 然而,在切换到通过绕组的写入电流的反向方向时,电阻器会抑制节点处的电压摆幅,以最小化电流下冲。 可选地,电容器与电阻器并联,以在切换期间使电阻器短路以改善电流反转的上升时间特性,但是在切换期间牺牲阻抗特性。
    • 8. 发明授权
    • Voltage bias, current sense preamplifier for a magnetoresistive reader
    • 用于磁阻读取器的电压偏置电流检测前置放大器
    • US6150876A
    • 2000-11-21
    • US285475
    • 1999-04-02
    • Tuan V. Ngo
    • Tuan V. Ngo
    • G11B5/00G11B5/012G11B5/02G11B5/09H03F1/22G06G7/12
    • G11B5/012G11B5/02H03F1/22G11B2005/0016G11B2005/0018G11B5/09
    • A preamplifier system for receiving information from at least one magnetoresistive head cell and for supplying a signal to circuitry external to the preamplifier system is disclosed. The preamplifier system includes a bias current generator, a first preamplifier gain stage, and a second preamplifier gain stage. The bias current generator is connected between a first potential and the magnetoresistive head cell for providing a bias current to the magnetoresistive head cell. The first and second preamplifier gain stages include multiple transistors, resistors, capacitors, and current sources. The combination of first and second preamplifier gain stages provide the proper amplification of a signal received from the head cell while eliminating an unwanted DC offset signal.
    • 公开了一种用于从至少一个磁阻头单元接收信息并用于向前置放大器系统外部的电路提供信号的前置放大器系统。 前置放大器系统包括偏置电流发生器,第一前置放大器增益级和第二前置放大器增益级。 偏置电流发生器连接在第一电位和磁阻头单元之间,用于向磁阻头单元提供偏置电流。 第一和第二前置放大器增益级包括多个晶体管,电阻器,电容器和电流源。 第一和第二前置放大器增益级的组合提供从头单元接收的信号的适当放大,同时消除不需要的DC偏移信号。
    • 10. 发明授权
    • Pseudo differential voltage sense MR preamplifier with improved bandwidth
    • 具有改进带宽的伪差分电压检测MR前置放大器
    • US5831784A
    • 1998-11-03
    • US709345
    • 1996-09-05
    • Raymond E. BarnettCraig M. BrannonTuan V. Ngo
    • Raymond E. BarnettCraig M. BrannonTuan V. Ngo
    • G11B5/00G11B5/012G11B5/02H03F3/45G11B5/03
    • H03F3/45479G11B5/012G11B5/02G11B2005/0018
    • A preamplifier and its associated biasing circuitry for connection to a magnetoresistive sensor having a first end and a second end is disclosed. The biasing circuitry properly biases the preamplifier such that the preamplifier can properly read signals from the sensor. The preamplifier includes a first transistor. A base of the first transistor is connected to the first end of the magnetoresistive sensor. An emitter of the second transistor is connected to the emitter of the first transistor. A collector of the third transistor is connected to the collector of the first transistor. A base of the fourth transistor is connected to the second end of the magnetoresistive sensor, while the collector of the fourth transistor is connected to the collector of the second transistor, and the emitter of the fourth transistor is connected to the emitter of the third transistor. The preamplifier further includes a voltage source and a first and a second resistor. The first resistor is connected between the voltage source and the collector of the first and third transistors, while the second transistor is connected between the voltage source and the collectors of the second and fourth transistors. Finally, a first current source is connected between the emitters of the first and second transistors and ground, while a second current source is connected between the emitters of the third and fourth transistors and ground.
    • 公开了一种用于连接到具有第一端和第二端的磁阻传感器的前置放大器及其相关的偏置电路。 偏置电路适当地偏置前置放大器,使得前置放大器可以适当地从传感器读取信号。 前置放大器包括第一晶体管。 第一晶体管的基极连接到磁阻传感器的第一端。 第二晶体管的发射极连接到第一晶体管的发射极。 第三晶体管的集电极连接到第一晶体管的集电极。 第四晶体管的基极连接到磁阻传感器的第二端,而第四晶体管的集电极连接到第二晶体管的集电极,第四晶体管的发射极连接到第三晶体管的发射极 。 前置放大器还包括电压源和第一和第二电阻器。 第一电阻器连接在第一和第三晶体管的电压源和集电极之间,而第二晶体管连接在电压源和第二和第四晶体管的集电极之间。 最后,第一电流源连接在第一和第二晶体管的发射极和地之间,而第二电流源连接在第三和第四晶体管的发射极和地之间。