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1. 发明授权

US5311146A Current mirror for low supply voltage operation 失效
标题翻译：用于低电源电压工作的电流镜
公开(公告)号：US5311146A
公开(公告)日：1994-05-10
申请号：US9287
申请日：1993-01-26
申请人： Craig M. Brannon , Tuan V. Ngo , John J. Price, Jr.
发明人： Craig M. Brannon , Tuan V. Ngo , John J. Price, Jr.
IPC分类号： H03F3/343 , H03F3/04
CPC分类号： H03F3/343
摘要： The present invention is an improved current mirror circuit. This improved current mirror circuit includes first and second transistors of the same conductivity type and have bases connected together. The first transistor is connected between a first supply terminal and an input terminal. The second transistor is connected between a first supply terminal and an output terminal. Included is a feedback circuit for providing a voltage feedback between the input terminal and the bases of the first and second transistors. Also included is a bias circuit for providing a bias current to the feedback circuit that is based on the input current.
摘要翻译：本发明是改进的电流镜电路。该改进的电流镜电路包括具有相同导电类型的第一和第二晶体管，并且具有连接在一起的基极。第一晶体管连接在第一电源端子和输入端子之间。第二晶体管连接在第一供电端子和输出端子之间。包括用于在输入端和第一和第二晶体管的基极之间提供电压反馈的反馈电路。还包括用于向基于输入电流的反馈电路提供偏置电流的偏置电路。

2. 发明授权

US5345346A Positive feedback low input capacitance differential amplifier 失效
标题翻译：正反馈低输入电容差分放大器
公开(公告)号：US5345346A
公开(公告)日：1994-09-06
申请号：US39859
申请日：1993-03-30
申请人： Craig M. Brannon , Tuan V. Ngo
发明人： Craig M. Brannon , Tuan V. Ngo
IPC分类号： G11B5/00 , G11B5/02 , H03F3/45 , H03K3/287 , H03F3/04 , H03F3/68
CPC分类号： G11B5/02 , G11B5/022 , H03F3/45089 , H03K3/287 , G11B2005/0013 , H03F2203/45024 , H03F2203/45034 , H03F2203/45176
摘要： A read preamplifier for use in reading data in a magnetic storage system uses positive feedback to reduce the preamplifier's input capacitance. The read preamplifier includes first and second voltage supply terminals. An input is coupled to the second voltage supply terminal and receives input signals from a connected magnetic head. An output is coupled to the first voltage supply terminal and to the input for producing output signals based upon the input signals. A positive feedback circuit, coupled to the input reduces the input capacitance of the read preamplifier.
摘要翻译：用于在磁存储系统中读取数据的读取前置放大器使用正反馈来减小前置放大器的输入电容。读前置放大器包括第一和第二电压供应端。输入耦合到第二电压供应端并从连接的磁头接收输入信号。输出耦合到第一电压源端子和输入端，用于基于输入信号产生输出信号。耦合到输入端的正反馈电路减小了读前置放大器的输入电容。

3. 发明授权

US5831784A Pseudo differential voltage sense MR preamplifier with improved bandwidth 失效
标题翻译：具有改进带宽的伪差分电压检测MR前置放大器
公开(公告)号：US5831784A
公开(公告)日：1998-11-03
申请号：US709345
申请日：1996-09-05
申请人： Raymond E. Barnett , Craig M. Brannon , Tuan V. Ngo
发明人： Raymond E. Barnett , Craig M. Brannon , Tuan V. Ngo
IPC分类号： G11B5/00 , G11B5/012 , G11B5/02 , H03F3/45 , G11B5/03
CPC分类号： H03F3/45479 , G11B5/012 , G11B5/02 , G11B2005/0018
摘要： A preamplifier and its associated biasing circuitry for connection to a magnetoresistive sensor having a first end and a second end is disclosed. The biasing circuitry properly biases the preamplifier such that the preamplifier can properly read signals from the sensor. The preamplifier includes a first transistor. A base of the first transistor is connected to the first end of the magnetoresistive sensor. An emitter of the second transistor is connected to the emitter of the first transistor. A collector of the third transistor is connected to the collector of the first transistor. A base of the fourth transistor is connected to the second end of the magnetoresistive sensor, while the collector of the fourth transistor is connected to the collector of the second transistor, and the emitter of the fourth transistor is connected to the emitter of the third transistor. The preamplifier further includes a voltage source and a first and a second resistor. The first resistor is connected between the voltage source and the collector of the first and third transistors, while the second transistor is connected between the voltage source and the collectors of the second and fourth transistors. Finally, a first current source is connected between the emitters of the first and second transistors and ground, while a second current source is connected between the emitters of the third and fourth transistors and ground.
摘要翻译：公开了一种用于连接到具有第一端和第二端的磁阻传感器的前置放大器及其相关的偏置电路。偏置电路适当地偏置前置放大器，使得前置放大器可以适当地从传感器读取信号。前置放大器包括第一晶体管。第一晶体管的基极连接到磁阻传感器的第一端。第二晶体管的发射极连接到第一晶体管的发射极。第三晶体管的集电极连接到第一晶体管的集电极。第四晶体管的基极连接到磁阻传感器的第二端，而第四晶体管的集电极连接到第二晶体管的集电极，第四晶体管的发射极连接到第三晶体管的发射极。前置放大器还包括电压源和第一和第二电阻器。第一电阻器连接在第一和第三晶体管的电压源和集电极之间，而第二晶体管连接在电压源和第二和第四晶体管的集电极之间。最后，第一电流源连接在第一和第二晶体管的发射极和地之间，而第二电流源连接在第三和第四晶体管的发射极和地之间。

4. 发明授权

US5886568A Open-loop MR biasing circuit with high power supply and common mode rejection 失效
标题翻译：具有高电源和共模抑制的开环MR偏置电路
公开(公告)号：US5886568A
公开(公告)日：1999-03-23
申请号：US83149
申请日：1998-05-21
申请人： Tuan V. Ngo , Craig M. Brannon
发明人： Tuan V. Ngo , Craig M. Brannon
IPC分类号： G01R33/09 , G05F1/46 , G05F3/22 , G11B5/00 , G11B5/012 , G11B5/02 , G05F1/10
CPC分类号： G01R33/09 , G05F1/46 , G05F3/225 , G11B5/012 , G11B5/02 , G11B2005/0018
摘要： An open-loop biasing circuit for a magnetoresistive element provides high common mode and power supply rejection. Two current sources are connected together by two conduction paths. A first conduction path has two impedances. One impedance is tied between the first current source and ground and the second impedance is tied between the second current source and ground. The second conduction path includes the magnetoresistive element. A capacitive path between the two current sources reduces power supply noise and a voltage follower reduces parasitic capacitance in the capacitive path.
摘要翻译：用于磁阻元件的开环偏置电路提供高共模和电源抑制。两个电流源通过两个传导路径连接在一起。第一传导路径具有两个阻抗。一个阻抗被连接在第一电流源和地之间，第二阻抗被连接在第二电流源和地之间。第二导电路径包括磁阻元件。两个电流源之间的电容路径降低了电源噪声，电压跟随器降低了电容路径中的寄生电容。

5. 发明授权

US5757566A Direct AC-coupled amplifier with improved common mode rejection for MR heads 失效
标题翻译：直接交流耦合放大器具有改进的共模抑制MR磁头
公开(公告)号：US5757566A
公开(公告)日：1998-05-26
申请号：US707959
申请日：1996-09-10
申请人： Tuan V. Ngo , Craig M. Brannon
发明人： Tuan V. Ngo , Craig M. Brannon
IPC分类号： G11B5/00 , G11B5/48 , G11B33/12 , G11B5/09 , G11B5/02 , G11B5/03
CPC分类号： G11B5/02 , H03F3/45089 , G11B2005/0018 , G11B33/122 , G11B5/486 , G11B5/4886 , H03F2203/45544 , H03F2203/45616
摘要： A direct AC-coupled amplifier for use with a plurality of magnetoresistive read elements includes a differential amplifier having first and second inputs and first and second outputs. A plurality of input circuits are provided, one for each MR element. Each input circuit has first and second connections to opposite sides of the respective MR element and a pair of emitter-follower its. Each emitter-follower circuit comprises a transistor having a base connected to one of the connections and a collector arranged to be connected a first voltage source. A capacitor is connected between the emitter of each of the transistors and a respective input of the amplifier. A current is applied to the first and second connections of a selected one of the input circuits to operate the respective MR element.
摘要翻译：用于多个磁阻读取元件的直接AC耦合放大器包括具有第一和第二输入以及第一和第二输出的差分放大器。提供多个输入电路，每个MR元件一个。每个输入电路具有到相应MR元件的相对侧的第一和第二连接和一对发射极跟随器。每个射极跟随器电路包括晶体管，其晶体管具有连接到其中一个连接的基极和集电极，被布置成连接第一电压源。电容器连接在每个晶体管的发射极和放大器的相应输入端之间。电流被施加到所选择的一个输入电路的第一和第二连接以操作相应的MR元件。

6. 发明授权

US5793551A Amplifier having a differential input capacitance cancellation circuit 失效
标题翻译：具有差分输入电容消除电路的放大器
公开(公告)号：US5793551A
公开(公告)日：1998-08-11
申请号：US477291
申请日：1995-06-07
申请人： Tuan V. Ngo , Raymond E. Barnett , Craig M. Brannon
发明人： Tuan V. Ngo , Raymond E. Barnett , Craig M. Brannon
IPC分类号： G11B5/012 , G11B5/02 , G11B5/035 , G11B5/09
CPC分类号： G11B5/012 , G11B5/02 , G11B5/09 , G11B5/035
摘要： A first differential amplifier circuit is provided having a first and second input terminal suited for connection to a magnetic head. The first differential amplifier circuit includes first and second output terminals for providing a read output signal. A second differential amplifier circuit is provided which has first and second input terminals connected to the first and second input terminals, respectively, the first differential amplifier circuit. The second differential amplifier circuit also includes first and second output terminals. A first feedback capacitor is provided which is connected between the first input terminal of the first differential amplifier circuit and the first output terminal of the second differential amplifier circuit. A second feedback capacitor is provided which is connected between the second input terminal of the first differential amplifier circuit and the second output terminal of the second differential amplifier circuit.
摘要翻译：提供了具有适于连接到磁头的第一和第二输入端的第一差分放大器电路。第一差分放大器电路包括用于提供读取输出信号的第一和第二输出端子。提供了第二差分放大器电路，其具有分别连接到第一和第二输入端子的第一和第二输入端子，第一差分放大器电路。第二差分放大器电路还包括第一和第二输出端子。提供第一反馈电容器，其连接在第一差分放大器电路的第一输入端和第二差分放大器电路的第一输出端之间。提供第二反馈电容器，其连接在第一差分放大器电路的第二输入端子和第二差分放大器电路的第二输出端子之间。

7. 发明授权

US6111716A Referenced magnetoresistives sensor band pass preamplifier 失效
标题翻译：参考磁阻传感器带通前置放大器
公开(公告)号：US6111716A
公开(公告)日：2000-08-29
申请号：US23510
申请日：1998-02-13
申请人： Tuan V. Ngo , Craig M. Brannon , Douglas R. Peterson
发明人： Tuan V. Ngo , Craig M. Brannon , Douglas R. Peterson
IPC分类号： G11B5/00 , G11B5/012 , G11B5/02 , G11B5/035 , G11B33/12
CPC分类号： G11B5/02 , G11B5/012 , G11B2005/0016 , G11B2005/0018 , G11B33/122 , G11B5/035
摘要： A magnetoresistive sensor and preamplifier system for sensing magnetization patterns in a magnetic disk based digital data storage and retrieval memory with a grounded magnetoresistive sensor The signals from the magnetoresistive sensor are coupled by a coupling capacitor to a grounded differential amplifier. The structure of the coupling capacitor in a monolithic integrated circuit determines the passband for the system in passing the magnetoresistive sensor signals.
摘要翻译：用于利用接地磁阻传感器感测基于磁盘的数字数据存储和检索存储器中的磁化模式的磁阻传感器和前置放大器系统来自磁阻传感器的信号通过耦合电容耦合到接地差分放大器。单片集成电路中的耦合电容器的结构决定了传递磁阻传感器信号时系统的通带。

8. 发明授权

US5812019A Open-loop MR biasing circuit with high power supply and common mode rejection 失效
公开(公告)号：US5812019A
公开(公告)日：1998-09-22
申请号：US781845
申请日：1997-01-10
申请人： Tuan V. Ngo , Craig M. Brannon
发明人： Tuan V. Ngo , Craig M. Brannon
IPC分类号： G01R33/09 , G05F1/46 , G05F3/22 , G11B5/00 , G11B5/012 , G11B5/02 , G05F1/10
CPC分类号： G01R33/09 , G05F1/46 , G05F3/225 , G11B5/012 , G11B5/02 , G11B2005/0018
摘要： An open-loop biasing circuit for a magnetoresistive element provides high common mode and power supply rejection. Two current sources are connected together by two conduction paths. A first conduction path has two impedances. One impedance is tied between the first current source and ground and the second impedance is tied between the second current source and ground. The second conduction path includes the magnetoresistive element. A capacitive path between the two current sources reduces power supply noise and a voltage follower reduces parasitic capacitance in the capacitive path.

9. 发明授权

US5349253A Logic translator interfacing between five-volt TTL/CMOS and three-volt CML 失效
标题翻译：五伏TTL / CMOS和三伏CML之间的逻辑转换器接口
公开(公告)号：US5349253A
公开(公告)日：1994-09-20
申请号：US992544
申请日：1992-12-17
申请人： Tuan V. Ngo , John J. Price, Jr.
发明人： Tuan V. Ngo , John J. Price, Jr.
IPC分类号： H03K19/018
CPC分类号： H03K19/01812
摘要： A logic translating buffer for low voltage operation for receiving a TTL compatible signal and providing a current mode logic signal. The logic translating buffer includes an emitter coupled differential pair of NPN transistors with the common emitters each being connected to a current source. One of the transistors of the differential pair has a constant voltage bias applied to the base thereof that is equal to the sum of a forward biased PN junction, a forward biased Schottky diode, and the voltage drop across a first resistor. The other transistor of the differential pair is provided a signal that is representative of the logic level input to the translating buffer. A clamping transistor is provided for keeping the other transistor of the differential pair from saturating.
摘要翻译：用于低电压操作的逻辑翻译缓冲器，用于接收TTL兼容信号并提供电流模式逻辑信号。逻辑转换缓冲器包括发射极耦合的NPN晶体管的差分对，每个公共发射极连接到电流源。差分对的晶体管之一具有施加到其基极的恒定电压偏置，其等于正向偏置的PN结，正向偏置的肖特基二极管和跨第一电阻器的电压降的和。差分对的另一晶体管被提供表示输入到转换缓冲器的逻辑电平的信号。提供钳位晶体管用于保持差分对的另一个晶体管饱和。

10. 发明授权

US5373402A System and method for writing servo information and data to a plurality of magnetic discs 失效
标题翻译：将伺服信息和数据写入多个磁盘的系统和方法
公开(公告)号：US5373402A
公开(公告)日：1994-12-13
申请号：US110366
申请日：1993-08-23
申请人： John J. Price, Jr. , Tuan V. Ngo
发明人： John J. Price, Jr. , Tuan V. Ngo
IPC分类号： G11B5/00 , G11B5/012 , G11B5/55 , G11B5/596 , G11B19/02 , G11B15/12
CPC分类号： G11B5/5534 , G11B19/02 , G11B5/012 , G11B5/59633 , G11B2005/001
摘要： A system for writing servo information to a plurality of magnetic discs in a servo write mode, and for writing data to the plurality of magnetic discs in a data write mode in disclosed. The system includes a servo binary input buffer for receiving a mode signal and for directing the write signal based upon the mode signal. A first plurality of switches, coupled to the servo binary input buffer and to a disc select buffer, directs the write signal to a selected portion of a plurality of write heads. A second plurality of switches, coupled to the first plurality of switches, to the plurality of write heads, and to a head select buffer, supplies the write signal to one write head in the selected portion of the plurality of write heads during the data write mode, and supplies the write signal to one half of the write heads in the selected portion of the plurality of write heads during the servo write mode.
摘要翻译：一种用于以伺服写入模式将伺服信息写入多个磁盘的系统，用于以所公开的数据写入模式将数据写入多个磁盘。该系统包括用于接收模式信号并基于模式信号引导写信号的伺服二进制输入缓冲器。耦合到伺服二进制输入缓冲器和盘选择缓冲器的第一多个开关将写入信号引导到多个写入头的选定部分。耦合到第一多个开关的第二多个开关耦合到多个写头以及头选择缓冲器，在数据写入期间将写入信号提供给多个写入头的选定部分中的一个写入头模式，并且在伺服写入模式期间将写入信号提供给多个写入头的所选部分中的写入头的一半。

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