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1. 发明授权

US5793551A Amplifier having a differential input capacitance cancellation circuit 失效
标题翻译：具有差分输入电容消除电路的放大器
公开(公告)号：US5793551A
公开(公告)日：1998-08-11
申请号：US477291
申请日：1995-06-07
申请人： Tuan V. Ngo , Raymond E. Barnett , Craig M. Brannon
发明人： Tuan V. Ngo , Raymond E. Barnett , Craig M. Brannon
IPC分类号： G11B5/012 , G11B5/02 , G11B5/035 , G11B5/09
CPC分类号： G11B5/012 , G11B5/02 , G11B5/09 , G11B5/035
摘要： A first differential amplifier circuit is provided having a first and second input terminal suited for connection to a magnetic head. The first differential amplifier circuit includes first and second output terminals for providing a read output signal. A second differential amplifier circuit is provided which has first and second input terminals connected to the first and second input terminals, respectively, the first differential amplifier circuit. The second differential amplifier circuit also includes first and second output terminals. A first feedback capacitor is provided which is connected between the first input terminal of the first differential amplifier circuit and the first output terminal of the second differential amplifier circuit. A second feedback capacitor is provided which is connected between the second input terminal of the first differential amplifier circuit and the second output terminal of the second differential amplifier circuit.
摘要翻译：提供了具有适于连接到磁头的第一和第二输入端的第一差分放大器电路。第一差分放大器电路包括用于提供读取输出信号的第一和第二输出端子。提供了第二差分放大器电路，其具有分别连接到第一和第二输入端子的第一和第二输入端子，第一差分放大器电路。第二差分放大器电路还包括第一和第二输出端子。提供第一反馈电容器，其连接在第一差分放大器电路的第一输入端和第二差分放大器电路的第一输出端之间。提供第二反馈电容器，其连接在第一差分放大器电路的第二输入端子和第二差分放大器电路的第二输出端子之间。

2. 发明授权

US5831784A Pseudo differential voltage sense MR preamplifier with improved bandwidth 失效
标题翻译：具有改进带宽的伪差分电压检测MR前置放大器
公开(公告)号：US5831784A
公开(公告)日：1998-11-03
申请号：US709345
申请日：1996-09-05
申请人： Raymond E. Barnett , Craig M. Brannon , Tuan V. Ngo
发明人： Raymond E. Barnett , Craig M. Brannon , Tuan V. Ngo
IPC分类号： G11B5/00 , G11B5/012 , G11B5/02 , H03F3/45 , G11B5/03
CPC分类号： H03F3/45479 , G11B5/012 , G11B5/02 , G11B2005/0018
摘要： A preamplifier and its associated biasing circuitry for connection to a magnetoresistive sensor having a first end and a second end is disclosed. The biasing circuitry properly biases the preamplifier such that the preamplifier can properly read signals from the sensor. The preamplifier includes a first transistor. A base of the first transistor is connected to the first end of the magnetoresistive sensor. An emitter of the second transistor is connected to the emitter of the first transistor. A collector of the third transistor is connected to the collector of the first transistor. A base of the fourth transistor is connected to the second end of the magnetoresistive sensor, while the collector of the fourth transistor is connected to the collector of the second transistor, and the emitter of the fourth transistor is connected to the emitter of the third transistor. The preamplifier further includes a voltage source and a first and a second resistor. The first resistor is connected between the voltage source and the collector of the first and third transistors, while the second transistor is connected between the voltage source and the collectors of the second and fourth transistors. Finally, a first current source is connected between the emitters of the first and second transistors and ground, while a second current source is connected between the emitters of the third and fourth transistors and ground.
摘要翻译：公开了一种用于连接到具有第一端和第二端的磁阻传感器的前置放大器及其相关的偏置电路。偏置电路适当地偏置前置放大器，使得前置放大器可以适当地从传感器读取信号。前置放大器包括第一晶体管。第一晶体管的基极连接到磁阻传感器的第一端。第二晶体管的发射极连接到第一晶体管的发射极。第三晶体管的集电极连接到第一晶体管的集电极。第四晶体管的基极连接到磁阻传感器的第二端，而第四晶体管的集电极连接到第二晶体管的集电极，第四晶体管的发射极连接到第三晶体管的发射极。前置放大器还包括电压源和第一和第二电阻器。第一电阻器连接在第一和第三晶体管的电压源和集电极之间，而第二晶体管连接在电压源和第二和第四晶体管的集电极之间。最后，第一电流源连接在第一和第二晶体管的发射极和地之间，而第二电流源连接在第三和第四晶体管的发射极和地之间。

3. 发明授权

US06512646B1 Impedance-matched write circuit 有权
标题翻译：阻抗匹配写电路
公开(公告)号：US06512646B1
公开(公告)日：2003-01-28
申请号：US09475909
申请日：1999-12-30
申请人： John D. Leighton , Raymond E. Barnett , Tuan V. Ngo
发明人： John D. Leighton , Raymond E. Barnett , Tuan V. Ngo
IPC分类号： H03B100
CPC分类号： G11B5/022 , G11B5/012 , G11B5/02 , G11B2005/0013
摘要： A write circuit selectively provides a write current through a write head in first and second opposite directions. The write circuit is connected to the write head by an interconnect, and has a positive supply level and a negative supply level. A first voltage source provides a first control voltage, and a second voltage source provides a second control voltage. A first resistor is provided between the first voltage source and the interconnect for impedance matching to the interconnect, and a second resistor is provided between the second voltage source and the interconnect for impedance matching to the interconnect. The first and second control voltages provide a transient voltage to the interconnect and provide a subsequent steady-state voltage to the interconnect.
摘要翻译：写入电路在第一和第二相反方向上选择性地提供写入电流通过写入头。写入电路通过互连连接到写入头，并且具有正的电源电平和负的电源电平。第一电压源提供第一控制电压，第二电压源提供第二控制电压。第一电阻器设置在第一电压源和互连件之间用于与互连件的阻抗匹配，并且第二电阻器设置在第二电压源和互连件之间用于与互连件的阻抗匹配。第一和第二控制电压为互连提供瞬态电压并向互连提供随后的稳态电压。

4. 发明授权

US5781046A Push-and-pull driver circuit for driving an H-bridge coupled to a two-terminal inductive load 失效
标题翻译：用于驱动耦合到两端感性负载的H桥的推挽式驱动电路
公开(公告)号：US5781046A
公开(公告)日：1998-07-14
申请号：US408219
申请日：1995-03-22
申请人： Tuan V. Ngo , Raymond E. Barnett
发明人： Tuan V. Ngo , Raymond E. Barnett
IPC分类号： G11B5/09 , G11B15/12 , G11B19/04 , H03K17/66 , H03K3/00
CPC分类号： G11B5/022 , G11B5/09 , H03K17/662 , G11B15/12 , G11B19/04
摘要： A write driver for a two-terminal inductive load comprises an H-bridge switching circuit and a push-pull driver circuit. The H-bridge switching circuit responds to a first mode to conduct a current in a first direction through the inductive load and responds to a second mode to conduct the current in a second direction through the inductive load. The push-pull driver circuit responds to the first mode to push a charge current into a first control node of the H-bridge and responds to the second mode to pull a discharge current from the first control node. In one form, the write driver includes a second push-pull driver circuit responsive to the first mode to pull a discharge current from a second control node and to the second mode to push a charge current into the second control node.
摘要翻译：用于两端感性负载的写驱动器包括H桥开关电路和推挽驱动电路。 H桥开关电路响应于第一模式，以通过电感负载在第一方向上导通电流，并响应于第二模式，以通过感性负载沿第二方向导通电流。推挽驱动器电路响应于第一模式以将充电电流推入H桥的第一控制节点并且响应于第二模式以从第一控制节点拉放放电电流。在一种形式中，写入驱动器包括响应于第一模式的第二推挽驱动器电路，以将放电电流从第二控制节点拉到第二模式，以将充电电流推入第二控制节点。

5. 发明授权

US5990710A High performance write driver for magnetic inductive recording head 失效
标题翻译：磁性感应记录头的高性能写入驱动器
公开(公告)号：US5990710A
公开(公告)日：1999-11-23
申请号：US867097
申请日：1997-06-02
申请人： Tuan V. Ngo , Raymond E. Barnett
发明人： Tuan V. Ngo , Raymond E. Barnett
IPC分类号： G11B5/02 , G11B5/09 , H03F3/45 , H03K17/0412 , H03K17/66 , H03B1/00
CPC分类号： G11B5/022 , G11B5/02 , H03F3/45085 , H03K17/04126 , H03K17/661 , G11B5/09
摘要： A circuit is provided to switch a drive transistor in a write driver circuit controlled by a write control signal to direct write current in a selected direction through an inductive head. Current is selectively conducted from a control region of the drive transistor in response to switching of the write control signal. A first bias circuit limits voltage fluctuation at the control region of the drive transistor. A second bias circuit prevents saturation of the drive transistor.
摘要翻译：提供电路来切换由写入控制信号控制的写入驱动器电路中的驱动晶体管，以通过感应头直接写入指向所选方向的电流。响应于写入控制信号的切换，电流从驱动晶体管的控制区选择性地导通。第一偏置电路限制驱动晶体管的控制区域处的电压波动。第二偏置电路防止驱动晶体管的饱和。

6. 发明授权

US5532631A Active pull-down write driver for three-terminal inductive load 失效
标题翻译：用于三端感性负载的主动下拉式写入驱动器
公开(公告)号：US5532631A
公开(公告)日：1996-07-02
申请号：US341495
申请日：1994-11-17
申请人： Tuan V. Ngo , Raymond E. Barnett
发明人： Tuan V. Ngo , Raymond E. Barnett
IPC分类号： H03K17/041 , H03K17/62 , H03K3/00 , H03K4/04
CPC分类号： H03K17/04113 , H03K17/6292
摘要： A write driver for a magnetic transducer having a three-terminal inductive coil includes first and second voltage sources, a write current source, and a switching network having first and second switching transistors connected between the second voltage source and the respective first and second taps. The switching network responds to respective first and second inputs to switch the write current between respective first and second taps. Active pull-down subcircuits operate to alternately supply base current to the respective first and second switching transistors to charge parasitic capacitances of the respective switching transistors and to alternately sink base current from the respective switching transistors to discharge parasitic capacitances.
摘要翻译：具有三端感应线圈的磁换能器的写驱动器包括第一和第二电压源，写电流源和具有连接在第二电压源与相应的第一和第二抽头之间的第一和第二开关晶体管的开关网络。交换网络响应相应的第一和第二输入以在相应的第一和第二抽头之间切换写入电流。有源下拉子电路用于交替地向相应的第一和第二开关晶体管提供基极电流，以对各个开关晶体管的寄生电容进行充电，并交替地从相应的开关晶体管吸收基极电流以放电寄生电容。

7. 发明授权

US06404574B1 Write driver with diodes to improve switching rate and reliability 有权
标题翻译：用二极管写入驱动器，以提高开关速率和可靠性
公开(公告)号：US06404574B1
公开(公告)日：2002-06-11
申请号：US09379415
申请日：1999-08-24
申请人： Raymond E. Barnett
发明人： Raymond E. Barnett
IPC分类号： G11B509
CPC分类号： G11B5/022 , G11B15/12 , G11B2005/0013
摘要： A write driver, having a pair of head nodes for connection to a write head, includes two diodes connected, respectively to the head nodes and the emitters of first and second upper drive transistors. The diodes increase the voltage necessary to breakdown the emitter pn junctions of the upper drive transistors, thereby enabling a greater head swing voltage, higher switching rates, and ultimately closer spacing of data on a magnetic medium.
摘要翻译：具有用于连接到写入头的一对头部节点的写入驱动器包括分别连接到头部节点和第一和第二上部驱动晶体管的发射极的两个二极管。二极管增加击穿上驱动晶体管的发射极pn结所必需的电压，从而能够在磁介质上实现更大的磁头摆动电压，更高的开关速率以及最终的数据间隔。

8. 发明授权

US07206155B2 High-speed, low power preamplifier write driver 有权
标题翻译：高速，低功率前置放大器写入驱动器
公开(公告)号：US07206155B2
公开(公告)日：2007-04-17
申请号：US10955424
申请日：2004-09-30
申请人： Jeremy Kuehlwein , Raymond E. Barnett
发明人： Jeremy Kuehlwein , Raymond E. Barnett
IPC分类号： G11B5/02
CPC分类号： G11B5/39 , G11B2005/0018
摘要： A write driver circuit (38) uses a matching resistors (R0, R1) to match the impedance of the head (32) disposed between output nodes (OUTP, OUTN). Control circuitry (Q4, Q5, Q6, Q7, R2, R4, R6 and R7) maintains the voltage at reference voltage nodes (VREFP, REFN) at essentially the same voltage as its corresponding output node. The matching resistor is disposed between the reference voltage node and the output node along with a driver (40a, 40b), which may be implemented as an AB driver. Since the voltage between the reference node and the output node is generally zero, very little current is shunted by the matching resistors, and thus, there is very little power wasted by the matching resistors. In the preferred embodiment, the output transistors of the AB drivers are driven by switched current sources (Q28 and Q29) to provide enhanced current to the bases of the output transistors on an as needed basis.
摘要翻译：写入驱动器电路（38）使用匹配电阻器（R 0，R 1）来匹配设置在输出节点（OUTP，OUTN）之间的头部（32）的阻抗。控制电路（Q 4，Q 5，Q 6，Q 7，R 2，R 4，R 6和R 7）将参考电压节点（VREFP，REFN）的电压保持在与其相应输出节点基本相同的电压。匹配电阻器与可以被实现为AB驱动器的驱动器（40a，40b）一起设置在参考电压节点和输出节点之间。由于参考节点和输出节点之间的电压通常为零，所以匹配电阻器分流的电流非常小，因此匹配电阻器浪费的功率非常小。在优选实施例中，AB驱动器的输出晶体管由开关电流源（Q28和Q29）驱动，以根据需要向输出晶体管的基极提供增强的电流。

9. 发明授权

US5920729A Apparatus for providing pair of complementary outputs with first and subcircuits to convert non-complementary and complementary inputs to first and second pair of complementary output 失效
标题翻译：用于提供一对互补输出的第一和第二电路以将非互补和互补的输入转换成第一和第二对互补输出的装置
公开(公告)号：US5920729A
公开(公告)日：1999-07-06
申请号：US643119
申请日：1996-04-30
申请人： Raymond E. Barnett
发明人： Raymond E. Barnett
IPC分类号： H03K19/018 , G06F3/00
CPC分类号： H03K19/01837
摘要： A write driver, having a pair of inputs for receiving write data signals, includes a TTL buffer circuit connected to one input and a PECL buffer circuit connected to both inputs. A detector, responsive to a voltage at one of the inputs, selectively operates either the TTL buffer circuit or the PECL buffer circuit. The detector preferably comprises a comparator, a switching circuit, and two current mirrors. The comparator compares the voltage at one of the inputs to a reference voltage and outputs a signal controlling the switching circuit. The switching circuit enables one of the current mirrors, thereby enabling either the TTL or the PECL buffer circuit. In the preferred embodiment, a Schottky diode isolates the TTL buffer circuit from the PECL buffer circuit.
摘要翻译：具有用于接收写数据信号的一对输入的写驱动器包括连接到一个输入的TTL缓冲电路和连接到两个输入的PECL缓冲电路。响应于其中一个输入处的电压的检测器选择性地操作TTL缓冲电路或PECL缓冲电路。检测器优选地包括比较器，开关电路和两个电流镜。比较器将一个输入端的电压与参考电压进行比较，并输出控制开关电路的信号。开关电路使得电流镜中的一个能够实现TTL或PECL缓冲电路。在优选实施例中，肖特基二极管将TTL缓冲电路与PECL缓冲电路隔离。

10. 发明授权

US5986832A Write driver with Schottky diodes to improve switching rate and reliability 失效
标题翻译：用肖特基二极管写入驱动器，以提高开关速率和可靠性
公开(公告)号：US5986832A
公开(公告)日：1999-11-16
申请号：US872787
申请日：1997-06-11
申请人： Raymond E. Barnett
发明人： Raymond E. Barnett
IPC分类号： G11B5/00 , G11B15/12 , G11B5/09
CPC分类号： G11B5/022 , G11B15/12 , G11B2005/0013
摘要： A write driver, having a pair of head nodes for connection to a write head, includes two diodes connected respectively the head nodes and the emitters of first and second upper drive transistors. The diodes, which are preferably Schottky diodes, increase the voltage necessary to breakdown the emitter pn junctions of the upper drive transistors, thereby enabling a greater head swing voltage, higher switching rates, and ultimately closer spacing of data on a magnetic medium. Additionally, a preferred embodiment of the write driver includes two voltage clamps, each coupled between a respective head node and a first supply node, to limit the magnitude of voltage spikes resulting from self-inductance of the write head.
摘要翻译：具有用于连接到写入头的一对头部节点的写入驱动器包括分别连接到第一和第二上部驱动晶体管的头部节点和发射器的两个二极管。优选为肖特基二极管的二极管增加击穿上驱动晶体管的发射极pn结所需的电压，从而能够在磁介质上实现更大的磁头摆动电压，更高的开关速率和最终的数据间隔。此外，写入驱动器的优选实施例包括两个电压钳位，每个钳位钳位在相应的头节点和第一供电节点之间，以限制由写头的自感引起的电压尖峰的幅度。

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