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1. 发明授权

US07367871B2 Semiconductor processing methods of removing conductive material 有权
标题翻译：去除导电材料的半导体加工方法
公开(公告)号：US07367871B2
公开(公告)日：2008-05-06
申请号：US11449201
申请日：2006-06-05
申请人： Trung Tri Doan , Scott G. Meikle
发明人： Trung Tri Doan , Scott G. Meikle
IPC分类号： B24B1/00
CPC分类号： B24B37/11 , B23H5/08 , B24B37/042 , B24B37/046 , B24B37/20 , C25F3/30 , H01L21/3212 , H01L21/32125
摘要： The invention includes a semiconductive processing method of electrochemical-mechanical removing at least some of a conductive material from over a surface of a semiconductor substrate. A cathode is provided at a first location of the wafer, and an anode is provided at a second location of the wafer. The conductive material is polished with the polishing pad polishing surface. The polishing occurs at a region of the conductive material and not at another region. The region where the polishing occurs is defined as a polishing operation location. The polishing operation location is displaced across the surface of the substrate from said second location of the substrate toward said first location of the substrate. The polishing operation location is not displaced from said first location toward said second location when the polishing operation location is between the first and second locations. The invention also includes a semiconductor processing method of removing at least some of a conductive material from over a surface of a semiconductive material wafer. A polishing pad is displaced across an upper surface of the wafer from a central region of the wafer toward a periphery of the wafer, and is not displaced from the periphery to the central region.
摘要翻译：本发明包括从半导体衬底的表面上电化学 - 机械去除至少一些导电材料的半导体处理方法。阴极设置在晶片的第一位置处，并且阳极设置在晶片的第二位置处。用抛光垫抛光表面抛光导电材料。抛光发生在导电材料的区域而不是在另一区域。抛光发生的区域被定义为抛光操作位置。抛光操作位置从衬底的所述第二位置横跨衬底的表面移动到衬底的所述第一位置。当抛光操作位置在第一和第二位置之间时，抛光操作位置不会从所述第一位置移动到所述第二位置。本发明还包括从半导体材料晶片的表面上去除至少一些导电材料的半导体加工方法。抛光垫从晶片的中心区域朝着晶片的周边跨越晶片的上表面移位，并且不会从周边移动到中心区域。

2. 发明授权

US06582281B2 Semiconductor processing methods of removing conductive material 有权
公开(公告)号：US06582281B2
公开(公告)日：2003-06-24
申请号：US09534820
申请日：2000-03-23
申请人： Trung Tri Doan , Scott G. Meikle
发明人： Trung Tri Doan , Scott G. Meikle
IPC分类号： B24B100
CPC分类号： B24B37/11 , B23H5/08 , B24B37/042 , B24B37/046 , B24B37/20 , C25F3/30 , H01L21/3212 , H01L21/32125
摘要： The invention includes a semiconductive processing method of electrochemical-mechanical removing at least some of a conductive material from over a surface of a semiconductor substrate. A cathode is provided at a first location of the wafer, and an anode is provided at a second location of the wafer. The conductive material is polished with the polishing pad polishing surface. The polishing occurs at a region of the conductive material and not at another region. The region where the polishing occurs is defined as a polishing operation location. The polishing operation location is displaced across the surface of the substrate from said second location of the substrate toward said first location of the substrate. The polishing operation location is not displaced from said first location toward said second location when the polishing operation location is between the first and second locations. The invention also includes a semiconductor processing method of removing at least some of a conductive material from over a surface of a semiconductive material wafer. A polishing pad is displaced across an upper surface of the wafer from a central region of the wafer toward a periphery of the wafer, and is not displaced from the periphery to the central region.

3. 发明授权

US5989470A Method for making polishing pad with elongated microcolumns 失效
标题翻译：用细长的微柱制造抛光垫的方法
公开(公告)号：US5989470A
公开(公告)日：1999-11-23
申请号：US904657
申请日：1997-08-01
申请人： Trung Tri Doan , Scott G. Meikle
发明人： Trung Tri Doan , Scott G. Meikle
IPC分类号： B24B37/26 , B24D11/00 , B24D13/14 , H01L21/304 , B32B31/06 , B29B17/00 , B29C31/08
CPC分类号： B24B37/26 , B24D11/00 , Y10S451/921
摘要： A polishing pad for use in chemical-mechanical planarization (CMP) of semiconductor wafers includes a multiplicity of elongated microcolumns embedded in a matrix material body. The elongated microcolumns are oriented parallel to each other and extend from a planarizing surface used to planarize the semiconductor wafers. The elongated microcolumns are uniformly distributed throughout the polishing pad in order to impart uniform properties throughout the polishing pad. The polishing pad can also include elongated pores either coaxial width or interspersed between the elongated microcolumns to provide uniform porosity throughout the polishing pad.
摘要翻译：用于半导体晶片的化学机械平面化（CMP）的抛光垫包括嵌入基体材料体中的多个细长的微柱。细长的微柱彼此平行取向并从用于平坦化半导体晶片的平坦化表面延伸。细长的微柱均匀分布在整个抛光垫中，以便在整个抛光垫中赋予均匀的性能。抛光垫还可以包括细长孔，其同轴宽度或散布在细长微柱之间，以在整个抛光垫中提供均匀的孔隙。

4. 发明授权

US07056194B2 Semiconductor processing methods of removing conductive material 失效
公开(公告)号：US07056194B2
公开(公告)日：2006-06-06
申请号：US10871126
申请日：2004-06-18
申请人： Trung Tri Doan , Scott G. Meikle
发明人： Trung Tri Doan , Scott G. Meikle
IPC分类号： B24B1/00
CPC分类号： B24B37/11 , B23H5/08 , B24B37/042 , B24B37/046 , B24B37/20 , C25F3/30 , H01L21/3212 , H01L21/32125
摘要： The invention includes a semiconductive processing method of electrochemical-mechanical removing at least some of a conductive material from over a surface of a semiconductor substrate. A cathode is provided at a first location of the wafer, and an anode is provided at a second location of the wafer. The conductive material is polished with the polishing pad polishing surface. The polishing occurs at a region of the conductive material and not at another region. The region where the polishing occurs is defined as a polishing operation location. The polishing operation location is displaced across the surface of the substrate from said second location of the substrate toward said first location of the substrate. The polishing operation location is not displaced from said first location toward said second location when the polishing operation location is between the first and second locations. The invention also includes a semiconductor processing method of removing at least some of a conductive material from over a surface of a semiconductive material wafer. A polishing pad is displaced across an upper surface of the wafer from a central region of the wafer toward a periphery of the wafer, and is not displaced from the periphery to the central region.

5. 发明授权

US06790130B2 Semiconductor processing methods of removing conductive material 失效
公开(公告)号：US06790130B2
公开(公告)日：2004-09-14
申请号：US10600907
申请日：2003-06-20
申请人： Trung Tri Doan , Scott G. Meikle
发明人： Trung Tri Doan , Scott G. Meikle
IPC分类号： B24B100
CPC分类号： B24B37/11 , B23H5/08 , B24B37/042 , B24B37/046 , B24B37/20 , C25F3/30 , H01L21/3212 , H01L21/32125
摘要： The invention includes a semiconductive processing method of electrochemical-mechanical removing at least some of a conductive material from over a surface of a semiconductor substrate. A cathode is provided at a first location of the wafer, and an anode is provided at a second location of the wafer. The conductive material is polished with the polishing pad polishing surface. The polishing occurs at a region of the conductive material and not at another region. The region where the polishing occurs is defined as a polishing operation location. The polishing operation location is displaced across the surface of the substrate from said second location of the substrate toward said first location of the substrate. The polishing operation location is not displaced from said first location toward said second location when the polishing operation location is between the first and second locations. The invention also includes a semiconductor processing method of removing at least some of a conductive material from over a surface of a semiconductive material wafer. A polishing pad is displaced across an upper surface of the wafer from a central region of the wafer toward a periphery of the wafer, and is not displaced from the periphery to the central region.

6. 发明授权

US5795218A Polishing pad with elongated microcolumns 失效
标题翻译：抛光垫带细长的微柱
公开(公告)号：US5795218A
公开(公告)日：1998-08-18
申请号：US723901
申请日：1996-09-30
申请人： Trung Tri Doan , Scott G. Meikle
发明人： Trung Tri Doan , Scott G. Meikle
IPC分类号： B24B37/26 , B24D11/00 , B24D13/14 , H01L21/304
CPC分类号： B24B37/26 , B24D11/00 , Y10S451/921
摘要： A polishing pad for use in chemical-mechanical planarization (CMP) of semiconductor wafers includes a multiplicity of elongated microcolumns embedded in a matrix material body. The elongated microcolumns are oriented parallel to each other and extend from a planarizing surface used to planarize the semiconductor wafers. The elongated microcolumns are uniformly distributed throughout the polishing pad in order to impart uniform properties throughout the polishing pad. The polishing pad can also include elongated pores either coaxial width or interspersed between the elongated microcolumns to provide uniform porosity throughout the polishing pad.
摘要翻译：用于半导体晶片的化学机械平面化（CMP）的抛光垫包括嵌入基体材料体中的多个细长的微柱。细长的微柱彼此平行取向并从用于平坦化半导体晶片的平坦化表面延伸。细长的微柱均匀分布在整个抛光垫中，以便在整个抛光垫中赋予均匀的性能。抛光垫还可以包括细长孔，其同轴宽度或散布在细长微柱之间，以在整个抛光垫中提供均匀的孔隙。

7. 发明授权

US08933467B2 Smart integrated semiconductor light emitting system including nitride based light emitting diodes (LED) and application specific integrated circuits (ASIC) 有权
标题翻译：包括氮化物基发光二极管（LED）和专用集成电路（ASIC）的智能集成半导体发光系统
公开(公告)号：US08933467B2
公开(公告)日：2015-01-13
申请号：US13309718
申请日：2011-12-02
申请人： Trung Tri Doan , Tien Wei Tan , Wen-Huang Liu , Chen-Fu Chu , Yung Wei Chen
发明人： Trung Tri Doan , Tien Wei Tan , Wen-Huang Liu , Chen-Fu Chu , Yung Wei Chen
IPC分类号： H01L31/12 , H01L25/16
CPC分类号： H01L25/167 , H01L2224/48091 , H01L2224/48464 , H01L2224/73265 , H01L2924/12032 , H01L2924/13033 , H01L2924/13091 , H01L2924/00014 , H01L2924/00
摘要： A light emitting diode (LED) system includes a substrate, an application specific integrated circuit (ASIC), and at least one light emitting diode (LED) that includes a Group-III nitride based material such as GaN, InGaN, AlGaN, AlInGaN or other (Ga, In or Al) N-based materials. The light emitting diode (LED) system can also include a polymer lens, and a phosphor layer on the lens or light emitting diode (LED) for producing white light. In addition, multiple light emitting diodes (LEDs) can be mounted on the substrate, and can have different colors for smart color control lighting. The substrate and the application specific integrated circuit (ASIC) are configured to provide an integrated LED circuit having smart functionality. In addition, the substrate is configured to compliment and expand the functions of the application specific integrated circuit (ASIC), and can also include built in integrated circuits for performing additional electrical functions.
摘要翻译：发光二极管（LED）系统包括衬底，专用集成电路（ASIC）和至少一个发光二极管（LED），其包括III族氮化物基材料，例如GaN，InGaN，AlGaN，AlInGaN或其他（Ga，In或Al）N基材料。发光二极管（LED）系统还可以包括聚合物透镜和用于产生白光的透镜或发光二极管（LED）上的荧光体层。此外，多个发光二极管（LED）可以安装在基板上，并且可以具有用于智能色彩控制照明的不同颜色。衬底和专用集成电路（ASIC）被配置为提供具有智能功能的集成LED电路。此外，衬底被配置为补充和扩展专用集成电路（ASIC）的功能，并且还可以包括用于执行附加电功能的内置集成电路。

8. 发明授权

US08283652B2 Vertical light emitting diode (VLED) die having electrode frame and method of fabrication 有权
标题翻译：具有电极框架和制造方法的垂直发光二极管（VLED）芯片
公开(公告)号：US08283652B2
公开(公告)日：2012-10-09
申请号：US12845007
申请日：2010-07-28
申请人： Chen-Fu Chu , Feng-Hsu Fan , Hao-Chun Cheng , Trung Tri Doan
发明人： Chen-Fu Chu , Feng-Hsu Fan , Hao-Chun Cheng , Trung Tri Doan
IPC分类号： H01L33/04
CPC分类号： H01L33/38 , H01L33/32 , H01L33/405 , H01L33/44 , H01L33/641 , H01L33/647
摘要： A vertical light emitting diode (VLED) die includes a metal base; a mirror on the metal base; a p-type semiconductor layer on the reflector layer; a multiple quantum well (MQW) layer on the p-type semiconductor layer configured to emit light; and an n-type semiconductor layer on the multiple quantum well (MQW) layer. The vertical light emitting diode (VLED) die also includes an electrode and an electrode frame on the n-type semiconductor layer, and an organic or inorganic material contained within the electrode frame. The electrode and the electrode frame are configured to provide a high current capacity and to spread current from the outer periphery to the center of the n-type semiconductor layer. The vertical light emitting diode (VLED) die can also include a passivation layer formed on the metal base surrounding and electrically insulating the electrode frame, the edges of the mirror, the edges of the p-type semiconductor layer, the edges of the multiple quantum well (MQW) layer and the edges of the n-type semiconductor layer.
摘要翻译：垂直发光二极管（VLED）模具包括金属基底; 金属底座上的镜子; 反射层上的p型半导体层; 配置成发光的p型半导体层上的多量子阱（MQW）层; 和多量子阱（MQW）层上的n型半导体层。垂直发光二极管（VLED）裸片还包括在n型半导体层上的电极和电极框架，以及包含在电极框架内的有机或无机材料。电极和电极框架被配置为提供高电流容量并且将电流从外周延伸到n型半导体层的中心。垂直发光二极管（VLED）裸片还可以包括形成在金属基底上的钝化层，该钝化层围绕并电绝缘电极框架，反射镜的边缘，p型半导体层的边缘，多个量子的边缘（MQW）层和n型半导体层的边缘。

9. 发明申请

US20120091466A1 Smart Integrated Semiconductor Light Emitting System Including Nitride Based Light Emitting Diodes (LED) And Application Specific Integrated Circuits (ASIC) 有权
标题翻译：包括氮化物发光二极管（LED）和专用集成电路（ASIC）的智能集成半导体发光系统
公开(公告)号：US20120091466A1
公开(公告)日：2012-04-19
申请号：US13309718
申请日：2011-12-02
申请人： Trung Tri Doan , Tien Wei Tan , Wen-Huang Liu , Chen-Fu Chu , Yung Wei Chen
发明人： Trung Tri Doan , Tien Wei Tan , Wen-Huang Liu , Chen-Fu Chu , Yung Wei Chen
IPC分类号： H01L33/08 , H01L33/32
CPC分类号： H01L25/167 , H01L2224/48091 , H01L2224/48464 , H01L2224/73265 , H01L2924/12032 , H01L2924/13033 , H01L2924/13091 , H01L2924/00014 , H01L2924/00
摘要： A light emitting diode (LED) system includes a substrate, an application specific integrated circuit (ASIC), and at least one light emitting diode (LED) that includes a Group-III nitride based material such as GaN, InGaN, AlGaN, AlInGaN or other (Ga, In or Al) N-based materials. The light emitting diode (LED) system can also include a polymer lens, and a phosphor layer on the lens or light emitting diode (LED) for producing white light. In addition, multiple light emitting diodes (LEDs) can be mounted on the substrate, and can have different colors for smart color control lighting. The substrate and the application specific integrated circuit (ASIC) are configured to provide an integrated LED circuit having smart functionality. In addition, the substrate is configured to compliment and expand the functions of the application specific integrated circuit (ASIC), and can also include built in integrated circuits for performing additional electrical functions.
摘要翻译：发光二极管（LED）系统包括衬底，专用集成电路（ASIC）和至少一个发光二极管（LED），其包括III族氮化物基材料，例如GaN，InGaN，AlGaN，AlInGaN或其他（Ga，In或Al）N基材料。发光二极管（LED）系统还可以包括聚合物透镜和用于产生白光的透镜或发光二极管（LED）上的荧光体层。此外，多个发光二极管（LED）可以安装在基板上，并且可以具有用于智能色彩控制照明的不同颜色。衬底和专用集成电路（ASIC）被配置为提供具有智能功能的集成LED电路。此外，衬底被配置为补充和扩展专用集成电路（ASIC）的功能，并且还可以包括用于执行附加电功能的内置集成电路。

10. 发明授权

US08124454B1 Die separation 有权
标题翻译：模具分离
公开(公告)号：US08124454B1
公开(公告)日：2012-02-28
申请号：US11548629
申请日：2006-10-11
申请人： Chen-Fu Chu , Trung Tri Doan , Chuong Anh Tran , Chao-Chen Cheng , Jiunn-Yi Chu , Wen-Huang Liu , Hao-Chun Cheng , Feng-Hsu Fan , Jui-Kang Yen
发明人： Chen-Fu Chu , Trung Tri Doan , Chuong Anh Tran , Chao-Chen Cheng , Jiunn-Yi Chu , Wen-Huang Liu , Hao-Chun Cheng , Feng-Hsu Fan , Jui-Kang Yen
IPC分类号： H01L21/00
CPC分类号： H01L33/0079 , H01L33/0095 , H01L33/44 , H01L33/46 , H01S5/0201 , H01S5/0217 , H01S5/32341
摘要： Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.
摘要翻译：提供了用于制造金属器件的技术，例如垂直发光二极管（VLED）器件，功率器件，激光二极管和垂直腔表面发射激光器件。相应地生产的器件可以比常规金属器件更高的产量和更高的性能受益，例如发光二极管的较高的亮度和增加的导热性。此外，本发明公开了在具有原始非导热和/或非导电性的金属器件的高散热率的情况下适用于GaN基电子器件的制造技术中的技术。（或低）导电载体衬底。

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