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1. 发明授权

US08933467B2 Smart integrated semiconductor light emitting system including nitride based light emitting diodes (LED) and application specific integrated circuits (ASIC) 有权
标题翻译：包括氮化物基发光二极管（LED）和专用集成电路（ASIC）的智能集成半导体发光系统
公开(公告)号：US08933467B2
公开(公告)日：2015-01-13
申请号：US13309718
申请日：2011-12-02
申请人： Trung Tri Doan , Tien Wei Tan , Wen-Huang Liu , Chen-Fu Chu , Yung Wei Chen
发明人： Trung Tri Doan , Tien Wei Tan , Wen-Huang Liu , Chen-Fu Chu , Yung Wei Chen
IPC分类号： H01L31/12 , H01L25/16
CPC分类号： H01L25/167 , H01L2224/48091 , H01L2224/48464 , H01L2224/73265 , H01L2924/12032 , H01L2924/13033 , H01L2924/13091 , H01L2924/00014 , H01L2924/00
摘要： A light emitting diode (LED) system includes a substrate, an application specific integrated circuit (ASIC), and at least one light emitting diode (LED) that includes a Group-III nitride based material such as GaN, InGaN, AlGaN, AlInGaN or other (Ga, In or Al) N-based materials. The light emitting diode (LED) system can also include a polymer lens, and a phosphor layer on the lens or light emitting diode (LED) for producing white light. In addition, multiple light emitting diodes (LEDs) can be mounted on the substrate, and can have different colors for smart color control lighting. The substrate and the application specific integrated circuit (ASIC) are configured to provide an integrated LED circuit having smart functionality. In addition, the substrate is configured to compliment and expand the functions of the application specific integrated circuit (ASIC), and can also include built in integrated circuits for performing additional electrical functions.
摘要翻译：发光二极管（LED）系统包括衬底，专用集成电路（ASIC）和至少一个发光二极管（LED），其包括III族氮化物基材料，例如GaN，InGaN，AlGaN，AlInGaN或其他（Ga，In或Al）N基材料。发光二极管（LED）系统还可以包括聚合物透镜和用于产生白光的透镜或发光二极管（LED）上的荧光体层。此外，多个发光二极管（LED）可以安装在基板上，并且可以具有用于智能色彩控制照明的不同颜色。衬底和专用集成电路（ASIC）被配置为提供具有智能功能的集成LED电路。此外，衬底被配置为补充和扩展专用集成电路（ASIC）的功能，并且还可以包括用于执行附加电功能的内置集成电路。

2. 发明授权

US08283652B2 Vertical light emitting diode (VLED) die having electrode frame and method of fabrication 有权
标题翻译：具有电极框架和制造方法的垂直发光二极管（VLED）芯片
公开(公告)号：US08283652B2
公开(公告)日：2012-10-09
申请号：US12845007
申请日：2010-07-28
申请人： Chen-Fu Chu , Feng-Hsu Fan , Hao-Chun Cheng , Trung Tri Doan
发明人： Chen-Fu Chu , Feng-Hsu Fan , Hao-Chun Cheng , Trung Tri Doan
IPC分类号： H01L33/04
CPC分类号： H01L33/38 , H01L33/32 , H01L33/405 , H01L33/44 , H01L33/641 , H01L33/647
摘要： A vertical light emitting diode (VLED) die includes a metal base; a mirror on the metal base; a p-type semiconductor layer on the reflector layer; a multiple quantum well (MQW) layer on the p-type semiconductor layer configured to emit light; and an n-type semiconductor layer on the multiple quantum well (MQW) layer. The vertical light emitting diode (VLED) die also includes an electrode and an electrode frame on the n-type semiconductor layer, and an organic or inorganic material contained within the electrode frame. The electrode and the electrode frame are configured to provide a high current capacity and to spread current from the outer periphery to the center of the n-type semiconductor layer. The vertical light emitting diode (VLED) die can also include a passivation layer formed on the metal base surrounding and electrically insulating the electrode frame, the edges of the mirror, the edges of the p-type semiconductor layer, the edges of the multiple quantum well (MQW) layer and the edges of the n-type semiconductor layer.
摘要翻译：垂直发光二极管（VLED）模具包括金属基底; 金属底座上的镜子; 反射层上的p型半导体层; 配置成发光的p型半导体层上的多量子阱（MQW）层; 和多量子阱（MQW）层上的n型半导体层。垂直发光二极管（VLED）裸片还包括在n型半导体层上的电极和电极框架，以及包含在电极框架内的有机或无机材料。电极和电极框架被配置为提供高电流容量并且将电流从外周延伸到n型半导体层的中心。垂直发光二极管（VLED）裸片还可以包括形成在金属基底上的钝化层，该钝化层围绕并电绝缘电极框架，反射镜的边缘，p型半导体层的边缘，多个量子的边缘（MQW）层和n型半导体层的边缘。

3. 发明申请

US20120091466A1 Smart Integrated Semiconductor Light Emitting System Including Nitride Based Light Emitting Diodes (LED) And Application Specific Integrated Circuits (ASIC) 有权
标题翻译：包括氮化物发光二极管（LED）和专用集成电路（ASIC）的智能集成半导体发光系统
公开(公告)号：US20120091466A1
公开(公告)日：2012-04-19
申请号：US13309718
申请日：2011-12-02
申请人： Trung Tri Doan , Tien Wei Tan , Wen-Huang Liu , Chen-Fu Chu , Yung Wei Chen
发明人： Trung Tri Doan , Tien Wei Tan , Wen-Huang Liu , Chen-Fu Chu , Yung Wei Chen
IPC分类号： H01L33/08 , H01L33/32
CPC分类号： H01L25/167 , H01L2224/48091 , H01L2224/48464 , H01L2224/73265 , H01L2924/12032 , H01L2924/13033 , H01L2924/13091 , H01L2924/00014 , H01L2924/00
摘要： A light emitting diode (LED) system includes a substrate, an application specific integrated circuit (ASIC), and at least one light emitting diode (LED) that includes a Group-III nitride based material such as GaN, InGaN, AlGaN, AlInGaN or other (Ga, In or Al) N-based materials. The light emitting diode (LED) system can also include a polymer lens, and a phosphor layer on the lens or light emitting diode (LED) for producing white light. In addition, multiple light emitting diodes (LEDs) can be mounted on the substrate, and can have different colors for smart color control lighting. The substrate and the application specific integrated circuit (ASIC) are configured to provide an integrated LED circuit having smart functionality. In addition, the substrate is configured to compliment and expand the functions of the application specific integrated circuit (ASIC), and can also include built in integrated circuits for performing additional electrical functions.
摘要翻译：发光二极管（LED）系统包括衬底，专用集成电路（ASIC）和至少一个发光二极管（LED），其包括III族氮化物基材料，例如GaN，InGaN，AlGaN，AlInGaN或其他（Ga，In或Al）N基材料。发光二极管（LED）系统还可以包括聚合物透镜和用于产生白光的透镜或发光二极管（LED）上的荧光体层。此外，多个发光二极管（LED）可以安装在基板上，并且可以具有用于智能色彩控制照明的不同颜色。衬底和专用集成电路（ASIC）被配置为提供具有智能功能的集成LED电路。此外，衬底被配置为补充和扩展专用集成电路（ASIC）的功能，并且还可以包括用于执行附加电功能的内置集成电路。

4. 发明授权

US08124454B1 Die separation 有权
标题翻译：模具分离
公开(公告)号：US08124454B1
公开(公告)日：2012-02-28
申请号：US11548629
申请日：2006-10-11
申请人： Chen-Fu Chu , Trung Tri Doan , Chuong Anh Tran , Chao-Chen Cheng , Jiunn-Yi Chu , Wen-Huang Liu , Hao-Chun Cheng , Feng-Hsu Fan , Jui-Kang Yen
发明人： Chen-Fu Chu , Trung Tri Doan , Chuong Anh Tran , Chao-Chen Cheng , Jiunn-Yi Chu , Wen-Huang Liu , Hao-Chun Cheng , Feng-Hsu Fan , Jui-Kang Yen
IPC分类号： H01L21/00
CPC分类号： H01L33/0079 , H01L33/0095 , H01L33/44 , H01L33/46 , H01S5/0201 , H01S5/0217 , H01S5/32341
摘要： Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.
摘要翻译：提供了用于制造金属器件的技术，例如垂直发光二极管（VLED）器件，功率器件，激光二极管和垂直腔表面发射激光器件。相应地生产的器件可以比常规金属器件更高的产量和更高的性能受益，例如发光二极管的较高的亮度和增加的导热性。此外，本发明公开了在具有原始非导热和/或非导电性的金属器件的高散热率的情况下适用于GaN基电子器件的制造技术中的技术。（或低）导电载体衬底。

5. 发明申请

US20110217799A1 METHOD OF SEPARATING SEMICONDUCTOR DIES 有权
标题翻译：分离半导体器件的方法
公开(公告)号：US20110217799A1
公开(公告)日：2011-09-08
申请号：US13109687
申请日：2011-05-17
申请人： Chen-Fu Chu , Trung Tri Doan , Hao-Chun Cheng , Feng-Hsu Fan , Fu-Hsien Wang
发明人： Chen-Fu Chu , Trung Tri Doan , Hao-Chun Cheng , Feng-Hsu Fan , Fu-Hsien Wang
IPC分类号： H01L21/786
CPC分类号： H01L33/0079 , H01L33/0095
摘要： A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.
摘要翻译：描述了在半导体制造期间分离多个管芯的方法。在包含多个模具的半导体晶片的上表面上，除了存在一块停止电镀材料之外，金属层被沉积。停止电镀材料被消除，并且在整个剩余结构上方形成阻挡层。在阻挡层上方添加牺牲金属元素，然后去除衬底。在消除各个管芯之间的半导体材料之后，将任何期望的接合焊盘和图案化电路添加到与牺牲金属元件相对的半导体表面，在该表面上添加钝化层，然后去除牺牲金属元件。将胶带添加到现在暴露的阻挡层中，去除钝化层，将所得结构翻转，并且将带扩展以分离各个模具。

6. 发明申请

US20100264432A1 LIGHT EMITTING DEVICE WITH HIGH COLOR RENDERING INDEX AND HIGH LUMINESCENCE EFFICIENCY 有权
标题翻译：具有高色彩渲染指标和高亮度效率的发光装置
公开(公告)号：US20100264432A1
公开(公告)日：2010-10-21
申请号：US12690828
申请日：2010-01-20
申请人： Wen-Huang Liu , Trung Tri Doan , Chuong Ahn Tran
发明人： Wen-Huang Liu , Trung Tri Doan , Chuong Ahn Tran
IPC分类号： H01L33/00
CPC分类号： H01L25/0753 , H01L33/44 , H01L33/50 , H01L33/54 , H01L33/56 , H01L2224/48091 , H01L2224/8592 , H01L2924/0002 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A light emitting device comprises two light-emitting diode (LED) groups, a group of luminophor layers, and an input terminal. The first LED group includes at least one blue LED emitting light having a dominant wavelength in a range between 400 nm and 480 nm, and the second LED group includes at least one red-orange LED emitting light having a dominant wavelength in a range between 610 nm and 630 nm. The group of luminophor layers, which are selected from one of silicates, nitrides, and nitrogen oxides, are positioned above the first LED group and partially converts the light emitted by the first LED group into light having a dominant wavelength in a range between 500 nm and 555 nm. The input terminal is connected to the two LED groups for providing desired electric energy thereto.
摘要翻译：发光器件包括两个发光二极管（LED）组，一组发光体层和一个输入端子。第一LED组包括至少一个主要波长在400nm和480nm之间的蓝色LED发光，并且第二LED组包括至少一个红色 - 橙色LED发光，其主波长在610 nm和630nm。选自硅酸盐，氮化物和氮氧化物之一的发光体层组位于第一LED组上方，并且将由第一LED组发射的光部分地转换成具有主波长的光在500nm 和555nm。输入端子连接到两个LED组，用于向其提供所需的电能。

7. 发明授权

US07465406B2 Method of exposing a substrate to a surface microwave plasma, etching method, deposition method, surface microwave plasma generating apparatus, semiconductor substrate etching apparatus, semiconductor substrate deposition apparatus, and microwave plasma generating antenna assembly 有权
标题翻译：将基板曝光于表面微波等离子体的方法，蚀刻方法，沉积方法，表面微波等离子体生成装置，半导体基板蚀刻装置，半导体基板沉积装置和微波等离子体产生天线组件
公开(公告)号：US07465406B2
公开(公告)日：2008-12-16
申请号：US11448996
申请日：2006-06-07
申请人： Guy T. Blalock , Trung Tri Doan
发明人： Guy T. Blalock , Trung Tri Doan
IPC分类号： H01L21/302
CPC分类号： H01J37/3222 , H01J37/32192 , H01Q1/366
摘要： In certain implementations, methods and apparatus include an antenna assembly having at least two overlapping and movable surface microwave plasma antennas. The antennas have respective pluralities of microwave transmissive openings formed therethrough. At least some of the openings of the respective antennas overlap with at least some of the openings of another antenna, and form an effective plurality of microwave transmissive openings through the antenna assembly. Microwave energy is passed through the effective plurality of openings of the antenna assembly and to a flowing gas effective to form a surface microwave plasma onto a substrate received within the processing chamber. At least one of the antennas is moved relative to another of the antennas to change at least one of size and shape of the effective plurality of openings through the antenna assembly effective to modify microwave energy passed through the antenna assembly to the substrate.
摘要翻译：在某些实施方案中，方法和装置包括具有至少两个重叠和可移动的表面微波等离子体天线的天线组件。天线具有通过其形成的相应的多个微波透射开口。各个天线的至少一些开口与另一个天线的至少一些开口重叠，并且通过天线组件形成有效的多个微波透射开口。微波能量通过天线组件的有效多个开口并流过有效地将表面微波等离子体形成在接收在处理室内的衬底上的流动气体。天线中的至少一个相对于另一个天线移动，以通过天线组件改变有效多个开口的尺寸和形状中的至少一个，其有效地将通过天线组件的微波能量修改到衬底。

8. 发明授权

US07432600B2 System having semiconductor component with multiple stacked dice 有权
标题翻译：具有多个堆叠骰子的半导体元件的系统
公开(公告)号：US07432600B2
公开(公告)日：2008-10-07
申请号：US11473731
申请日：2006-06-23
申请人： Dean A. Klein , Alan G. Wood , Trung Tri Doan
发明人： Dean A. Klein , Alan G. Wood , Trung Tri Doan
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/48 , B33Y80/00 , H01L21/563 , H01L23/3114 , H01L23/49833 , H01L24/10 , H01L24/13 , H01L25/0652 , H01L25/0657 , H01L2224/05568 , H01L2224/05573 , H01L2224/13 , H01L2224/13099 , H01L2224/16145 , H01L2224/73203 , H01L2224/73204 , H01L2225/06513 , H01L2225/06524 , H01L2225/06527 , H01L2225/06586 , H01L2225/06596 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01078 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/18161 , H01L2924/19041 , H01L2924/351 , H01L2924/00 , H01L2224/05599
摘要： A system includes a semiconductor component having a base die and a secondary die flip chip mounted to the base die. The base die includes a set of stacking contacts for flip chip mounting the secondary die to the base die, and a set of interconnect contacts configured as an internal signal transmission system, and a physical structure for supporting a terminal contact system of the package component. The component also includes an encapsulant on the base die encapsulating the interconnect contacts, an underfill layer between the dice, and terminal contacts configured for flip chip mounting the package component to a supporting substrate.
摘要翻译：一种系统包括具有安装在基模上的基模和二次晶片倒装芯片的半导体部件。基座芯片包括用于将二次管芯倒装芯片安装到基底管芯的一组叠置触点，以及一组配置为内部信号传输系统的互连触头，以及用于支撑封装部件的端子接触系统的物理结构。该组件还包括在基底模具上封装了互连触头的密封剂，芯片之间的底部填充层和被配置用于将封装部件倒装芯片安装到支撑衬底的端子触头。

9. 发明授权

US07367871B2 Semiconductor processing methods of removing conductive material 有权
标题翻译：去除导电材料的半导体加工方法
公开(公告)号：US07367871B2
公开(公告)日：2008-05-06
申请号：US11449201
申请日：2006-06-05
申请人： Trung Tri Doan , Scott G. Meikle
发明人： Trung Tri Doan , Scott G. Meikle
IPC分类号： B24B1/00
CPC分类号： B24B37/11 , B23H5/08 , B24B37/042 , B24B37/046 , B24B37/20 , C25F3/30 , H01L21/3212 , H01L21/32125
摘要： The invention includes a semiconductive processing method of electrochemical-mechanical removing at least some of a conductive material from over a surface of a semiconductor substrate. A cathode is provided at a first location of the wafer, and an anode is provided at a second location of the wafer. The conductive material is polished with the polishing pad polishing surface. The polishing occurs at a region of the conductive material and not at another region. The region where the polishing occurs is defined as a polishing operation location. The polishing operation location is displaced across the surface of the substrate from said second location of the substrate toward said first location of the substrate. The polishing operation location is not displaced from said first location toward said second location when the polishing operation location is between the first and second locations. The invention also includes a semiconductor processing method of removing at least some of a conductive material from over a surface of a semiconductive material wafer. A polishing pad is displaced across an upper surface of the wafer from a central region of the wafer toward a periphery of the wafer, and is not displaced from the periphery to the central region.
摘要翻译：本发明包括从半导体衬底的表面上电化学 - 机械去除至少一些导电材料的半导体处理方法。阴极设置在晶片的第一位置处，并且阳极设置在晶片的第二位置处。用抛光垫抛光表面抛光导电材料。抛光发生在导电材料的区域而不是在另一区域。抛光发生的区域被定义为抛光操作位置。抛光操作位置从衬底的所述第二位置横跨衬底的表面移动到衬底的所述第一位置。当抛光操作位置在第一和第二位置之间时，抛光操作位置不会从所述第一位置移动到所述第二位置。本发明还包括从半导体材料晶片的表面上去除至少一些导电材料的半导体加工方法。抛光垫从晶片的中心区域朝着晶片的周边跨越晶片的上表面移位，并且不会从周边移动到中心区域。

10. 发明申请

US20070212854A1 METHOD OF SEPARATING SEMICONDUCTOR DIES 有权
标题翻译：分离半导体器件的方法
公开(公告)号：US20070212854A1
公开(公告)日：2007-09-13
申请号：US11682814
申请日：2007-03-06
申请人： Chen-Fu Chu , Trung Tri Doan , Hao-Chun Cheng , Feng-Hsu Fan , Fu-Hsien Wang
发明人： Chen-Fu Chu , Trung Tri Doan , Hao-Chun Cheng , Feng-Hsu Fan , Fu-Hsien Wang
IPC分类号： H01L21/00
CPC分类号： H01L33/0079 , H01L33/0095
摘要： A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.
摘要翻译：描述了在半导体制造期间分离多个管芯的方法。在包含多个模具的半导体晶片的上表面上，除了存在一块停止电镀材料之外，金属层被沉积。停止电镀材料被消除，并且在整个剩余结构上方形成阻挡层。在阻挡层上方添加牺牲金属元素，然后去除衬底。在消除各个管芯之间的半导体材料之后，将任何期望的接合焊盘和图案化电路添加到与牺牲金属元件相对的半导体表面，在该表面上添加钝化层，然后去除牺牲金属元件。将胶带添加到现在暴露的阻挡层中，去除钝化层，将所得结构翻转，并且将带扩展以分离各个模具。

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