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    • 10. 发明申请
    • STRAINED SEMICONDUCTOR-ON-INSULATOR BY ADDITION AND REMOVAL OF ATOMS IN A SEMICONDUCTOR-ON-INSULATOR
    • 通过在半导体绝缘体中添加和去除原子的应变半导体绝缘体
    • US20120009766A1
    • 2012-01-12
    • US12830626
    • 2010-07-06
    • Thomas N. AdamStephen W. BedellJoel P. de SouzaKeith E. FogelAlexander ReznicekDevendra K. SadanaGhavam G. Shahidi
    • Thomas N. AdamStephen W. BedellJoel P. de SouzaKeith E. FogelAlexander ReznicekDevendra K. SadanaGhavam G. Shahidi
    • H01L21/20
    • H01L29/1054H01L29/7833
    • A method of forming a strained semiconductor-on-insulator (SSOI) substrate that does not include wafer bonding is provided. In this disclosure a relaxed and doped silicon layer is formed on an upper surface of a silicon-on-insulator (SOI) substrate. In one embodiment, the dopant within the relaxed and doped silicon layer has an atomic size that is smaller than the atomic size of silicon and, as such, the in-plane lattice parameter of the relaxed and doped silicon layer is smaller than the in-plane lattice parameter of the underlying SOI layer. In another embodiment, the dopant within the relaxed and doped silicon layer has an atomic size that is larger than the atomic size of silicon and, as such, the in-plane lattice parameter of the relaxed and doped silicon layer is larger than the in-plane lattice parameter of the underlying SOI layer. After forming the relaxed and doped silicon layer on the SOI substrate, the dopant within the relaxed and doped silicon layer is removed from that layer converting the relaxed and doped silicon layer into a strained (compressively or tensilely) silicon layer that is formed on an upper surface of an SOI substrate.
    • 提供了一种形成不包括晶片接合的应变绝缘体上半导体(SSOI)衬底的方法。 在本公开中,在绝缘体上硅(SOI)衬底的上表面上形成松弛和掺杂的硅层。 在一个实施例中,松弛和掺杂硅层内的掺杂剂具有小于硅的原子尺寸的原子尺寸,因此松弛和掺杂硅层的面内晶格参数小于硅的原子尺寸, 下层SOI层的平面晶格参数。 在另一实施例中,松弛和掺杂硅层内的掺杂剂具有大于硅的原子尺寸的原子尺寸,因此松弛和掺杂硅层的面内晶格参数大于硅原子尺寸, 下层SOI层的平面晶格参数。 在SOI衬底上形成松弛和掺杂的硅层之后,从该层去除松弛和掺杂硅层内的掺杂剂,将松散和掺杂的硅层转化成形成在上层的应变(压缩或拉伸)硅层 SOI衬底的表面。