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    • 1. 发明申请
    • READ METHOD AND SENSING DEVICE
    • 读取方法和传感设备
    • WO2006033581A1
    • 2006-03-30
    • PCT/NO2005/000347
    • 2005-09-21
    • THIN FILM ELECTRONICS ASAKARLSSON, ChristerLÖVGREN, NicklasWOMACK, Richard
    • KARLSSON, ChristerLÖVGREN, NicklasWOMACK, Richard
    • G11C11/22
    • G11C11/22G11C7/062
    • In a method for reading the memory cell in a passive matrix-addressable ferroelectric or electret memory array with memory cells in the form of ferroelectric or electret capacitors, sensing means connected to the bit line of memory cell is activated in order to initiate a charge measurement and a first charge value is registered, whereafter a switching voltage is applied to the memory cell and a second charge value is registered. A readout value is obtained by subtracting the first charge value from the second charge value. A sensing device for performing the method of the invention comprises a first amplifier stage (Al) with an integrator circuit (715) and connected with a second amplifier stage (A2) following the first amplifier stage and with an integrator circuit (725), and a sampling capacitor (720) connected between an output (716) of the first amplifier stage (Al) and an input (722) of the second amplifier stage (A2).
    • 在用于以具有铁电或驻极体电容器形式的存储单元读取无源矩阵可寻址铁电或驻极体存储器阵列中的存储单元的方法中,连接到存储单元的位线的感测装置是 激活以启动电荷测量并记录第一电荷值,随后将切换电压施加到存储器单元并记录第二电荷值。 通过从第二电荷值中减去第一电荷值来获得读出值。 用于执行本发明的方法的感测装置包括具有积分器电路(715)并且与第一放大器级之后的第二放大器级(A2)和积分器电路(725)连接的第一放大器级(A1),以及 连接在第一放大器级(A1)的输出(716)和第二放大器级(A2)的输入(722)之间的采样电容器(720)。
    • 2. 发明申请
    • NON-SWITCHING PRE-AND POST-DISTURB COMPENSATIONAL PULSES
    • 非开关预失真和补偿补偿脉冲
    • WO2005078730A1
    • 2005-08-25
    • PCT/NO2005/000044
    • 2005-02-07
    • THIN FILM ELECTRONICS ASAKARLSSON, ChristerHAMBERG, PerBJÖRKLID, StaffanTHOMPSON, Michael, O.WOMACK, Richard
    • KARLSSON, ChristerHAMBERG, PerBJÖRKLID, StaffanTHOMPSON, Michael, O.WOMACK, Richard
    • G11C11/22
    • G11C11/22
    • In a method for operating a passive matrix-addessable ferroelectric or electret memory device comprising memory cells in the form of a ferroelectric or electret thin-film polarizable memory material exhibiting hysteresis, particularly a ferroelectric or electret polymer thin film, and a first set of parallel electrodes forming word line electrodes in the device and a second set of parallel electrodes forming bit lines in the device, the word lines being oriented orthogonally to the bit lines, such that the word lines and bit lines are in direct contact with the memory cells, which can be set to either of two polarization states or switched between these by applying a switching voltage larger than a coercive voltage of the memory material between a word line and a bit line, a voltage pulse protocol with at least one disturb generating operation cycle is applied for switching selected addressed cells to determined polarization state. The voltage pulse protocol further comprises a pre-disturb and/or post-disturb cycle before and after the disturb generating operation cycle respectively in order to minimize the effect of disturb voltages on non-addressed memory cells, when such voltages are generated thereto in the operation cycle when it is applied for either a write or read operation.
    • 在一种用于操作无源矩阵可加性铁电或驻极体存储器件的方法中,该器件包括呈现滞后性的铁电或驻极体薄膜可极化存储材料形式的存储单元,特别是铁电或驻极体聚合物薄膜,以及第一组平行 在器件中形成字线电极的电极和在器件中形成位线的第二组并联电极,字线与位线正交定向,使得字线和位线与存储器单元直接接触, 通过施加大于字线和位线之间的存储材料的矫顽电压的开关电压,可将其设置为两个极化状态中的任一个或在其之间切换,具有至少一个干扰产生操作周期的电压脉冲协议是 用于将所选择的寻址单元切换到确定的极化状态。 电压脉冲协议还包括在干扰产生操作周期之前和之后的预先干扰和/或干扰后周期,以便最小化干扰电压对非寻址存储器单元的影响,当在其中产生这样的电压时 当它被应用于写入或读取操作时的操作周期。
    • 3. 发明申请
    • SENSING DEVICE FOR A PASSIVE MATRIX MEMORY AND A READ METHOD FOR USE THEREWITH
    • 用于被动矩阵存储器的感测装置及其使用的读取方法
    • WO2002017322A2
    • 2002-02-28
    • PCT/NO2001/000347
    • 2001-08-24
    • THIN FILM ELECTRONICS ASATHOMPSON, MichaelWOMACK, Richard
    • THOMPSON, MichaelWOMACK, Richard
    • G11C11/22
    • G11C11/22G11C27/026
    • A sensing device (10) for reading data stored in a passive matrix memory comprising memory cells in the form of ferroelectric capacitors, comprises an integrator circuit (11) for sensing the current response and means (16, 17, 18) for storing and comparing two consecutive read values, one of which is a reference value. In a read method for use with the sensing device a bit line is connected to the sensing device for sensing a charge flowing therebetween and a memory cell at the crossing of the former and an activated word line, whereafter two consecutive reads of the memory cell are performed an integrated over predetermined time periods in order to generate first and second read values which are compared for determining a logical value dependent on the sensed charge.
    • 一种用于读取存储在包括铁电电容器形式的存储单元的无源矩阵存储器中的数据的感测装置(10),包括用于感测电流响应的积分器电路(11)和用于存储和比较的装置(16,17,18) 两个连续的读取值,其中一个是参考值。 在与感测装置一起使用的读取方法中,位线连接到感测装置,用于感测在其间流动的电荷和在前者与激活字线交叉处的存储器单元,之后存储器单元的两个连续读取是 在预定时间周期内执行积分,以便产生第一和第二读取值,所述第一和第二读取值被比较以确定取决于感测到的电荷的逻辑值。
    • 7. 发明授权
    • NON-VOLATILE PASSIVE MATRIX AND METHOD FOR READOUT OF THE SAME
    • NICHTFLUECHTIGE被动记忆阵列及其读法
    • EP1316090B1
    • 2005-03-09
    • EP01985301.9
    • 2001-08-24
    • Thin Film Electronics ASA
    • THOMPSON, MichaelWOMACK, RichardGUSTAFSSON, GöranCARLSSON, Johan
    • G11C5/00
    • G11C7/1006G11C7/06G11C11/22
    • In a non-volatile passive matrix memory device (10) comprising an electrically polarizable dielectric memory material (12) exhibiting hysteresis between first and second sets (14; 15) of addressing electrodes, the electrodes of the first set (14) are word lines (WL) and the electrodes of the second set (15) are bit lines (BL) of the memory device. A memory cell (13) with a capacitor-like structure is defined in the memory material (12) at the overlap between a word line (WL) and a bit line (BL). The word lines (WL) are divided into segments (S) with each segment sharing and being defined by adjoining bit lines (BL) and means (25) are provided for connecting each bit line (BL) of a segment (S) with a sensing means (26), thus enabling simultaneous connections of all memory cells (13) of a word line segment (15) for readout via the bit lines (BL) of the segment (S). Each sensing means (26) senses the charge flow in a bit line (BK) in order to determine a logical value stored in a memory cell (13) defined by the bit line (BL). In a readout method for a memory device of this kind a word line (WL) of a segment (S) is activated according to a protocol by setting its potential to a switching voltage Vs of the memory cell (13) during at least a portion of a read cycle, while keeping the bit lines (BL) of a segment (S) at zero potential, during which read cycle a logical value stored in the individual memory cells (13) is sensed by the sensing means (26). Use in a volumetric data storage apparatus with a plurality of stacked layers which each comprises a non-volatile passive matrix memory device.