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1. 发明授权

US4755770A Low noise current spectral density input bias current cancellation scheme 失效
标题翻译：低噪声电流频谱密度输入偏置电流消除方案
公开(公告)号：US4755770A
公开(公告)日：1988-07-05
申请号：US896097
申请日：1986-08-13
申请人： Terry J. Groom , James P. Furino, Jr.
发明人： Terry J. Groom , James P. Furino, Jr.
IPC分类号： H03F1/56 , H03F3/04
CPC分类号： H03F1/56
摘要： A current cancellation circuit having, and method for producing, a low noise spectral density current for cancelling the DC input bias current of an input signal to an amplifier. The cancellation circuit provides for generating a DC cancelling current having a magnitude K times greater than the magnitude of the input DC bias current and then reducing the same by K times. The resulting cancelling current has a reduced noise current spectral density associated with it, thereby reducing the overall noise current spectral density of the input stage.
摘要翻译：电流消除电路具有用于产生用于消除输入信号到放大器的DC输入偏置电流的低噪声频谱密度电流的方法。消除电路用于产生具有比输入的DC偏置电流的大小K倍大的DC消除电流，然后将其减小K倍。所得到的抵消电流具有与其相关联的降低的噪声电流频谱密度，从而降低输入级的整体噪声电流频谱密度。

2. 发明授权

US5883565A Frequency dependent resistive element 失效
标题翻译：频率依赖电阻元件
公开(公告)号：US5883565A
公开(公告)日：1999-03-16
申请号：US941704
申请日：1997-10-01
申请人： James P. Furino, Jr.
发明人： James P. Furino, Jr.
IPC分类号： H01C13/00 , H01P1/20
CPC分类号： H01P1/20
摘要： A frequency dependent resistor in which the length of the current path across the resistor varies as a function of the frequency of the electrical signals being passed therethrough. The resistor uses the principal known as skin effect to direct relatively higher frequency signals through a longer path through the resistor than is experienced by signals having a relatively low frequency.
摘要翻译：一个频率相关电阻器，其中跨过电阻器的电流通路的长度根据电信号通过的频率的函数而变化。电阻器使用称为皮肤效应的主体来引导相对较高的频率信号通过电阻器的较长路径，而不是由具有相对较低频率的信号所经历。

3. 发明授权

US5214329A Bias current modulation for differentially coupled transistor circuit 失效
标题翻译：用于差分耦合晶体管电路的偏置电流调制
公开(公告)号：US5214329A
公开(公告)日：1993-05-25
申请号：US819748
申请日：1992-01-13
申请人： James P. Furino, Jr.
发明人： James P. Furino, Jr.
IPC分类号： H03F3/45
CPC分类号： H03F3/45085 , H03F2203/45454 , H03F2203/45466 , H03F2203/45674
摘要： Improved operation of a differentially coupled transistor circuit is achieved by modulating the circuit's bias current as a function of the input differential voltage. The bias current-modulated, differentially coupled transistor circuit includes first and second differentially transistor pairs, the bases of which are coupled across input terminals to which the differential voltage is applied. The emitters of the first transistor pair are coupled in common to a first constant bias current source, and the emitters of the second transistor pair are coupled in common to a second constant bias current source. The collector of one of the transistors of the first pair is coupled to the collector of the differentially coupled transistor of the second pair, so as to provide a first summation collector current. Similarly, the collector of one of the transistors of the second pair is coupled to the collector of the differentially coupled transistor of the first pair, so as to provide a second summation collector current. The emitters of transistors of a third differentially coupled pair are coupled in common to a modulated bias current source, the output of which is a function of the sum of one of the second collector currents. Output current is derived from one or both collectors of the third pair.
摘要翻译：通过调制电路的偏置电流作为输入差分电压的函数来实现差分耦合晶体管电路的改进的操作。偏置电流调制的差分耦合晶体管电路包括第一和第二差分晶体管对，其基极耦合在施加有差分电压的输入端上。第一晶体管对的发射极共同耦合到第一恒定偏置电流源，并且第二晶体管对的发射极共同耦合到第二恒定偏置电流源。第一对的晶体管之一的集电极耦合到第二对的差分耦合晶体管的集电极，以便提供第一求和集电极电流。类似地，第二对的晶体管之一的集电极耦合到第一对的差分耦合晶体管的集电极，以便提供第二求和集电极电流。第三差分耦合对的晶体管的发射极共同耦合到调制偏置电流源，其调节偏置电流源是第二集电极电流之和的函数。输出电流来自第三对的一个或两个集电极。

4. 发明授权

US07110933B2 Line modeling tool 失效
标题翻译：线建模工具
公开(公告)号：US07110933B2
公开(公告)日：2006-09-19
申请号：US10628195
申请日：2003-07-28
申请人： Rex E. Lowther , Gregg D. Croft , Yiqun Lin , Robert Lomenic , James P. Furino, Jr. , Joseph A. Czagas
发明人： Rex E. Lowther , Gregg D. Croft , Yiqun Lin , Robert Lomenic , James P. Furino, Jr. , Joseph A. Czagas
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： A method of a modeling metallization parasitics with the use of a simulation program. In one embodiment, a method of simulating interconnect lines in an electronic design automation simulation is disclosed. The method comprises partitioning the interconnect lines into groups of interconnect lines. Each group of interconnect lines does not have interactions with any of the other groups of interconnect lines. Moreover, at least one of the groups of interconnect lines contains at least three interconnect lines. The interconnect lines in each group are modeled. The modeling includes at least one of modeling mutual inductances and modeling of mutual capacitances.
摘要翻译：使用仿真程序建模金属化寄生效应的方法。在一个实施例中，公开了一种在电子设计自动化仿真中模拟互连线的方法。该方法包括将互连线划分成互连线组。每组互连线不与任何其他互连线组相互作用。此外，互连线组中的至少一个包含至少三条互连线。每组中的互连线被建模。该建模包括至少一个模拟互感和互电容建模。

5. 发明授权

US5581444A Device and method for enhancing thermal and high frequency performance of integrated circuit packages 失效
标题翻译：用于增强集成电路封装的热和高频性能的装置和方法
公开(公告)号：US5581444A
公开(公告)日：1996-12-03
申请号：US507192
申请日：1995-07-26
申请人： James P. Furino, Jr.
发明人： James P. Furino, Jr.
IPC分类号： H01L21/68 , H01L23/66 , H05K7/20
CPC分类号： H01L21/6835 , H01L23/66 , H01L2221/68377 , H01L2224/48091 , H01L24/48 , H01L2924/00014 , H01L2924/14 , H01L2924/30107
摘要： A method and mount for a high frequency IC that provides a low inductance path for a high frequency current from the IC to the exterior of a package for the IC and the mount. An electrically and thermally conductive metal base for mounting the IC on an upper surface thereof has a lower surface exposed at the exterior of the package that otherwise encloses the base and the IC. The base also has a plurality of solid or hollow columns for increasing a surface area of the mount, thereby decreasing the inductance to a high frequency current in the path between the IC and the lower surface of the base. Each column is electrically connected to a separate ground terminal on the IC. The columns may have narrow necks connecting them to the base to limit common mode inductance between columns, or may be separated from the base to eliminate common mode inductance.
摘要翻译：一种用于高频IC的方法和安装件，其为IC和安装件的封装的IC的高频电流提供低电感路径。用于将IC安装在其上表面上的用于导电和导热的金属基座具有暴露在封装外部的下表面，否则封装基座和IC。底座还具有多个固体或中空柱，用于增加安装座的表面积，从而将电感降低到IC与底座下表面之间的路径中的高频电流。每列电连接到IC上的单独接地端子。列可以具有将它们连接到基座的窄颈部，以限制列之间的共模电感，或者可以与基极分离以消除共模电感。

6. 发明授权

US08729952B2 Switching device with non-negative biasing 有权
标题翻译：具有非负偏置的开关器件
公开(公告)号：US08729952B2
公开(公告)日：2014-05-20
申请号：US13587590
申请日：2012-08-16
申请人： Xiaomin Yang , James P. Furino, Jr.
发明人： Xiaomin Yang , James P. Furino, Jr.
IPC分类号： H03K17/687
CPC分类号： H03K17/162 , H03K2217/0018 , H03K2217/0054
摘要： Embodiments provide a switching device including one or more field-effect transistors (FETs) and bias circuitry. The one or more FETs may transition between an off state and an on state to facilitate switching of a transmission signal. The one or more FETs may include a drain terminal, a source terminal, a gate terminal, and a body. The biasing circuitry may bias the drain terminal and the source terminal to a first DC voltage in the on state and a second DC voltage in the off state. The first and second DC voltages may be non-negative. The biasing circuitry may be further configured to bias the gate terminal to the first DC voltage in the off state and the second DC voltage in the on state.
摘要翻译：实施例提供了包括一个或多个场效应晶体管（FET）和偏置电路的开关器件。一个或多个FET可以在断开状态和导通状态之间转换，以便于传输信号的切换。一个或多个FET可以包括漏极端子，源极端子，栅极端子和主体。偏置电路可以将漏极端子和源极端子偏置为处于导通状态的第一DC电压和处于断开状态的第二DC电压。第一和第二DC电压可以是非负的。偏置电路还可以被配置为将栅极端子偏置为处于断开状态的第一直流电压和处于导通状态的第二直流电压。

7. 发明授权

US06452452B1 Negative feedback gain control for common electrode transistor 有权
标题翻译：公共电极晶体管的负反馈增益控制
公开(公告)号：US06452452B1
公开(公告)日：2002-09-17
申请号：US09612848
申请日：2000-07-10
申请人： James P. Furino, Jr.
发明人： James P. Furino, Jr.
IPC分类号： H03G310
CPC分类号： H03G1/0052 , H03F1/34 , H03F2200/151 , H03G1/0082
摘要： The unwanted variation in operating point associated with varying the gain of a common input/output electrode transistor, such as a common emitter bipolar transistor, is obviated by coupling an electronically controllable conductance in a negative feedback path between a first input/output electrode (collector) and the control electrode (base) of the transistor. In a first embodiment applied to a bipolar device, the electronically controlled feedback element comprises a diode, having its forward conductance varied by adjusting current flow through a controllable current source. This controls the amount of feedback from the collector to the base and thereby the forward loop gain of the common emitter transistor. In a second embodiment for a bipolar device, the controlled feedback element comprises an emitter-follower transistor, with its forward gain controlled by varying the current drawn through its emitter by a controllable current source/sink. This, in turn, varies the amount of voltage fed back from the collector to the base and thus the gain of the common emitter transistor. Although varying the current drawn by the current source varies the operating point of the feedback element, the bias conditions for the common emitter transistor remain unaffected, so that its operating point and linearity remain constant.
摘要翻译：通过在第一输入/输出电极（集电器）之间的负反馈路径中耦合电子可控制的电导来消除与公共输入/输出电极晶体管（例如公共发射极双极晶体管）的增益相关的工作点的不期望的变化）和晶体管的控制电极（基极）。在应用于双极器件的第一实施例中，电子控制反馈元件包括二极管，其正向电导通过调节通过可控电流源的电流而变化。这控制了从集电极到基极的反馈量，从而控制了共发射极晶体管的正向环路增益。在双极器件的第二实施例中，受控反馈元件包括发射极 - 跟随器晶体管，其前向增益通过改变通过其发射极吸收的电流由可控电流源/吸收器来控制。这反过来又改变了从集电极反馈到基极的电压量，从而改变了共发射极晶体管的增益。虽然改变电流源所消耗的电流会改变反馈元件的工作点，但是共发射极晶体管的偏置条件保持不受影响，因此其工作点和线性度保持不变。

8. 发明授权

US5999080A Frequency dependent resistive element 有权
公开(公告)号：US5999080A
公开(公告)日：1999-12-07
申请号：US246815
申请日：1999-02-09
申请人： James P. Furino, Jr.
发明人： James P. Furino, Jr.
IPC分类号： H01C13/00 , H01P1/20 , H01C8/02
CPC分类号： H01P1/20
摘要： A frequency dependent resistor in which the length of the current path across the resistor varies as a function of the frequency of the electrical signals being passed therethrough. The resistor uses the principal known as skin effect to direct relatively higher frequency signals through a longer path through the resistor than is experienced by signals having a relatively low frequency.

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