专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07107468B2 Peak current sharing in a multi-phase buck converter power system 有权
标题翻译：多相降压转换器电源系统中的峰值电流共享
公开(公告)号：US07107468B2
公开(公告)日：2006-09-12
申请号：US10615486
申请日：2003-07-08
申请人： Stuart Pullen , Terry J. Groom
发明人： Stuart Pullen , Terry J. Groom
IPC分类号： G06F1/26 , G06F1/32 , G05F1/24 , G05F24/02
CPC分类号： H02M3/1584
摘要： A plurality of constant ON-time buck converters are coupled to a common load. The output of each buck converter is coupled to a common load via a series sense resistor. The regulated output voltage across the common load is compared to a reference voltage to generate a start signal. The start signal is alternately coupled to the controller on each buck converter. The ON-time of a master buck converter is terminated when a ramp signal generated from the regulator input voltage exceeds the reference voltage. All other slave converters have an ON-time pulse started by the start signal and stopped by comparing a sense voltage corresponding to their output current during their ON-time pulse to the peak current in the master converter during its ON-time. A counting circuit with an output corresponding to each of the plurality of buck converters is used to select which buck converter receives the start signal.
摘要翻译：多个常数导通时间降压转换器耦合到公共负载。每个降压转换器的输出通过串联检测电阻耦合到公共负载。将公共负载上的稳压输出电压与参考电压进行比较以产生起始信号。起始信号在每个降压转换器上交替耦合到控制器。当从稳压器输入电压产生的斜坡信号超过参考电压时，主降压转换器的导通时间终止。所有其他从属转换器具有由起始信号启动的接通时间脉冲，并且通过将其接通时间脉冲期间与其输出电流相对应的感测电压与其在接通时间期间的主转换器中的峰值电流进行比较而停止。使用具有对应于多个降压转换器中的每一个的输出的计数电路来选择哪个降压转换器接收开始信号。

2. 发明授权

US07019504B2 Constant ON-time controller for a buck converter 有权
标题翻译：降压转换器的恒定导通时间控制器
公开(公告)号：US07019504B2
公开(公告)日：2006-03-28
申请号：US10614978
申请日：2003-07-08
申请人： Stuart Pullen , Terry J. Groom
发明人： Stuart Pullen , Terry J. Groom
IPC分类号： G05F1/56
CPC分类号： H02M3/156
摘要： A constant ON-time controller for a buck converter utilizes dual symmetrical ramps. The ramps may be generated artificially or by sensing the voltage across a sense resistor in the output. The ramp may also be generated by sensing the voltage across the “ON” resistance of the low side FET in the switching regulator. A modified output voltage has one of the ramps superimposed and a modified reference voltage has the other ramps superimposed. The modified output voltage and the modified reference voltage are compared to determine when to start the ON-time of the buck converter. The dual ramps reduce, noise susceptibility. The ON-time is stopped in response to charging a capacitor with the regulator input voltage. An offset may also be generated representing the difference between the average output voltage and the reference voltage. The offset is used to generate a modified reference to compensate for the offset.
摘要翻译：用于降压转换器的恒定导通时间控制器采用双对称斜坡。斜坡可以人工产生，也可以通过检测输出端的检测电阻上的电压来产生。也可以通过感测开关调节器中低侧FET的“ON”电阻两端的电压来产生斜坡。改进的输出电压具有叠加的一个斜坡，并且修改的参考电压具有叠加的其它斜坡。比较改进的输出电压和修改的参考电压，以确定何时启动降压转换器的导通时间。双斜坡降低，噪声敏感性。响应于用调节器输入电压对电容器充电，导通时间停止。还可以产生表示平均输出电压和参考电压之间的差的偏移。偏移量用于生成修改的参考以补偿偏移量。

3. 发明授权

US4780688A Large signal output current enhancement for a differential pair 失效
标题翻译：差分对的大信号输出电流增强
公开(公告)号：US4780688A
公开(公告)日：1988-10-25
申请号：US46691
申请日：1987-05-07
申请人： Terry J. Groom
发明人： Terry J. Groom
IPC分类号： H03F3/45
CPC分类号： H03F3/45071
摘要： A differential pair having a current source for providing amplification and slewing currents and a large signal circuit responsive to the differential pair input signals for shunting slewing current from the current source away from the differential pair for low input differential and linearly varying the amount of slewing current to be provided from the current source to the differential pair for higher input differentials.
摘要翻译：具有用于提供放大和回转电流的电流源的差分对和响应于差分对输入信号的大信号电路，用于将来自电流源的回转电流远离差分对以用于低输入差分并线性地改变回转电流量从电流源提供给差分对，以实现更高的输入差分。

4. 再颁专利

USRE43291E1 PFM-PWM DC-DC converter providing DC offset correction to PWM error amplifier and equalizing regulated voltage conditions when transitioning between PFM and PWM modes 有权
标题翻译： PFM-PWM DC-DC转换器为PWM误差放大器提供直流偏移校正，并在PFM和PWM模式之间转换时均衡稳压条件
公开(公告)号：USRE43291E1
公开(公告)日：2012-04-03
申请号：US12792998
申请日：2010-06-03
申请人： Terry J. Groom
发明人： Terry J. Groom
IPC分类号： G05F1/40 , G05F1/56 , H02H7/00
CPC分类号： H02M3/1588 , H02M3/157 , H02M2001/0012 , Y02B70/1466
摘要： To prevent a voltage glitch in the regulated DC output voltage of a PWM/PFM DC-DC converter when switching between PFM and PMW modes, the error amplifier of the converter's PWM regulation path is provided with a DC voltage offset correction mechanism. This mechanism “zeros-out” DC voltage offsets that may be present in the voltage regulation path, thereby enabling the error amplifier to accurately regulate the converter's output voltage. When the converter transitions between PFM and PWM modes, the DC offset correction mechanism establishes initial conditions of the error amplifier that effectively ensure that the converter's regulated output voltage at the beginning of a new “switched-to” PWM mode cycle is DC offset-free.
摘要翻译：为了防止在PFM和PMW模式之间切换PWM / PFM DC-DC转换器的稳压直流输出电压时的电压毛刺，变换器PWM调节通路的误差放大器配有直流电压补偿校正机构。该机制可能存在于电压调节路径中的“零”输出直流电压偏移，从而使误差放大器能够精确地调节转换器的输出电压。当转换器在PFM和PWM模式之间转换时，DC偏移校正机制建立了误差放大器的初始条件，有效地确保了在新的“开关”PWM模式周期开始时转换器的稳压输出电压为无直流偏移。

5. 发明授权

US07382114B2 PFM-PWM DC-DC converter providing DC offset correction to PWM error amplifier and equalizing regulated voltage conditions when transitioning between PFM and PWM modes 有权
标题翻译： PFM-PWM DC-DC转换器为PWM误差放大器提供直流偏移校正，并在PFM和PWM模式之间转换时均衡稳压条件
公开(公告)号：US07382114B2
公开(公告)日：2008-06-03
申请号：US11422465
申请日：2006-06-06
申请人： Terry J. Groom
发明人： Terry J. Groom
IPC分类号： G05F1/40 , G05F1/56 , H02H7/00
CPC分类号： H02M3/1588 , H02M3/157 , H02M2001/0012 , Y02B70/1466
摘要： To prevent a voltage glitch in the regulated DC output voltage of a PWM/PFM DC-DC converter when switching between PFM and PMW modes, the error amplifier of the converter's PWM regulation path is provided with a DC voltage offset correction mechanism. This mechanism “zeros-out” DC voltage offsets that may be present in the voltage regulation path, thereby enabling the error amplifier to accurately regulate the converter's output voltage. When the converter transitions between PFM and PWM modes, the DC offset correction mechanism establishes initial conditions of the error amplifier that effectively ensure that the converter's regulated output voltage at the beginning of a new “switched-to” PWM mode cycle is DC offset-free.
摘要翻译：为了防止在PFM和PMW模式之间切换PWM / PFM DC-DC转换器的稳压直流输出电压时的电压毛刺，变换器PWM调节通路的误差放大器配有直流电压补偿校正机构。该机制可能存在于电压调节路径中的“零”输出直流电压偏移，从而使误差放大器能够精确地调节转换器的输出电压。当转换器在PFM和PWM模式之间转换时，DC偏移校正机制建立了误差放大器的初始条件，有效地确保了在新的“开关”PWM模式周期开始时转换器的稳压输出电压为无直流偏移。

6. 发明授权

US06871289B2 Slew rate limited reference for a buck converter 有权
公开(公告)号：US06871289B2
公开(公告)日：2005-03-22
申请号：US10615616
申请日：2003-07-08
申请人： Stuart Pullen , Terry J. Groom
发明人： Stuart Pullen , Terry J. Groom
IPC分类号： H02M3/156 , G06F1/26 , G05F1/40 , G05F1/56
CPC分类号： H02M3/156 , H02M2001/0025
摘要： A compensated reference voltage for the controller of a buck regulator corrects for offsets and controls the rate at which the output load current can change in response to a change in the reference setting output voltage level of the buck converter. A current source is coupled to a resistor that has one terminal connected to the ground potential of the output voltage. The voltage across this resistor generates a remote reference voltage. A feedback current is generated as a function of the difference between the remote reference voltage and the output voltage. The feedback current is time integrated to form the compensated reference, which is used to control the ON-time of the buck converter.

7. 发明授权

US06472856B2 Bounded power supply voltage positioning 失效
标题翻译：有界电源电压定位
公开(公告)号：US06472856B2
公开(公告)日：2002-10-29
申请号：US09803689
申请日：2001-03-09
申请人： Terry J. Groom , Stuart Pullen
发明人： Terry J. Groom , Stuart Pullen
IPC分类号： G05F140
CPC分类号： H02M3/156 , H02M3/158 , H02M2001/0025
摘要： A voltage positioning technique allows a power supply controller to more fully exploit active voltage positioning as a way of maintaining supply voltage within the limits defined for an associated electrical load. The supply voltage is allowed to “droop” as a function of load current. Droop may be implemented in linear proportion to load current, or as a discrete droop function once load current exceeds a given threshold. In either case, the droop circuitry of the supply controller implements a bounding function that establishes an accurately known maximum droop voltage magnitude. This maximum droop voltage limit establishes a reliable lower limit for the supply voltage independent of increasing load current. This accurately set lower bound for the droop voltage enables the controller to more aggressively position the supply voltage at the lower voltage limit of the load, which minimizes voltage overshoot and load power consumption.
摘要翻译：电压定位技术允许电源控制器更充分地利用有源电压定位作为将电源电压维持在为相关电负载限定的限度内的一种方式。供电电压允许作为负载电流的函数“下降”。 Droop可以以负载电流的线性比例实现，或者在负载电流超过给定阈值时作为离散下垂功能实现。在任一种情况下，供电控制器的下垂电路实现了建立精确已知的最大下垂电压幅度的边界功能。该最大下降电压极限为电源电压建立可靠的下限，与增加的负载电流无关。精确设定下降电压的下限使控制器能够将电源电压更积极地定位在负载的较低电压极限，从而最大限度地降低电压过冲和负载功耗。

8. 发明授权

US4755770A Low noise current spectral density input bias current cancellation scheme 失效
标题翻译：低噪声电流频谱密度输入偏置电流消除方案
公开(公告)号：US4755770A
公开(公告)日：1988-07-05
申请号：US896097
申请日：1986-08-13
申请人： Terry J. Groom , James P. Furino, Jr.
发明人： Terry J. Groom , James P. Furino, Jr.
IPC分类号： H03F1/56 , H03F3/04
CPC分类号： H03F1/56
摘要： A current cancellation circuit having, and method for producing, a low noise spectral density current for cancelling the DC input bias current of an input signal to an amplifier. The cancellation circuit provides for generating a DC cancelling current having a magnitude K times greater than the magnitude of the input DC bias current and then reducing the same by K times. The resulting cancelling current has a reduced noise current spectral density associated with it, thereby reducing the overall noise current spectral density of the input stage.
摘要翻译：电流消除电路具有用于产生用于消除输入信号到放大器的DC输入偏置电流的低噪声频谱密度电流的方法。消除电路用于产生具有比输入的DC偏置电流的大小K倍大的DC消除电流，然后将其减小K倍。所得到的抵消电流具有与其相关联的降低的噪声电流频谱密度，从而降低输入级的整体噪声电流频谱密度。

9. 发明授权

US08030907B2 Accelerated response to load transients in PFM DC-to-DC converters 有权
标题翻译：对PFM DC-DC转换器的负载瞬变的加速响应
公开(公告)号：US08030907B2
公开(公告)日：2011-10-04
申请号：US12275129
申请日：2008-11-20
申请人： Terry J Groom , Jason Leonard
发明人： Terry J Groom , Jason Leonard
IPC分类号： G05F1/10 , G05F1/40
CPC分类号： H02M3/158
摘要： A pulse generator circuit in a DC-to-DC converter may be configured to generate pulses that have a frequency that increases in response to increases in the load on the DC-to-DC converter. The pulse generator circuit may be configured to cause each pulse to have a constant width. When the pulse reaches the end of the constant width and the magnitude of the current through an inductance in the converter is less than a threshold value, however, the pulse generator may be configured to extend the pulse until the magnitude of the current through the inductance reaches the threshold value. The pulse generator circuit may be configured to prematurely terminate each pulse if and at such time as the load voltage exceeds a target value by approximately half of the peak-to-peak voltage of the ripple component plus the noise component margin.
摘要翻译： DC-DC转换器中的脉冲发生器电路可以被配置为产生具有响应于DC-DC转换器上的负载增加而增加的频率的脉冲。脉冲发生器电路可以被配置为使每个脉冲具有恒定的宽度。然而，当脉冲达到恒定宽度的末端，并且通过转换器中的电感的电流的幅度小于阈值时，脉冲发生器可以被配置为延长脉冲直到通过电感的电流的大小达到阈值。脉冲发生器电路可以被配置为如果并且在负载电压超过目标值时大约是波纹分量的峰 - 峰电压的一半加上噪声分量裕度的时间，则过早地终止每个脉冲。

10. 发明授权

US06583610B2 Virtual ripple generation in switch-mode power supplies 失效
公开(公告)号：US06583610B2
公开(公告)日：2003-06-24
申请号：US09804364
申请日：2001-03-12
申请人： Terry J. Groom , Stuart Pullen
发明人： Terry J. Groom , Stuart Pullen
IPC分类号： G05F140
CPC分类号： H02M3/156 , H02M2001/0025
摘要： A system and method provides virtual ripple signal generation for use in voltage regulation applications. Some switch-mode power converters or voltage regulators use output signal ripple to effect voltage regulation. A virtual ripple generator provides this type of voltage regulator with a virtual ripple signal comprising an offset component responsive to actual load voltage, but with a generated AC ripple component of arbitrary magnitude that is independent of actual output signal ripple. Unlike the actual output ripple signal, the generated AC ripple component is not dependent on implementation specifics, such as circuit board layout or output capacitor ESR, and may have its gain set independent of the offset component. The generated AC ripple component is synchronized to the inductor switching actions of the voltage regulator and thus reflects actual inductor phase switching in single and multi-phase regulation applications. Virtual ripple signal generation can include output (load) voltage droop compensation.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式