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1. 发明授权

US5292399A Plasma etching apparatus with conductive means for inhibiting arcing 失效
标题翻译：具有用于抑制电弧放电的导电装置的等离子体蚀刻装置
公开(公告)号：US5292399A
公开(公告)日：1994-03-08
申请号：US819573
申请日：1992-01-08
申请人： Terrance Y. Lee , Fred C. Redeker , Petru N. Nitescu , Robert J. Steger , David W. Groechel , Semyon Sherstinsky , Maya Shendon , Samuel Luong
发明人： Terrance Y. Lee , Fred C. Redeker , Petru N. Nitescu , Robert J. Steger , David W. Groechel , Semyon Sherstinsky , Maya Shendon , Samuel Luong
IPC分类号： H01L21/00 , H01L21/687
CPC分类号： H01L21/68721 , H01L21/67069 , Y10S156/915
摘要： An improved plasma etching apparatus is disclosed for the plasma etching of semiconductor wafers. The improvement includes conductive means for inhibiting arcing from electrical charges accumulating on one or more non-conductive protective surfaces on members at rf potential within the apparatus, such as the metal pedestal which supports the wafer being etched and supplies the rf potential to it, and the clamping ring mechanism which clamps the wafer to the pedestal. The conductive means may include one or more conductive plugs extending through one or more of the protective surfaces or a conductive ring surrounding the wafer on the top surface of the metal pedestal. The conductive material is selected from the class consisting of carbon; a silicide; titanium nitride; a carbide; and a semiconductor such as silicon doped to provide a resistivity ranging from about 0.001 to about 20 ohm-cm.
摘要翻译：公开了用于半导体晶片的等离子体蚀刻的改进的等离子体蚀刻装置。该改进包括导电装置，用于抑制积聚在装置内的rf电位的构件上的一个或多个不导电保护表面上的电荷的电弧，例如支撑被蚀刻的晶片并将rf电位提供给它的金属基座，以及夹紧环机构，其将晶片夹持到基座。导电装置可以包括延伸穿过一个或多个保护表面的一个或多个导电插塞或围绕金属基座的顶表面上的晶片的导电环。导电材料选自碳; 硅化物氮化钛; 硬质合金以及掺杂硅的半导体，以提供约0.001至约20欧姆 - 厘米的电阻率。

2. 发明授权

US5788799A Apparatus and method for cleaning of semiconductor process chamber surfaces 失效
标题翻译：用于清洁半导体处理室表面的装置和方法
公开(公告)号：US5788799A
公开(公告)日：1998-08-04
申请号：US661842
申请日：1996-06-11
申请人： Robert J. Steger , Fred C. Redeker
发明人： Robert J. Steger , Fred C. Redeker
IPC分类号： H01L21/302 , B08B7/00 , B08B17/02 , C23C16/44 , C23C16/46 , H01J37/32 , H01L21/02 , H01L21/203 , H01L21/205 , H01L21/3065 , H01L21/31 , H01L21/00
CPC分类号： H01J37/32477 , B08B17/02 , B08B7/0042 , C23C16/4404 , C23C16/4405 , C23C16/46 , H01J37/32357 , H01J37/32522 , H01J37/32862 , Y10S156/916
摘要： In accordance with the present invention, a temperature-controlled ceramic liner or barrier is used adjacent to process chamber surfaces during a plasma-comprising process, with the liner or barrier temperature being set to reduce the formation of deposits upon or to aid in the removal of deposits from the liner surface during the processing of a semiconductor substrate within the process chamber. In the alternative, cleaning of the process chamber surface is carried out after the semiconductor substrate is removed from the chamber, and the liner or barrier temperature is set to assist in the removal of deposits from the liner or barrier surface. Deposits accumulate on some process chamber surfaces faster than on others. Since the rate of deposit formation or removal is temperature dependent, the temperature-controlled ceramic liner may be constructed to enable independent temperature settings at different locations within the liner. When multiple temperature-controllable barriers are used, each barrier may be set at a different temperature in proportion to the deposit formation reduction or removal requirements in the area of the process chamber protected by the particular barrier. In a preferred embodiment of the invention, the plasma used either during the semiconductor substrate processing or during a cleaning process after removal of the substrate from the process chamber is generated externally from the process chamber and is fed into the process chamber through a conduit. The conduit or at least the interior surface of the conduit which contacts the plasma is comprised of a halogen-containing material. The halogen used in the conduit material may be selected in consideration of the active species which is to be fed through the interior of the conduit.
摘要翻译：根据本发明，在包含等离子体的工艺期间，与处理室表面相邻地使用温度控制的陶瓷衬垫或屏障，其中衬垫或屏障温度被设定为减少沉积物的形成或帮助去除在处理室内的半导体衬底的处理期间从衬垫表面沉积。在替代方案中，在将半导体衬底从腔室中取出之后进行处理室表面的清洁，并且衬套或阻挡层温度被设定为有助于从衬垫或阻挡表面去除沉积物。沉积物在某些加工室表面积聚比其他处理室更快。由于沉积物形成或去除速率是温度依赖性的，所以可以构造温度可控的陶瓷衬垫，以在衬套内的不同位置实现独立的温度设置。当使用多个温度可控制的屏障时，每个屏障可以被设置在与由特定屏障保护的处理室区域中的沉积物形成减少或去除要求成比例的不同温度。在本发明的优选实施例中，在半导体衬底处理期间或在从处理室移除衬底之后的清洁过程期间使用的等离子体从处理室外部产生，并通过导管进料到处理室中。导管或至少与导管等离子体接触的内表面由含卤物质组成。考虑到要通过导管内部进料的活性物质，可以选择导管材料中使用的卤素。

3. 发明授权

US06170428B2 Symmetric tunable inductively coupled HDP-CVD reactor 失效
标题翻译：对称可调谐电感耦合HDP-CVD反应堆
公开(公告)号：US06170428B2
公开(公告)日：2001-01-09
申请号：US08679927
申请日：1996-07-15
申请人： Fred C. Redeker , Farhad Moghadam , Hiroji Hanawa , Tetsuya Ishikawa , Dan Maydan , Shijian Li , Brian Lue , Robert J. Steger , Manus Wong , Yaxin Wong , Ashok K. Sinha
发明人： Fred C. Redeker , Farhad Moghadam , Hiroji Hanawa , Tetsuya Ishikawa , Dan Maydan , Shijian Li , Brian Lue , Robert J. Steger , Manus Wong , Yaxin Wong , Ashok K. Sinha
IPC分类号： C23C1600
CPC分类号： H01J37/32449 , C23C16/507 , H01J37/321 , H01J37/32467 , H01J37/32522 , H01J37/32862
摘要： The present invention provides an HDP-CVD tool using simultaneous deposition and sputtering of doped and undoped silicon dioxide capable of excellent gap fill and blanket film deposition on wafers having sub 0.5 micron feature sizes having aspect ratios higher than 1.2:1. The system of the present invention includes: a dual RF zone inductively coupled plasma source configuration capable of producing radially tunable ion currents across the wafer; a dual zone gas distribution system to provide uniform deposition properties across the wafer surface; temperature controlled surfaces to improve film adhesion and to control extraneous particle generation; a symmetrically shaped turbomolecular pumped chamber body to eliminate gas flow or plasma ground azimuthal asymmetries; a dual helium cooling zone electrostatic chuck to provide and maintain uniform wafer temperature during processing; an all ceramic/aluminum alloy chamber construction to eliminate chamber consumables; and a remote fluorine based plasma chamber cleaning system for high chamber cleaning rate without chuck cover plates.
摘要翻译：本发明提供一种使用同时沉积和溅射掺杂和未掺杂的二氧化硅的HDP-CVD工具，其能够在具有高于1.2:1的纵横比的0.5微米特征尺寸的晶片上具有优异的间隙填充和覆盖膜沉积。本发明的系统包括：双RF区电感耦合等离子体源配置，其能够跨晶片产生径向可调离子电流; 双区气体分配系统，以在晶片表面上提供均匀的沉积性能; 温度控制表面，以改善膜的附着力并控制外来颗粒的产生; 一个对称成形的涡轮分子抽吸室体，以消除气体流动或等离子体地面方位不对称性; 双氦冷却区静电卡盘，在加工过程中提供并保持晶圆温度均匀; 全陶瓷/铝合金室结构，可消除室内耗材; 以及远程氟基等离子体室清洁系统，用于无卡盘盖板的高室清洁率。

4. 发明授权

US5308417A Uniformity for magnetically enhanced plasma chambers 失效
标题翻译：磁增强等离子体腔的均匀性
公开(公告)号：US5308417A
公开(公告)日：1994-05-03
申请号：US758670
申请日：1991-09-12
申请人： David W. Groechel , Masato M. Toshima , Robert J. Steger , Jerry Y. Wong , Tetsuya Ishikawa , Regga Tekeste , Koichi Ito , Tetsuhiko Sambei
发明人： David W. Groechel , Masato M. Toshima , Robert J. Steger , Jerry Y. Wong , Tetsuya Ishikawa , Regga Tekeste , Koichi Ito , Tetsuhiko Sambei
IPC分类号： H01J37/32 , H01L21/00
CPC分类号： H01L21/67253 , H01J37/32623 , H01J37/3266
摘要： A plasma reactor containing within the processing chamber pieces of magnetic material located to reduce and/or substantially eliminate systematic processing rate nonuniformities. These pieces are placed inside the chamber or attached inside of the pedestal adjacent to the top of the pedestal, where the wafer is to be located for processing. The thickness, shape and magnetic permeabilities of these magnetic pieces are selected to optimize process uniformity.
摘要翻译：一种等离子体反应器，其包含处理室内的磁性材料片，以减少和/或基本上消除系统的加工速率不均匀性。这些件被放置在腔室内或者附接在基座的顶部附近的基座的顶部，晶片将被放置在其中用于处理。选择这些磁性片的厚度，形状和磁导率以优化工艺均匀性。

5. 发明授权

US07993460B2 Substrate support having dynamic temperature control 有权
标题翻译：基板支撑具有动态温度控制
公开(公告)号：US07993460B2
公开(公告)日：2011-08-09
申请号：US10608091
申请日：2003-06-30
申请人： Robert J. Steger
发明人： Robert J. Steger
IPC分类号： C23C16/00 , C23F1/00 , H01L21/306
CPC分类号： F27D5/0037 , C23C16/4586 , C23C16/466 , H01J37/321 , H01J2237/2001 , H01L21/67109 , H01L21/6831
摘要： A substrate support useful for a plasma processing apparatus includes a metallic heat transfer member and an overlying electrostatic chuck having a substrate support surface. The heat transfer member includes one or more passage through which a liquid is circulated to heat and/or cool the heat transfer member. The heat transfer member has a low thermal mass and can be rapidly heated and/or cooled to a desired temperature by the liquid, so as to rapidly change the substrate temperature during plasma processing.
摘要翻译：可用于等离子体处理装置的基板支撑件包括金属传热部件和具有基板支撑表面的上覆静电卡盘。传热构件包括一个或多个通道，液体通过该通道循环以加热和/或冷却传热构件。传热构件具有低热质量并且可以通过液体快速加热和/或冷却至所需温度，从而在等离子体处理期间快速改变衬底温度。

6. 发明授权

US07282454B2 Switched uniformity control 有权
标题翻译：开关均匀性控制
公开(公告)号：US07282454B2
公开(公告)日：2007-10-16
申请号：US10642463
申请日：2003-08-15
申请人： Richard A. Gottscho , Robert J. Steger
发明人： Richard A. Gottscho , Robert J. Steger
IPC分类号： H05H1/24 , H05B6/00 , H01L21/302 , C23C16/00
CPC分类号： H01J37/321 , H01J37/3244
摘要： A component delivery mechanism for distributing a component inside a process chamber is disclosed. The component is used to process a work piece within the process chamber. The component delivery mechanism includes a plurality of component outputs for outputting the component to a desired region of the process chamber. The component delivery mechanism further includes a spatial distribution switch coupled to the plurality of component outputs. The spatial distribution switch is arranged for directing the component to at least one of the plurality of component outputs. The component delivery mechanism also includes a single component source coupled to the spatial distribution switch. The single component source is arranged for supplying the component to the spatial distribution switch.
摘要翻译：公开了一种用于在处理室内分配部件的部件传送机构。该组件用于处理工艺室内的工件。部件传送机构包括用于将部件输出到处理室的期望区域的多个部件输出。部件传送机构还包括耦合到多个部件输出的空间分配开关。空间分配开关被布置成用于将组件引导到多个分量输出中的至少一个。部件传送机构还包括耦合到空间分配开关的单个部件源。单个组件源被布置用于将组件提供给空间分配开关。

7. 发明授权

US06896765B2 Method and apparatus for the compensation of edge ring wear in a plasma processing chamber 有权
标题翻译：用于补偿等离子体处理室中边缘磨损的方法和装置
公开(公告)号：US06896765B2
公开(公告)日：2005-05-24
申请号：US10247812
申请日：2002-09-18
申请人： Robert J. Steger
发明人： Robert J. Steger
IPC分类号： H05H1/46 , C23C16/50 , H01J37/32 , H01L21/3065 , H01L21/306
CPC分类号： H01J37/32623 , H01J37/32642
摘要： A method for processing a plurality of substrates in a plasma processing chamber of a plasma processing system, each of the substrate being disposed on a chuck and surrounded by an edge ring during the processing. The method includes processing a first substrate of the plurality of substrates in accordance to a given process recipe in the plasma processing chamber. The method further includes adjusting, thereafter, a capacitance value of a capacitance along a capacitive path between a plasma sheath in the plasma processing chamber and the chuck through the edge ring by a given value. The method additionally includes processing a second substrate of the plurality of substrates in accordance to the given process recipe in the plasma processing chamber after the adjusting, wherein the adjusting is performed without requiring a change in the edge ring.
摘要翻译：一种用于在等离子体处理系统的等离子体处理室中处理多个基板的方法，每个基板设置在卡盘上并且在处理期间被边缘环包围。该方法包括根据等离子体处理室中的给定工艺配方来处理多个基板中的第一基板。该方法还包括此后，通过等离子体处理室中的等离子体护套之间的电容路径和通过边缘环的卡盘之间的电容的电容值调整给定值。该方法另外包括在调整之后根据等离子体处理室中的给定工艺配方来处理多个基板中的第二基板，其中执行调整而不需要边缘环的改变。

8. 发明授权

US06770852B1 Critical dimension variation compensation across a wafer by means of local wafer temperature control 有权
标题翻译：通过局部晶片温度控制在晶片上的临界尺寸变化补偿
公开(公告)号：US06770852B1
公开(公告)日：2004-08-03
申请号：US10376498
申请日：2003-02-27
申请人： Robert J. Steger
发明人： Robert J. Steger
IPC分类号： F27B514
CPC分类号： F27D99/0006 , F27B5/14 , F27B17/0025 , F27D19/00 , F27D21/0014 , H01L21/67069 , H01L21/67109 , H01L21/67248
摘要： A wafer etching system has a measuring device, an etching chamber, and a controller. The measuring device measures the critical dimension test feature (CD) along the profile of the wafer at a number of preset locations. The etching chamber receives the wafer from the measuring device. The etching chamber includes a chuck supporting the wafer and a number of heating elements disposed within the chuck. Each heating element is positioned adjacent to one of the preset locations on the wafer. The controller is coupled to the measuring device to receive the actual measured CD's for a particular wafer. The controller is also coupled to control the heating elements. The controller adjusts the temperature of each heating elements during a process to reduce so as the variation of critical dimensions measured at the preset locations.
摘要翻译：晶片蚀刻系统具有测量装置，蚀刻室和控制器。测量装置在多个预设位置测量沿着晶片轮廓的临界尺寸测试特征（CD）。蚀刻室从测量装置接收晶片。蚀刻室包括支撑晶片的卡盘和设置在卡盘内的多个加热元件。每个加热元件邻近晶片上的预设位置之一定位。控制器耦合到测量装置以接收特定晶片的实际测量的CD。控制器还耦合以控制加热元件。控制器在过程期间调节加热元件的温度，以减小在预设位置处测量的临界尺寸的变化。

9. 发明授权

US5100502A Semiconductor wafer transfer in processing systems 失效
标题翻译：半导体晶片转移处理系统
公开(公告)号：US5100502A
公开(公告)日：1992-03-31
申请号：US495885
申请日：1990-03-19
申请人： Steven C. Murdoch , Robert J. Steger , Mahasukh Vora
发明人： Steven C. Murdoch , Robert J. Steger , Mahasukh Vora
IPC分类号： H01L21/677 , H01L21/687
CPC分类号： H01L21/67748 , H01L21/68707 , Y10S414/141
摘要： An improved semiconductor wafer transfer method and system incorporates a combination of wafer retractor (14) and wafer lifters (16) built into each processing chamber with a modified transport arm (12) to achieve large enhancements in wafer exchange speeds. The transport arm (12) brings a new wafer into a processing chamber (18) where an already processed wafer waits for retrieval, having been lifted into the central portion of the chamber by lifters (16). In a simultaneous action, lifters (16) lower the processed wafer onto a lower platform of the transport arm (12) while the wafer retractor (14) removes the new wafer from an upper platform of the transport arm (12). Once the transport arm (12) removes the processed wafer from the chamber (18), the retractor (14) lowers the new wafer onto the wafer lifters (16) and processing begins. The transport arm (12) delivers the processed wafer to a wafer buffer (58), which accompanies the transport arm (12), and retrieves a new wafer to start the wafer loading process again with the next processing chamber (18). The method and system of the present invention provides a flexible and rapid solution for loading and unloading wafer processing chambers.
摘要翻译：改进的半导体晶片转移方法和系统将具有修改的输送臂（12）的内置于每个处理室中的晶片牵缩器（14）和晶片升降器（16）的组合结合在一起，以实现晶片交换速度的大的增强。输送臂（12）将新的晶片带入处理室（18），其中已经处理过的晶片等待取回，已由提升器（16）提升到室的中心部分。在同时作用下，升降器（16）将经处理的晶片降低到输送臂（12）的下平台上，而晶片牵开器（14）从输送臂（12）的上平台移除新晶片。一旦输送臂（12）从腔室（18）中移除经处理的晶片，牵开器（14）将新晶片降低到晶片升降器（16）上，开始处理。传送臂（12）将经处理的晶片传送到伴随传送臂（12）的晶片缓冲器（58），并且再次利用下一个处理室（18）检索新的晶片以开始晶片加载过程。本发明的方法和系统提供了用于装载和卸载晶片处理室的灵活且快速的解决方案。

10. 发明授权

US07648582B2 Cleaning of electrostatic chucks using ultrasonic agitation and applied electric fields 有权
标题翻译：使用超声波搅拌和电场清洁静电吸盘
公开(公告)号：US07648582B2
公开(公告)日：2010-01-19
申请号：US11315272
申请日：2005-12-23
申请人： Robert J. Steger
发明人： Robert J. Steger
IPC分类号： B08B3/12
CPC分类号： B08B3/12 , B08B7/00
摘要： A method of cleaning an ESC comprises immersing a ceramic surface of the ESC in dielectric fluid; spacing the ceramic surface of the ESC apart from a conductive surface such that the dielectric fluid fills a gap between the ceramic surface of the ESC and the conductive surface; and subjecting the dielectric fluid to ultrasonic agitation while simultaneously applying voltage to the ESC.
摘要翻译：清洁ESC的方法包括将ESC的陶瓷表面浸入介电流体中; 将ESC的陶瓷表面与导电表面间隔开，使得介电流体填充ESC的陶瓷表面和导电表面之间的间隙; 并对电介质流体进行超声波搅拌，同时向ESC施加电压。

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