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1. 发明授权

US06432837B1 Semiconductor wafer processing method and semiconductor wafers produced by the same 有权
公开(公告)号：US06432837B1
公开(公告)日：2002-08-13
申请号：US09778679
申请日：2001-02-07
申请人： Takashi Nihonmatsu , Seiichi Miyazaki , Masahiko Yoshida , Hideo Kudo , Tadahiro Kato
发明人： Takashi Nihonmatsu , Seiichi Miyazaki , Masahiko Yoshida , Hideo Kudo , Tadahiro Kato
IPC分类号： H01L21302
摘要： A method of processing a semiconductor wafer sliced from a monocrystalline ingot comprises at least the steps of chamfering, lapping, etching, mirror-polishing, and cleaning. In the etching step, alkali etching is first performed and then acid etching, preferably reaction-controlled acid etching, is performed. The etching amount of the alkali etching is greater than the etching amount of the acid etching. Alternatively, in the etching step, reaction-controlled acid etching is first performed and then diffusion-controlled acid etching is performed. The etching amount of the reaction-controlled acid etching is greater than the etching amount of the diffusion-controlled acid etching. The method can remove a mechanically formed damage layer, improve surface roughness, and efficiently decrease the depth of locally formed deep pits, while the flatness of the wafer attained through lapping is maintained, in order to produce a chemically etched wafer having a smooth and flat etched surface that hardly causes generation particles and contamination.

2. 发明授权

US06239039B1 Semiconductor wafers processing method and semiconductor wafers produced by the same 有权
标题翻译：半导体晶片加工方法及其制造的半导体晶片
公开(公告)号：US06239039B1
公开(公告)日：2001-05-29
申请号：US09207193
申请日：1998-12-08
申请人： Takashi Nihonmatsu , Seiichi Miyazaki , Masahiko Yoshida , Hideo Kudo , Tadahiro Kato
发明人： Takashi Nihonmatsu , Seiichi Miyazaki , Masahiko Yoshida , Hideo Kudo , Tadahiro Kato
IPC分类号： H01L21302
CPC分类号： H01L21/02052 , H01L21/02019 , H01L21/30604 , H01L21/30608 , Y10S438/928 , Y10S438/959 , Y10S438/974 , Y10S438/977
摘要： A method of processing a semiconductor wafer sliced from a monocrystalline ingot comprises at least the steps of chamfering, lapping, etching, mirror-polishing, and cleaning. In the etching step, alkali etching is first performed and then acid etching, preferably reaction-controlled acid etching, is performed. The etching amount of the alkali etching is greater than the etching amount of the acid etching. Alternatively, in the etching step, reaction-controlled acid etching is first performed and then diffusion-controlled acid etching is performed. The etching amount of the reaction-controlled acid etching is greater than the etching amount of the diffusion-controlled acid etching. The method can remove a mechanically formed damage layer, improve surface roughness, and efficiently decrease the depth of locally formed deep pits, while the flatness of the wafer attained through lapping is maintained, in order to produce a chemically etched wafer having a smooth and flat etched surface that hardly causes generation particles and contamination.
摘要翻译：处理从单晶锭切片的半导体晶片的方法至少包括倒角，研磨，蚀刻，镜面抛光和清洁的步骤。在蚀刻步骤中，首先进行碱蚀刻，然后进行酸蚀刻，优选进行反应控制的酸蚀刻。碱蚀刻的蚀刻量大于酸蚀刻的蚀刻量。或者，在蚀刻步骤中，首先进行反应控制的酸蚀刻，然后进行扩散控制的酸蚀刻。反应控制的酸蚀刻的蚀刻量大于扩散控制的酸蚀刻的蚀刻量。该方法可以去除机械形成的损伤层，提高表面粗糙度，并有效降低局部形成的深坑的深度，同时通过研磨获得的晶片的平整度得以保持，以便产生具有光滑平坦的化学蚀刻晶片蚀刻的表面几乎不引起发生颗粒和污染。

3. 发明授权

US06346485B1 Semiconductor wafer processing method and semiconductor wafers produced by the same 失效
标题翻译：半导体晶片处理方法及其制造的半导体晶片
公开(公告)号：US06346485B1
公开(公告)日：2002-02-12
申请号：US09633401
申请日：2000-08-07
申请人： Takashi Nihonmatsu , Seiichi Miyazaki , Masahiko Yoshida , Hideo Kudo , Tadahiro Kato
发明人： Takashi Nihonmatsu , Seiichi Miyazaki , Masahiko Yoshida , Hideo Kudo , Tadahiro Kato
IPC分类号： H01L21461
CPC分类号： H01L21/02052 , H01L21/02019 , H01L21/30604 , H01L21/30608 , Y10S438/928 , Y10S438/959 , Y10S438/974 , Y10S438/977
摘要： A method of processing a semiconductor wafer sliced from a monocrystalline ingot comprises at least the steps of chamfering, lapping, etching, mirror-polishing, and cleaning. In the etching step, alkali etching is first performed and then acid etching, preferably reaction-controlled acid etching, is performed. The etching amount of the alkali etching is greater than the etching amount of the acid etching. Alternatively, in the etching step, reaction-controlled acid etching is first performed and then diffusion-controlled acid etching is performed. The etching amount of the reaction-controlled acid etching is greater than the etching amount of the diffusion-controlled acid etching. The method can remove a mechanically formed damage layer, improve surface roughness, and efficiently decrease the depth of locally formed deep pits, while the flatness of the wafer attained through lapping is maintained, in order to produce a chemically etched wafer having a smooth and flat etched surface that hardly causes generation particles and contamination.
摘要翻译：处理从单晶锭切片的半导体晶片的方法至少包括倒角，研磨，蚀刻，镜面抛光和清洁的步骤。在蚀刻步骤中，首先进行碱蚀刻，然后进行酸蚀刻，优选进行反应控制的酸蚀刻。碱蚀刻的蚀刻量大于酸蚀刻的蚀刻量。或者，在蚀刻步骤中，首先进行反应控制的酸蚀刻，然后进行扩散控制的酸蚀刻。反应控制的酸蚀刻的蚀刻量大于扩散控制的酸蚀刻的蚀刻量。该方法可以去除机械形成的损伤层，提高表面粗糙度，并有效降低局部形成的深坑的深度，同时通过研磨获得的晶片的平整度得以保持，以便产生具有光滑平坦的化学蚀刻晶片蚀刻的表面几乎不引起发生颗粒和污染。

4. 发明授权

US07332437B2 Method for processing semiconductor wafer and semiconductor wafer 失效
标题翻译：半导体晶片和半导体晶片的处理方法
公开(公告)号：US07332437B2
公开(公告)日：2008-02-19
申请号：US10312750
申请日：2001-06-25
申请人： Takashi Nihonmatsu , Masahiko Yoshida , Yoshinori Sasaki , Masahito Saitoh , Toshiaki Takaku , Tadahiro Kato
发明人： Takashi Nihonmatsu , Masahiko Yoshida , Yoshinori Sasaki , Masahito Saitoh , Toshiaki Takaku , Tadahiro Kato
IPC分类号： H01L21/461
CPC分类号： H01L21/02008 , H01L21/30604
摘要： There is provided a method for processing a semiconductor wafer subjected to a chamfering process, a lapping process, an etching process, and a mirror-polishing process, wherein acid etching is performed after alkaline etching as the etching process, and the acid etching is performed with an acid etchant composed of hydrofluoric acid, nitric acid, phosphoric acid, and water, a method for processing a semiconductor wafer subjected to a chamfering process, a surface grinding process, an etching process, and a mirror-polishing process, wherein the etching process is performed as described above, and a method for processing a semiconductor wafer subjected to a flattening process, an etching process, and a mirror-polishing process, wherein the etching process is performed as described above, a back surface polishing process is performed after the acid etching as the mirror-polishing process, and then a front surface polishing process is performed. According to this, there can be provided a method for processing a semiconductor wafer to have good flatness, good surface roughness, and good condition on a back surface thereof.
摘要翻译：提供一种处理经过倒角处理，研磨工艺，蚀刻工艺和镜面抛光工艺的半导体晶片的方法，其中在碱蚀刻之后进行酸蚀刻作为蚀刻工艺，并且进行酸蚀刻使用由氢氟酸，硝酸，磷酸和水组成的酸蚀刻剂，经过倒角加工的半导体晶片的处理方法，表面研磨处理，蚀刻工艺和镜面抛光工艺，其中蚀刻进行如上所述的处理，以及经受平坦化处理，蚀刻处理和镜面抛光处理的半导体晶片的处理方法，其中如上所述进行蚀刻处理，后表面抛光工艺在作为镜面抛光处理的酸蚀刻，然后进行前表面研磨处理。据此，可以提供一种在半导体晶片的背面具有良好的平坦度，良好的表面粗糙度和良好的状态的方法。

5. 发明授权

US5474644A Method and apparatus for high-flatness etching of wafer 失效
标题翻译：晶圆高平面蚀刻的方法和装置
公开(公告)号：US5474644A
公开(公告)日：1995-12-12
申请号：US278132
申请日：1994-07-21
申请人： Tadahiro Kato , Hideo Kudo
发明人： Tadahiro Kato , Hideo Kudo
IPC分类号： H01L21/306 , B05C5/00
CPC分类号： H01L21/02019 , H01L21/30604
摘要： A method and an apparatus for high-flatness etching a semiconductor single crystal wafer wherein said wafer is so rotated in a flow of an ethchant radially spreading in a plane that the main surface of said wafer may move parallelly with the flow of said etchant.
摘要翻译：一种用于高平坦度蚀刻半导体单晶晶片的方法和装置，其中所述晶片以在所述晶片的主表面可以与所述蚀刻剂的流动平行移动的平面中径向扩散的脉冲流旋转。

6. 发明授权

US5800725A Method of manufacturing semiconductor wafers 失效
标题翻译：制造半导体晶圆的方法
公开(公告)号：US5800725A
公开(公告)日：1998-09-01
申请号：US789798
申请日：1997-01-28
申请人： Tadahiro Kato , Hisashi Masumura , Hideo Kudo
发明人： Tadahiro Kato , Hisashi Masumura , Hideo Kudo
IPC分类号： H01L21/306 , H01L21/302 , H01L21/304 , B44C1/22 , C03C15/00
CPC分类号： H01L21/02008
摘要： A method of manufacturing semiconductor wafers includes a double side primary polishing step, a back side etching step and a single side mirror polishing step. This method is capable of easy sensor detection of the front and back sides of the wafer, wafer processing of higher flatness level by forming etched rough surface at the back side of the double side polished wafer and setting up of wafer manufacturing process including a double side polishing step.
摘要翻译：制造半导体晶片的方法包括双面一次抛光步骤，背面蚀刻步骤和单面镜面抛光步骤。该方法能够容易地传感器检测晶片的正面和背面，通过在双面抛光晶片的背面形成蚀刻的粗糙表面并设置包括双面的晶片制造工艺，从而提高平坦度的晶片处理抛光步骤

7. 发明授权

US5679212A Method for production of silicon wafer and apparatus therefor 失效
标题翻译：硅晶片的制造方法及其设备
公开(公告)号：US5679212A
公开(公告)日：1997-10-21
申请号：US534926
申请日：1995-09-28
申请人： Tadahiro Kato , Hideo Kudo
发明人： Tadahiro Kato , Hideo Kudo
IPC分类号： B24B1/00 , B24B7/22 , B24B37/00 , H01L21/304 , H01L21/306
CPC分类号： B24B7/228
摘要： The work of grinding of a silicon wafer is carried out in an etchant containing no loose abrasive and permitting selective etching of deformed layers existent in the surface part of said wafer. The removal of the deformed layers and the heavy metals from the wafer is effected simultaneously and quickly owing to the execution of the work of grinding in the etchant and the consequent synergism of the work of grinding and etching.
摘要翻译：研磨硅晶片的工作是在不含松散研磨剂的蚀刻剂中进行的，并且允许在所述晶片的表面部分中存在变形层的选择性蚀刻。由于在蚀刻剂中研磨的作用以及随之而来的磨削和蚀刻工作的协同作用，从晶片中去除变形的层和重金属同时且快速地实现。

8. 发明授权

US6077149A Method and apparatus for surface-grinding of workpiece 失效
标题翻译：工件表面研磨的方法和装置
公开(公告)号：US6077149A
公开(公告)日：2000-06-20
申请号：US953515
申请日：1997-10-17
申请人： Sadayuki Ohkuni , Tadahiro Kato , Hideo Kudo
发明人： Sadayuki Ohkuni , Tadahiro Kato , Hideo Kudo
IPC分类号： B24B7/22 , B24B1/00 , B24B37/04 , B24B41/06 , H01L21/304 , B24B5/04
CPC分类号： B24B37/30 , B24B37/042 , B24B41/068
摘要： In a surface-grinding method for a workpiece, for example a semiconductor wafer, it is possible to correct or improve waviness and bow and to obtain a semiconductor wafer having no thickness dispersion. Besides, wafer processing to higher precision than that conventionally attained is achieved and at the same time simplification of the processing method and thereby reduction of the cost are also achieved. In the present invention, while the workpiece is fixed for supporting at one surface by the fixedly supporting means of a surface-grinding apparatus, the other surface of the workpiece is surface-ground, where the workpiece adheres on the upper surface of a base plate by the aid of adhesive material and the base plate is fixedly supported by the lower surface of itself on the fixedly supporting means.
摘要翻译：在用于工件的表面研磨方法，例如半导体晶片中，可以校正或改善波纹和弯曲并获得没有厚度分散的半导体晶片。此外，实现了比传统获得的更高精度的晶片处理，同时也实现了处理方法的简化，从而降低了成本。在本发明中，当通过表面研磨装置的固定支撑装置将工件固定在一个表面上时，工件的另一个表面被表面磨削，其中工件粘附在基板的上表面上借助于粘合剂材料，底板由固定支撑装置上的自身的下表面固定地支撑。

9. 发明申请

US20080113510A1 Semiconductor Wafer Fabricating Method and Semiconductor Wafer Mirror Edge Polishing Method 审中-公开
标题翻译：半导体晶圆制造方法和半导体晶圆镜边缘抛光方法
公开(公告)号：US20080113510A1
公开(公告)日：2008-05-15
申请号：US11883341
申请日：2006-02-07
申请人： Tadahiro Kato , Hideo Kudo
发明人： Tadahiro Kato , Hideo Kudo
IPC分类号： H01L21/306
CPC分类号： H01L21/02008 , B24B9/065 , B24B37/08 , H01L21/02021
摘要： There is provided a semiconductor wafer fabricating method comprising at least: a double-side polishing step of mirror-polishing a front surface and a back surface of a semiconductor wafer; and a mirror edge polishing step of mirror-polishing a chamfered part of the double-side-polished semiconductor wafer, wherein a protection film made of a resin which suppresses polishing is formed on the front surface or both the front and back surfaces of the semiconductor wafer after the double-side polishing step, then the mirror edge polishing step is carried out, and thereafter the protection film made of a resin is removed. As a result, it is possible to provide a step of eliminating an increase in a cost due to, e.g., a facility investment or an increase in the number of steps as much as possible, removing a scratch or an impression on an edge surface of the chamfered part of the semiconductor wafer, and suppressing excessive polishing caused when a polishing pad enters a main surface of the wafer at the mirror edge polishing step of mirror-polishing the chamfered part of the wafer, thereby preventing a wafer outer peripheral shape, especially an edge roll-off from being degraded.
摘要翻译：提供一种半导体晶片制造方法，该方法至少包括：对半导体晶片的前表面和后表面进行镜面抛光的双面抛光步骤; 以及镜面研磨双面抛光半导体晶片的倒角部分的镜面抛光步骤，其中在半导体的前表面或前表面和后表面上形成由抑制抛光的树脂制成的保护膜在进行双面研磨工序之后，进行镜面研磨工序，然后除去由树脂构成的保护膜。结果，可以提供如下步骤：消除由于例如设施投资而造成的成本的增加或者尽可能多地增加步骤数量，从而消除边缘表面上的划痕或印象半导体晶片的倒角部分，并且当在抛光晶片的倒角部分的镜面抛光步骤中抛光垫进入晶片的主表面时抑制多余的抛光，从而防止晶片外周形状，特别是边缘滚降降低。

10. 发明授权

US6050880A Surface grinding device and method of surface grinding a thin-plate workpiece 失效
公开(公告)号：US6050880A
公开(公告)日：2000-04-18
申请号：US996190
申请日：1997-12-22
申请人： Tadahiro Kato , Sadayuki Okuni , Hideo Kudo , Hiroshi Tomioka
发明人： Tadahiro Kato , Sadayuki Okuni , Hideo Kudo , Hiroshi Tomioka
IPC分类号： B24B7/04 , B24B7/22 , B24B1/00
CPC分类号： B24B37/30 , B24B7/228
摘要： A surface grinding method for a thin-plate workpiece is provided including the steps of (a) roughly surface grinding a first surface of a thin-plate workpiece using a thin-plate workpiece surface grinding device to create a reference plane having no sori or waviness; (b) inverting the thin-plate workpiece, the first surface of which has been roughly surface ground and, with a surface grinding device having a hard chucking plate, chucking the first surface to the hard chucking plate to roughly surface grind a second surface of the thin-plate workpiece; (c) chucking to the hard chucking plate the first surface of the thin-plate workpiece, the second surface of which has been roughly surface ground with the surface grinding device having the hard chucking plate to further finely surface grind the second surface of the thin-plate workpiece; and (d) inverting the thin-plate workpiece, the second surface of which has been finely surface ground and, with the surface grinding device having the hard chucking plate, chucking the second surface to the hard chucking plate to further finely surface grind the first surface of the thin-plate workpiece, wherein the surface grinding device comprising a surface grinding element; and a holding element for holding the thin-plate workpiece to be surface ground, wherein the holding element is a soft holding element. An alternate surface grinding method for a thin-plate workpiece is also provided in which steps (a) and (b) are the same as above and in which steps (c) and (d) are as follows: (c) chucking to the hard chucking plate the second surface of the thin-plate workpiece, the second surface of which has been roughly surface ground with the surface grinding device having the hard chucking plate to finely surface grind the first surface of the thin-plate workpiece; and (d) inverting the thin-plate workpiece, the first surface of which has been finely surface ground and, with the surface grinding device having the hard chucking plate, chucking the second surface to the hard chucking plate to finely surface grind the second surface of the thin-plate workpiece.

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