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1. 发明授权

US06498519B1 Voltage control circuit network device and method of detecting voltage 有权
标题翻译：电压控制电路网络装置及电压检测方法
公开(公告)号：US06498519B1
公开(公告)日：2002-12-24
申请号：US09498339
申请日：2000-02-04
申请人： Yutaka Terada , Hiroyuki Yamauchi , Hironori Akamatsu , Tadahiro Yoshida , Satoshi Takahashi , Takashi Hirata , Yukio Arima , Yoshihide Komatsu
发明人： Yutaka Terada , Hiroyuki Yamauchi , Hironori Akamatsu , Tadahiro Yoshida , Satoshi Takahashi , Takashi Hirata , Yukio Arima , Yoshihide Komatsu
IPC分类号： H03K5153
CPC分类号： G01R19/16547
摘要： A voltage control circuit for implementing, e.g., the CPS function in which a high-accuracy comparison is performed between a high external voltage and a reference voltage. A diode-connected transistor converts the external voltage to a voltage lower than the external voltage in conjunction with an external voltage dropping resistor. A comparator compares the converted voltage with a specified comparison voltage. The size of the transistor is determined such that the ratio of an increment of the converted voltage to an increment of the external voltage is sufficiently high in a comparison region in which the external voltage is close to the reference voltage. A clamping circuit clamps the converted voltage with a specified limit voltage such that the converted voltage does not exceed the withstand voltage of the circuit.
摘要翻译：一种用于实现例如在高外部电压和参考电压之间进行高精度比较的CPS功能的电压控制电路。二极管连接的晶体管将外部电压转换为低于外部电压的电压，并结合外部降压电阻。比较器将转换的电压与指定的比较电压进行比较。确定晶体管的尺寸，使得在外部电压接近参考电压的比较区域中，转换电压的增量与外部电压的增量的比率足够高。钳位电路以转换后的电压将指定的极限电压钳位，使转换后的电压不超过电路的耐压。

2. 发明授权

US06604201B1 Network unit with power saving mode inhibit based on interconnection relationship to neighboring nodes which is stored on the unit 有权
标题翻译：具有省电模式的网络单元基于与存储在单元上的相邻节点的互连关系而禁止
公开(公告)号：US06604201B1
公开(公告)日：2003-08-05
申请号：US09428277
申请日：1999-10-27
申请人： Satoshi Takahashi , Hiroyuki Yamauchi , Hironori Akamatsu , Tadahiro Yoshida , Yutaka Terada , Yukio Arima , Takashi Hirata , Yoshihide Komatsu
发明人： Satoshi Takahashi , Hiroyuki Yamauchi , Hironori Akamatsu , Tadahiro Yoshida , Yutaka Terada , Yukio Arima , Takashi Hirata , Yoshihide Komatsu
IPC分类号： G06F132
CPC分类号： H04L12/12 , Y02D50/20 , Y02D50/40
摘要： A power-saving network unit, which is connected to a network made up of a plurality of power-saving network units, includes: network monitoring means; network information memory; power-saving mode setting means; peripheral I/O interface; and digital processor. The network monitoring means monitors a topology of the network, or the interconnection relationship among the power-saving network units. Every time the network has been modified, the network monitoring means stores the modified network topology on the network information memory. The power-saving mode setting means receives the network information stored on the network information memory. If the power-saving network unit is a master or relay node in the network, then the power-saving mode setting means locks the peripheral I/O interface and digital processor of the power-saving network unit to the normal operation mode and prohibits these sections from entering the power-saving mode.
摘要翻译：连接到由多个省电网络单元组成的网络的节电网单元包括：网络监控装置; 网络信息记忆; 省电模式设定手段; 外设I / O接口; 和数字处理器。网络监控装置监控网络的拓扑结构，或节能网络单元之间的互连关系。每当网络被修改时，网络监控装置将修改的网络拓扑存储在网络信息存储器上。省电模式设置装置接收存储在网络信息存储器上的网络信息。如果省电网络单元是网络中的主节点或中继节点，则省电模式设置装置将节电网络单元的外围I / O接口和数字处理器锁定到正常操作模式，并禁止这些部分进入省电模式。

3. 发明授权

US06633588B1 Data transferring device 有权
标题翻译：数据传输设备
公开(公告)号：US06633588B1
公开(公告)日：2003-10-14
申请号：US09410764
申请日：1999-10-01
申请人： Tadahiro Yoshida , Hiroyuki Yamauchi , Hironori Akamatsu , Satoshi Takahashi , Yutaka Terada , Yukio Arima , Takashi Hirata , Yoshihide Komatsu
发明人： Tadahiro Yoshida , Hiroyuki Yamauchi , Hironori Akamatsu , Satoshi Takahashi , Yutaka Terada , Yukio Arima , Takashi Hirata , Yoshihide Komatsu
IPC分类号： G06F1516
CPC分类号： G06F13/4265 , Y02D10/14 , Y02D10/151
摘要： First and second nodes are coupled together by a bus. The first node includes a detecting circuit for detecting the maximum data transfer capability of a connected node, at least two receiving circuits for receiving data from the bus, and a controlling circuit for selecting, based on an output signal from the detecting circuit and for optimizing the configuration of a receiving unit so as to bring the other of the receiving circuits to a stop. The second node includes a transmitting circuit for transmitting data to the bus and a notifying circuit for notifying the first node of its own maximum transfer capability.
摘要翻译：第一和第二节点通过总线耦合在一起。第一节点包括用于检测连接节点的最大数据传输能力的检测电路，用于从总线接收数据的至少两个接收电路，以及用于基于来自检测电路的输出信号进行优化的控制电路接收单元的配置，以使另一个接收电路停止。第二节点包括用于向总线发送数据的发送电路和用于通知第一节点自己的最大传输能力的通知电路。

4. 发明授权

US06297675B1 Semiconductor integrated circuit and semiconductor integrated circuit system having serially interconnectable data buses 有权
标题翻译：具有串行可互连数据总线的半导体集成电路和半导体集成电路系统
公开(公告)号：US06297675B1
公开(公告)日：2001-10-02
申请号：US09478530
申请日：2000-01-06
申请人： Hironori Akamatsu , Yutaka Terada , Takashi Hirata , Yukio Arima , Satoshi Takahashi , Tadahiro Yoshida , Yoshihide Komatsu , Hiroyuki Yamauchi
发明人： Hironori Akamatsu , Yutaka Terada , Takashi Hirata , Yukio Arima , Satoshi Takahashi , Tadahiro Yoshida , Yoshihide Komatsu , Hiroyuki Yamauchi
IPC分类号： H03B100
CPC分类号： H03K19/018514 , Y10T307/549
摘要： A data line pair and a strobe line pair are provided between first and second chips to exchange data therebetween. The first chip includes an output circuit and a controller for controlling the output circuit. The second chip includes an input circuit. For example, the output circuit supplies a direct current from a power supply to one of the data lines. Then, the input circuit feeds back the received current to the output circuit through a pair of terminal resistors and the other data line. Subsequently, the output circuit supplies the fed back direct current to one of the strobe lines. In response, the input circuit feeds back the received current again to the output circuit through another pair of terminal resistors and the other strobe line. And then the fed back current is drained to the ground. Thus, compared to driving the data and strobe line pairs separately with the same amount of current supplied, the current dissipation can be halved. In this manner, the present invention is applicable to reduction of current dissipation when data should be transmitted at high speeds through multiple data bus pairs that are driven with a current supplied.
摘要翻译：在第一和第二芯片之间提供数据线对和选通线对，以在它们之间交换数据。第一芯片包括输出电路和用于控制输出电路的控制器。第二芯片包括输入电路。例如，输出电路将电流从电源提供给数据线之一。然后，输入电路通过一对端子电阻和另一条数据线将接收的电流反馈到输出电路。随后，输出电路将反馈的直流电流提供给选通线之一。作为响应，输入电路通过另一对端子电阻器和另一个选通线路将接收到的电流再次反馈到输出电路。然后将反馈电流排到地面。因此，与以相同的电流量驱动数据和选通线对相比，电流消耗可以减半。以这种方式，本发明可应用于当通过以所提供的电流驱动的多个数据总线对以高速传输数据时，减少电流消耗。

5. 发明授权

US06356144B1 LSI core including voltage generation circuit and system LSI including the LSI core 有权
标题翻译： LSI核心，包括具有LSI核心的电压产生电路和系统LSI
公开(公告)号：US06356144B1
公开(公告)日：2002-03-12
申请号：US09580139
申请日：2000-05-30
申请人： Hironori Akamatsu , Yutaka Terada , Takashi Hirata , Tadahiro Yoshida , Yoshihide Komatsu
发明人： Hironori Akamatsu , Yutaka Terada , Takashi Hirata , Tadahiro Yoshida , Yoshihide Komatsu
IPC分类号： H01L2500
CPC分类号： G06F13/4086 , H01L2224/05554
摘要： An LSI core includes a first terminal; a second terminal; and a voltage generation circuit for generating a voltage. The first terminal is connected to a first external line provided outside the LSI core. The second terminal is connected to the first external line and to a second external line provided outside the LSI core. The voltage generation circuit includes a voltage generation section for generating the voltage, an output section for outputting the voltage generated by the voltage generation section to the first external line through the first terminal, and an input section for receiving the voltage, output to the first external line by the output section, through the second external line and the second terminal.
摘要翻译： LSI核心包括第一终端; 第二个终端以及用于产生电压的电压产生电路。第一端子连接到设置在LSI核心外部的第一外部线路。第二端子连接到第一外部线路和连接到设置在LSI核心外部的第二外部线路。电压产生电路包括用于产生电压的电压产生部分，用于通过第一端子将由电压产生部分产生的电压输出到第一外部线路的输出部分和用于接收电压的输入部分，输出到第一外部线由输出部分，通过第二个外部线路和第二个终端。

6. 发明授权

US06631486B1 Semiconductor integrated circuit and method for testing the same 有权
标题翻译：半导体集成电路及其测试方法
公开(公告)号：US06631486B1
公开(公告)日：2003-10-07
申请号：US09405015
申请日：1999-09-27
申请人： Yoshihide Komatsu , Tadahiro Yoshida , Yukio Arima
发明人： Yoshihide Komatsu , Tadahiro Yoshida , Yukio Arima
IPC分类号： G01R3128
CPC分类号： G01R31/31905 , G01R31/31926
摘要： A test enable signal Data_En is output from a data generator 11 in a tester 10 to a device under a test (DUT) 20. In the DUT 20, a first logic circuit 21 converts a signal pattern with an ordinary transfer rate, which has been stored on a register 28, into a high-transfer-rate signal pattern SpeedData_Tx with a high rate. And a transmitter 22 transmits the high-transfer-rate signal. During a test, the high-transfer-rate signal transmitted is received by, a receiver 23 with a switch 24 turned ON. Then, the high-transfer-rate signal received is output to a second logic circuit 26, which converts the high-transfer-rate signal into a low-transfer-rate signal Data_Rx with an ordinary rate. Finally, the low-transfer-rate signal is output to the tester 10 and compared to an expected value thereof by a comparator 12. In this manner, a semiconductor device operating at a high speed can be tested using a tester operating at a lower speed.
摘要翻译：测试使能信号Data_En从测试器10中的数据发生器11输出到被测设备（DUT）20。在DUT 20中，第一逻辑电路21以一般传输速率转换信号模式存储在寄存器28中，以高速率转换成高传输速率信号模式SpeedData_Tx。并且发射机22发送高传输速率信号。在测试期间，传输的高传输速率信号由开关24接通的接收机23接收。然后，所接收的高传输速率信号被输出到第二逻辑电路26，第二逻辑电路26将高传输速率信号以普通速率转换成低传输速率信号Data_Rx。最后，将低传输速率信号输出到测试器10，并通过比较器12与其期望值进行比较。以这种方式，可以使用以较低速度操作的测试仪来测试以高速工作的半导体器件。

7. 发明授权

US06768334B1 Signal transmitting receiving apparatus 有权
标题翻译：信号发送接收装置
公开(公告)号：US06768334B1
公开(公告)日：2004-07-27
申请号：US09553308
申请日：2000-04-20
申请人： Hiroyuki Yamauchi , Tadahiro Yoshida
发明人： Hiroyuki Yamauchi , Tadahiro Yoshida
IPC分类号： H03K19003
CPC分类号： H01P5/02
摘要： A signal transmitting/receiving apparatus according to the present invention includes: a transmitting device for transmitting data; a receiving device for receiving the data; a data line for transmitting the data; and a supply line for transmitting a bias voltage for determining a voltage of the data line, wherein the transmitting device and the receiving device are connected to each other through the data line and the supply line, the transmitting device including: a driver circuit for outputting the data to the data lines and a bias generating means for generating the bias voltage and outputting the bias voltage to the supply line, the receiving device including: a terminating resistor connected to the data line; and a receiver circuit for detecting the data from the data line, wherein the data line is connected to the supply line via the terminating resistor.
摘要翻译：根据本发明的信号发送/接收装置包括：发送装置，用于发送数据; 用于接收数据的接收装置; 用于发送数据的数据线; 以及用于发送用于确定数据线的电压的偏置电压的电源线，其中所述发送装置和所述接收装置通过所述数据线和所述供给线彼此连接，所述发送装置包括：驱动器电路，用于输出数据线路的数据和偏置产生装置，用于产生偏置电压并将偏置电压输出到电源线，所述接收装置包括：连接到数据线的终端电阻; 以及用于检测来自数据线的数据的接收器电路，其中数据线经由终端电阻器连接到电源线。

8. 发明授权

US06985007B2 Signal transmitting receiving apparatus 失效
标题翻译：信号发送接收装置
公开(公告)号：US06985007B2
公开(公告)日：2006-01-10
申请号：US10708235
申请日：2004-02-18
申请人： Hiroyuki Yamauchi , Tadahiro Yoshida
发明人： Hiroyuki Yamauchi , Tadahiro Yoshida
IPC分类号： H03K19/003
CPC分类号： H01P5/02
摘要： A signal transmitting/receiving apparatus according to the present invention includes: a transmitting device for transmitting data; a receiving device for receiving the data; a data line for transmitting the data; and a supply line for transmitting a bias voltage for determining a voltage of the data line, wherein the transmitting device and the receiving device are connected to each other through the data line and the supply line, the transmitting device including: a driver circuit for outputting the data to the data line; and a bias generating means for generating the bias voltage and outputting the bias voltage to the supply line, the receiving device including: a terminating resistor connected to the data line; and a receiver circuit for detecting the data from the data line, wherein the data line is connected to the supply line via the terminating resistor.
摘要翻译：根据本发明的信号发送/接收装置包括：发送装置，用于发送数据; 用于接收数据的接收装置; 用于发送数据的数据线; 以及用于发送用于确定数据线的电压的偏置电压的电源线，其中所述发送装置和所述接收装置通过所述数据线和所述供给线彼此连接，所述发送装置包括：驱动器电路，用于输出数据到数据线; 以及偏置产生装置，用于产生所述偏置电压并将偏置电压输出到所述电源线，所述接收装置包括：终端电阻，连接到所述数据线; 以及用于检测来自数据线的数据的接收器电路，其中数据线经由终端电阻器连接到电源线。

9. 发明授权

US07012447B2 Signal transmitting receiving apparatus 失效
公开(公告)号：US07012447B2
公开(公告)日：2006-03-14
申请号：US10708238
申请日：2004-02-18
申请人： Hiroyuki Yamauchi , Tadahiro Yoshida
发明人： Hiroyuki Yamauchi , Tadahiro Yoshida
IPC分类号： H03K19/003
CPC分类号： H01P5/02
摘要： A signal transmitting/receiving apparatus according to the present invention includes: a transmitting device for transmitting data; a receiving device for receiving the data; a data line for transmitting the data; and a supply line for transmitting a bias voltage for determining a voltage of the data line, wherein the transmitting device and the receiving device are connected to each other through the data line and the supply line, the transmitting device including: a driver circuit for outputting the data to the data line; and a bias generating means for generating the bias voltage and outputting the bias voltage to the supply line, the receiving device including: a terminating resistor connected to the data line; and a receiver circuit for detecting the data from the data line, wherein the data line is connected to the supply line via the terminating resistor.

10. 发明授权

US07321403B2 Video signal transmitting/receiving system 有权
标题翻译：视频信号发射/接收系统
公开(公告)号：US07321403B2
公开(公告)日：2008-01-22
申请号：US11020046
申请日：2004-12-23
申请人： Ryogo Yanagisawa , Tadahiro Yoshida , Satoshi Takahashi
发明人： Ryogo Yanagisawa , Tadahiro Yoshida , Satoshi Takahashi
IPC分类号： H04N5/38 , H04N5/04
CPC分类号： H04N5/073 , H04N11/04 , H04N11/20
摘要： In a transmitting section for a video signal transmitting/receiving system for transmitting digital video signals using a plurality of transmission channels, video guard band signals are inserted into video signals associated with the transmission channels immediately before transition from a blanking region to an effective video region. In a receiving section for the system, the inserted video guard band signals are detected for the respective transmission channels. A skew among the transmission channels is detected based on the detection result. To synchronize the video guard band signals among all the transmission channels, with reference to one of the video signals associated with a transmission channel with the longest delay (i.e., delayed by one clock cycle 1T), a delay of 1T is given to the other video signals. As a result, even if a skew occurs among the transmission channels, correct pixel data is displayed.
摘要翻译：在用于使用多个发送信道发送数字视频信号的视频信号发送/接收系统的发送部分中，在从消隐区域到有效视频区域的转换之前，将视频保护带信号插入到与传输信道相关联的视频信号中。在系统的接收部分中，针对各个传输信道检测插入的视频保护频带信号。基于检测结果检测传输信道之间的偏移。为了使所有传输信道中的视频保护频带信号同步，参考与具有最长延迟（即，延迟一个时钟周期1T）的传输信道相关联的视频信号之一，将1T的延迟给予其他视频信号。结果，即使在发送信道之间发生偏斜，也显示正确的像素数据。

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