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1. 发明授权

US08242019B2 Selective deposition of metal-containing cap layers for semiconductor devices 有权
标题翻译：用于半导体器件的含金属盖层的选择性沉积
公开(公告)号：US08242019B2
公开(公告)日：2012-08-14
申请号：US12414917
申请日：2009-03-31
申请人： Tadahiro Ishizaka , Shigeru Mizuno , Satohiko Hoshino , Hiroyuki Nagai , Yuki Chiba , Frank M. Cerio, Jr.
发明人： Tadahiro Ishizaka , Shigeru Mizuno , Satohiko Hoshino , Hiroyuki Nagai , Yuki Chiba , Frank M. Cerio, Jr.
IPC分类号： H01L21/44 , H01L21/4763 , H01L21/302
CPC分类号： H01L21/76849 , H01L21/02063 , H01L21/02074 , H01L21/3105 , H01L21/76814 , H01L21/76826 , H01L21/76828 , H01L21/76846 , H01L21/76856 , H01L21/76859 , H01L21/76883
摘要： A method for integrating metal-containing cap layers into copper (Cu) metallization of semiconductor devices. In one embodiment, the method includes providing a patterned substrate containing metal surfaces and dielectric layer surfaces, and modifying the dielectric layer surfaces by exposure to a reactant gas containing a hydrophobic functional group, where the modifying substitutes a hydrophilic functional group in the dielectric layer surfaces with a hydrophobic functional group. The method further includes depositing metal-containing cap layers selectively on the metal surfaces by exposing the modified dielectric layer surfaces and the metal surfaces to a deposition gas containing metal-containing precursor vapor.
摘要翻译：一种用于将含金属盖层整合到半导体器件的铜（Cu）金属化中的方法。在一个实施例中，该方法包括提供含有金属表面和电介质层表面的图案化衬底，以及通过暴露于含有疏水官能团的反应气体来修饰电介质层表面，其中修饰取代介电层表面中的亲水性官能团具有疏水官能团。该方法还包括通过将改性的介电层表面和金属表面暴露于含有金属的前体蒸气的沉积气体中，将金属含有的盖层选择性地沉积在金属表面上。

2. 发明授权

US07799681B2 Method for forming a ruthenium metal cap layer 有权
标题翻译：形成钌金属盖层的方法
公开(公告)号：US07799681B2
公开(公告)日：2010-09-21
申请号：US12173814
申请日：2008-07-15
申请人： Kenji Suzuki , Frank M. Cerio, Jr. , Miho Jomen , Shigeru Mizuno , Yasushi Mizusawa , Tadahiro Ishizaka
发明人： Kenji Suzuki , Frank M. Cerio, Jr. , Miho Jomen , Shigeru Mizuno , Yasushi Mizusawa , Tadahiro Ishizaka
IPC分类号： H01L21/44
CPC分类号： H01L21/76849 , C23C16/02 , C23C16/16 , H01L21/02068 , H01L21/28562 , H01L21/32134 , H01L21/32135 , H01L21/76826 , H01L21/76828 , H01L21/76834 , H01L21/76846 , H01L21/76856 , H01L21/76868 , H01L21/76883
摘要： A method for integrating ruthenium (Ru) metal cap layers and modified Ru metal cap layers into copper (Cu) metallization of semiconductor devices to improve electromigration (EM) and stress migration (SM) in bulk Cu metal. In one embodiment, the method includes providing a planarized patterned substrate containing a Cu metal surface and a dielectric layer surface, depositing first Ru metal on the Cu metal surface, and depositing additional Ru metal on the dielectric layer surface, where the amount of the additional Ru metal is less than the amount of the first Ru metal. The method further includes at least substantially removing the additional Ru metal from the dielectric layer surface to improve the selective formation of a Ru metal cap layer on the Cu metal surface. Other embodiments further include incorporating one or more types of modifier elements into the dielectric layer surface, the Cu metal surface, the Ru metal cap layer, or a combination thereof.
摘要翻译：将钌（Ru）金属盖层和改性的Ru金属覆盖层整合到半导体器件的铜（Cu）金属化中以改善块状Cu金属中的电迁移（EM）和应力迁移（SM）的方法。在一个实施例中，该方法包括提供包含Cu金属表面和电介质层表面的平坦化图案化衬底，在Cu金属表面上沉积第一Ru金属，以及在电介质层表面上沉积额外的Ru金属，其中额外的量 Ru金属少于第一Ru金属的量。该方法还包括从电介质层表面至少基本上去除额外的Ru金属，以改善在Cu金属表面上的Ru金属覆盖层的选择性形成。其他实施例还包括将一种或多种类型的改性剂元素结合到电介质层表面，Cu金属表面，Ru金属覆盖层或其组合中。

3. 发明授权

US07727912B2 Method of light enhanced atomic layer deposition 有权
标题翻译：光增强原子层沉积的方法
公开(公告)号：US07727912B2
公开(公告)日：2010-06-01
申请号：US11378270
申请日：2006-03-20
申请人： Tadahiro Ishizaka , Frank M. Cerio, Jr. , Jacques Faguet
发明人： Tadahiro Ishizaka , Frank M. Cerio, Jr. , Jacques Faguet
IPC分类号： H01L21/469
CPC分类号： H01L21/76843 , C23C16/32 , C23C16/36 , C23C16/45536 , C23C16/482 , H01L21/28562
摘要： A method light enhanced atomic layer deposition for forming a film on a substrate. The method includes disposing the substrate in a process chamber of a light enhanced atomic layer deposition (LEALD) system configured to perform a LEALD process; and depositing a film on the substrate using the LEALD process, where the depositing includes (a) exposing the substrate to a first process material, (b) exposing the substrate to a second process material containing a reducing agent and irradiating the substrate with a first light radiation having either no or at least partial temporal overlap with the exposing of the substrate to the second process material, (c) repeating steps (a) and (b) until the desired film has been deposited. According to one embodiment of the invention, the deposited film can be a TaCN film or a TaC film.
摘要翻译：一种用于在基板上形成薄膜的光增强原子层沉积。该方法包括将衬底设置在被配置为执行LEALD处理的光增强原子层沉积（LEALD）系统的处理室中; 以及使用LEALD工艺在衬底上沉积膜，其中沉积包括（a）将衬底暴露于第一工艺材料，（b）将衬底暴露于含有还原剂的第二工艺材料上，并用第一具有或不至少部分时间重叠的光辐射与基板暴露于第二工艺材料，（c）重复步骤（a）和（b），直到所需的膜沉积为止。根据本发明的一个实施例，沉积膜可以是TaCN膜或TaC膜。

4. 发明授权

US07651568B2 Plasma enhanced atomic layer deposition system 有权
标题翻译：等离子体增强原子层沉积系统
公开(公告)号：US07651568B2
公开(公告)日：2010-01-26
申请号：US11090256
申请日：2005-03-28
申请人： Tadahiro Ishizaka , Tsukasa Matsuda , Frank M. Cerio, Jr. , Kaoru Yamamoto
发明人： Tadahiro Ishizaka , Tsukasa Matsuda , Frank M. Cerio, Jr. , Kaoru Yamamoto
IPC分类号： C23C16/505 , C23C16/503 , H01L21/306
CPC分类号： C23C16/4409 , C23C16/4404 , C23C16/4412 , C23C16/45542 , C23C16/45544 , C23C16/5096
摘要： A plasma enhanced atomic layer deposition (PEALD) system includes a first chamber component coupled to a second chamber component to provide a processing chamber defining an isolated processing space within the processing chamber. A substrate holder is provided within the processing chamber and configured to support a substrate, a first process material supply system is configured to supply a first process material to the processing chamber and a second process material supply system is configured to supply a second process material to the processing chamber. A power source is configured to couple electromagnetic power to the processing chamber, and a sealing assembly interposed between the first and second chamber components. The sealing assembly includes a plurality of sealing members configured to reduce the amount of external contaminants permeating through an interface of the first and second components into the isolated processing space of the processing chamber, wherein the film is formed on the substrate by alternatingly introducing the first process material and the second process material.
摘要翻译：等离子体增强原子层沉积（PEALD）系统包括耦合到第二室部件的第一室部件，以提供限定处理室内的隔离处理空间的处理室。衬底保持器设置在处理室内并被配置为支撑衬底，第一处理材料供应系统被配置为将第一处理材料供应到处理室，第二处理材料供应系统被配置为将第二处理材料供应到处理室。电源被配置为将电磁功率耦合到处理室，以及插入在第一和第二室部件之间的密封组件。密封组件包括多个密封构件，其被配置为将渗透通过第一和第二组件的界面的外部污染物的量减少到处理室的隔离处理空间中，其中通过交替地引入第一工艺材料和第二工艺材料。

5. 发明授权

US07642201B2 Sequential tantalum-nitride deposition 失效
标题翻译：顺序氮化钽沉积
公开(公告)号：US07642201B2
公开(公告)日：2010-01-05
申请号：US12018813
申请日：2008-01-24
申请人： Frank M. Cerio, Jr. , Shigeru Mizuno , Tsukasa Matsuda , Adam Selsey
发明人： Frank M. Cerio, Jr. , Shigeru Mizuno , Tsukasa Matsuda , Adam Selsey
IPC分类号： H01L21/31
CPC分类号： H01L21/76843 , C23C14/046 , C23C14/32 , C23C14/541 , H01L21/2855 , H01L21/76846 , H01L21/76865
摘要： An iPVD system is programmed to deposit uniform material, such as barrier material, into high aspect ratio nano-size features on semiconductor substrates using a multi-step process within a vacuum chamber which enhances the sidewall coverage compared to the field and bottom coverage(s) while minimizing or eliminating overhang.
摘要翻译： iPVD系统被编程为在真空室内使用多步骤的方法将均匀的材料（例如阻挡材料）沉积在半导体衬底上的高纵横比纳米尺寸特征中，这增强了与场和底部覆盖（s ）同时最小化或消除突出。

6. 发明授权

US08076241B2 Methods for multi-step copper plating on a continuous ruthenium film in recessed features 有权
标题翻译：在连续钌膜上进行多步镀铜的方法
公开(公告)号：US08076241B2
公开(公告)日：2011-12-13
申请号：US12571162
申请日：2009-09-30
申请人： Frank M. Cerio, Jr. , Shigeru Mizuno , Jonathan Reid , Thomas Ponnuswamy
发明人： Frank M. Cerio, Jr. , Shigeru Mizuno , Jonathan Reid , Thomas Ponnuswamy
IPC分类号： H01L21/44
CPC分类号： C23C18/165 , C23C18/161 , C23C18/1651 , C23C18/1692 , C23C18/38 , C25D5/02 , C25D5/10 , C25D5/38 , C25D5/50 , H01L21/28556 , H01L21/2885 , H01L21/76843 , H01L21/76877 , H01L21/76883
摘要： Methods are provided for multi-step Cu metal plating on a continuous Ru metal film in recessed features found in advanced integrated circuits. The use of a continuous Ru metal film prevents formation of undesirable micro-voids during Cu metal filling of high-aspect-ratio recessed features, such as trenches and vias, and enables formation of large Cu metal grains that include a continuous Cu metal layer plated onto the continuous Ru metal film. The large Cu grains lower the electrical resistivity of the Cu filled recessed features and increase the reliability of the integrated circuit.
摘要翻译：提供了在先进集成电路中发现的凹陷特征中的连续Ru金属膜上的多步Cu金属电镀方法。使用连续的Ru金属膜可防止在高纵横比凹陷特征（例如沟槽和通孔）的Cu金属填充期间形成不期望的微孔，并且能够形成大的Cu金属晶粒，其包括连续的Cu金属层电镀到连续的Ru金属膜上。大的Cu晶粒降低了Cu填充凹陷特征的电阻率，增加了集成电路的可靠性。

7. 发明授权

US08163087B2 Plasma enhanced atomic layer deposition system and method 有权
标题翻译：等离子体增强原子层沉积系统和方法
公开(公告)号：US08163087B2
公开(公告)日：2012-04-24
申请号：US11094461
申请日：2005-03-31
申请人： Jacques Faguet , Frank M. Cerio, Jr. , Tsukasa Matsuda , Kaoru Yamamoto
发明人： Jacques Faguet , Frank M. Cerio, Jr. , Tsukasa Matsuda , Kaoru Yamamoto
IPC分类号： C23C16/00
CPC分类号： C23C16/45544 , C23C16/4401 , C23C16/4409 , C23C16/45542 , C23C16/5096 , H01J37/32477
摘要： A plasma enhanced atomic layer deposition (PEALD) method and system, the system including a process chamber and a substrate holder provided within the processing chamber and configured to support a substrate on which a predetermined film will be formed. A first process material supply system is configured to supply a first process material to the process chamber, and a second process material supply system configured to supply a second process material to the process chamber in order to provide a reduction reaction with the first process material to form the predetermined film on the substrate. Also included is a power source configured to couple electromagnetic power to the process chamber to generate a plasma within the process chamber to facilitate the reduction reaction, and a chamber component exposed to the plasma and made from a film compatible material that is compatible with the predetermined film deposited on the substrate.
摘要翻译：等离子体增强原子层沉积（PEALD）方法和系统，该系统包括设置在处理室内的处理室和衬底保持器，并被配置为支撑将在其上形成预定膜的衬底。第一处理材料供应系统被配置为将第一处理材料供应到处理室，以及第二处理材料供应系统，其被配置为将第二处理材料供应到处理室，以便提供与第一处理材料的还原反应在基板上形成预定的膜。还包括被配置为将电磁功率耦合到处理室以在处理室内产生等离子体以促进还原反应的电源，以及暴露于等离子体并由与薄膜相容的材料制成的室组件，其与预定的膜沉积在基底上。

8. 发明授权

US07901545B2 Ionized physical vapor deposition (iPVD) process 有权
公开(公告)号：US07901545B2
公开(公告)日：2011-03-08
申请号：US10811326
申请日：2004-03-26
申请人： Frank M. Cerio, Jr. , Jacques Faguet , Bruce D. Gittleman , Rodney L. Robison
发明人： Frank M. Cerio, Jr. , Jacques Faguet , Bruce D. Gittleman , Rodney L. Robison
IPC分类号： C23C14/34
CPC分类号： H01L21/2855 , C23C14/025 , C23C14/046 , C23C14/345 , C23C14/3492 , H01J37/32706 , H01J2237/3327 , H01L21/76843 , H01L21/76865 , H01L21/76873 , H01L2221/1078 , H01L2221/1089
摘要： An iPVD system is programmed to deposit uniform material, such as barrier material, into high aspect ratio nano-size features on semiconductor substrates using a process which enhances the sidewall coverage compared to the field and bottom coverage(s) while minimizing or eliminating overhang within a vacuum chamber. The iPVD system is operated at low target power and high pressure >50 mT to sputter material from the target. RF energy is coupled into the chamber to form a high density plasma. A small RF bias (less than a few volts) can be applied to aid in enhancing the coverage, especially at the bottom.

9. 发明授权

US06268284B1 In situ titanium aluminide deposit in high aspect ratio features 有权
标题翻译：原位钛化铝沉积物具有高纵横比特征
公开(公告)号：US06268284B1
公开(公告)日：2001-07-31
申请号：US09167363
申请日：1998-10-07
申请人： Frank M. Cerio, Jr.
发明人： Frank M. Cerio, Jr.
IPC分类号： H01L2144
CPC分类号： H01L21/76876 , H01L21/28568 , H01L21/76843 , H01L21/76877 , H01L23/485 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： A method to deposit a composite metal to form a continuous, smooth film in high aspect ratio features such as vias, contacts and/or trenches on a wafer in a single step. Metal atoms are sputtered from a composite target containing a first metal and a second metal in a single reaction chamber. A physical vapor deposition processes such as ionized physical vapor deposition (IPVD) is preferred. In one embodiment, the first metal is titanium and the second metal is aluminum. The method eliminates a high temperature anneal and results in lower resistivity, a better wetting layer for subsequent deposition and improved control over thickness of the metal layer.
摘要翻译：一种沉积复合金属以在单个步骤中在晶片上形成高纵横比特征如通孔，接触和/或沟槽的连续的平滑膜的方法。在单个反应室中从含有第一金属和第二金属的复合靶溅射金属原子。物理气相沉积工艺如电离物理气相沉积（IPVD）是优选的。在一个实施方案中，第一金属是钛，第二金属是铝。该方法消除了高温退火并导致较低的电阻率，更好的润湿层用于随后的沉积和改善对金属层厚度的控制。

10. 发明授权

US07871929B2 Method of forming semiconductor devices containing metal cap layers 有权
标题翻译：形成包含金属盖层的半导体器件的方法
公开(公告)号：US07871929B2
公开(公告)日：2011-01-18
申请号：US12369376
申请日：2009-02-11
申请人： Noel Russell , Frank M. Cerio, Jr. , Gregory Herdt
发明人： Noel Russell , Frank M. Cerio, Jr. , Gregory Herdt
IPC分类号： H01L21/44
CPC分类号： H01L23/53238 , C23C14/04 , C23C14/14 , C23C14/5833 , C23C14/5846 , C23C16/04 , C23C16/06 , C23C16/56 , H01J2237/0812 , H01L21/02074 , H01L21/76825 , H01L21/76849 , H01L21/76859 , H01L2924/0002 , H01L2924/00
摘要： Methods for improving electrical leakage performance and minimizing electromigration in semiconductor devices containing metal cap layers. According to one embodiment, a method of forming a semiconductor device includes planarizing a top surface of a workpiece to form a substantially planar surface with conductive paths and dielectric regions, forming metal cap layers on the conductive paths, and exposing the top surface of the workpiece to a dopant source from a gas cluster ion beam (GCIB) to form doped metal cap layers on the conductive paths and doped dielectric layers on the dielectric regions. According to some embodiments, the metal cap layers and the doped metal cap layers contain a noble metal selected from Pt, Au, Ru, Rh, Ir, and Pd.
摘要翻译：用于提高漏电性能并使包含金属盖层的半导体器件中的电迁移最小化的方法。根据一个实施例，一种形成半导体器件的方法包括平坦化工件的顶表面以形成具有导电路径和电介质区域的基本平坦的表面，在导电路径上形成金属帽层，并暴露工件的顶表面到来自气体簇离子束（GCIB）的掺杂剂源，以在电介质区域上的导电路径上和掺杂的电介质层上形成掺杂金属盖层。根据一些实施例，金属盖层和掺杂金属盖层含有选自Pt，Au，Ru，Rh，Ir和Pd的贵金属。

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