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1. 发明专利

JPH07326554A METHOD AND DEVICE FOR TREATMENT 失效
公开(公告)号：JPH07326554A
公开(公告)日：1995-12-12
申请号：JP13936494
申请日：1994-05-30
申请人： TOKYO ELECTRON LTD , TEL KYUSHU KK
发明人： OKADA SHINJI , HASEBE KEIZO , SEKIMOTO EIICHI , KIMURA YOSHIO , GOTO KAZUYUKI , MATSUMURA KIMIHARU , SENBA NORIO , MURAKAMI HIROSHI , NAGASHIMA SHINJI , YAMAGUCHI TADAYUKI
IPC分类号： H01L21/027
摘要： PURPOSE:To improve yield by preventing impact due to treatment solution supplied to the surface of a subject to be treated and above effect due to bubbles remaining in the treatment solution. CONSTITUTION:A developer supplying nozzle 20 which has a plurality of nozzle holes 25 at the bottom of a developer container 24 is connected with a developer containing tank 30 through a developer supplying tube 29, and the developer L in the developer containing tank 30 is permitted to be supplied to the surface of the wafer W from the developer supplying nozzle 20 by applying pressure by N2 gas supplied to the developer containing tank 30. In the vicinity of the nozzle holes 25 of the developer container 24, a pressure modifying member 26 which controls the liquid pressure fluctuation of the developer L is arranged. A small quantity of developer L is supplied from the developer supplying nozzle 20 in the stationary condition and a liquid film is formed on the surface of the semiconductor wafer W which is directly under the developer supplying nozzle 20. Then, the developer L of a quantity required for the prescribed liquid film thickness is supplied from the developer supplying nozzle 20, and the liquid film with a prescribed thickness is formed on the surface of the semiconductor wafer W by relatively moving the developer supplying nozzle 20 and the semiconductor wafer W.

2. 发明专利

JP2008034437A Board processing method, program, program readable recording medium, and board processing system 有权
标题翻译：板处理方法，程序，程序可读记录介质和板处理系统
公开(公告)号：JP2008034437A
公开(公告)日：2008-02-14
申请号：JP2006203066
申请日：2006-07-26
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： YAMADA YOSHIAKI , YAMAGUCHI TADAYUKI , YAMAMOTO YUICHI , SAIGA YASUHITO
IPC分类号： H01L21/027
CPC分类号： H01L21/0274 , G03F7/2022 , G03F7/38 , H01L21/3086 , H01L21/3088 , H01L21/67748
摘要： PROBLEM TO BE SOLVED: To finally form a pattern at optional size when patterns are formed by conducting exposure treatment plural times between resist film formation and development. SOLUTION: A wafer with a resist film is conveyed to an exposure apparatus to be exposed (Q2). Then, the wafer is exposed and baked in a second processing system (Q3). It is conveyed again to the exposure apparatus for exposure (Q4). The second exposed wafer is conveyed to a first processing system to be exposed and baked again (Q5). A period from the completion of exposure to the start of baking after exposure is controlled to be the same for the first and second processings. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：当通过在抗蚀剂膜形成和显影之间进行多次曝光处理形成图案时，最终形成可选尺寸的图案。解决方案：具有抗蚀剂膜的晶片被传送到曝光装置（Q2）。然后，晶片在第二处理系统（Q3）中曝光和烘烤。再次传送到曝光用曝光装置（Q4）。第二曝光的晶片被传送到第一处理系统以再次曝光和烘烤（Q5）。从曝光完成到曝光开始烘烤后的时间段被控制为与第一和第二处理相同。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2000188253A PATTERN-FORMING APPARATUS, AND COATING/DEVELOPING APPARATUS 失效
公开(公告)号：JP2000188253A
公开(公告)日：2000-07-04
申请号：JP19583199
申请日：1999-07-09
申请人： TOKYO ELECTRON LTD
发明人： YAMAGUCHI TADAYUKI , MATSUSHITA MICHIAKI
IPC分类号： H01L21/027 , G03F7/16 , G03F7/20 , G03F7/30
摘要： PROBLEM TO BE SOLVED: To provide a pattern-forming apparatus and coating/developing apparatus, which can inexpensively dispense with fine temperature adjustment. SOLUTION: A coating/developing apparatus 5 for coating a resist solution on a substrate and for developing the substrate, after being subjected to light exposure is connected to an aligner 6 through an interface 4. Then the aligner 6 is connected with the interface 4 via a duct 42 to communicate therewith, so that a clean air having an adjusted temperature supplied from the outside into the aligner 6 is also supplied, even into the interface 4 from the aligner 6 via the duct 42. Thereby the inside atmosphere of the interface can be adjusted to have the same atmospheric temperature as in the aligner 6, while eliminating the need for fine temperature adjustment within the interface 4.

4. 发明专利

JP2007335626A Substrate processing system and substrate conveying method 有权
标题翻译：基板加工系统和基板输送方法
公开(公告)号：JP2007335626A
公开(公告)日：2007-12-27
申请号：JP2006165620
申请日：2006-06-15
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： YAMAMOTO YUICHI , YAMAGUCHI TADAYUKI , SAIGA YASUHITO , YAMADA YOSHIAKI
IPC分类号： H01L21/677 , H01L21/027
CPC分类号： H01L21/67225 , G03F7/70525 , G03F7/7075 , G03F7/70991 , H01L21/67727 , H01L21/67733 , Y10S414/135
摘要： PROBLEM TO BE SOLVED: To provide a substrate processing system and a substrate conveying method capable of executing each of items of processing at a high throughput in a photolithographic processing unit in semiconductor device manufacturing. SOLUTION: The substrate processing system 100 is provided with a main conveying path 20 as a first automatic substrate conveying line for conveying wafers W in the entire system, and delivering substrates to each of processing units; and a sub-conveying path 30 as a second automatic substrate conveying line for conveying the wafers W in the photolithographic processing unit 1. The sub-conveying path 30 is provided as a conveying system independent from the main conveying path 20. An OHT (overhead hoist transport) 31 circulates and moves through the sub-carrying path 30 formed in a loop to deliver the wafers W to each of the processing apparatuses in the photolithographic processing unit 1, and delivers the wafers W to the processing apparatuses therebetween. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够在半导体器件制造中的光刻处理单元中以高生产量执行各项处理的基板处理系统和基板输送方法。解决方案：基板处理系统100设置有作为第一自动基板输送线的主输送路径20，用于在整个系统中输送晶片W，并将基板输送到每个处理单元; 以及作为用于输送光刻处理单元1中的晶片W的第二自动基板输送线的副输送路径30.副输送路径30设置为独立于主输送路径20的输送系统。OHT（塔顶起重运输）31循环并移动通过形成在回路中的副承载路径30，以将晶片W输送到光刻处理单元1中的每个处理设备，并将晶片W输送到其间的处理设备。版权所有（C）2008，JPO＆INPIT

5. 发明专利

JP2008053687A Method of processing substrate, program, computer storage medium, and system of processing substrate 有权
标题翻译：处理基板，程序，计算机存储介质的方法和处理基板的系统
公开(公告)号：JP2008053687A
公开(公告)日：2008-03-06
申请号：JP2007133807
申请日：2007-05-21
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： YAMADA YOSHIAKI , YAMAGUCHI TADAYUKI , YAMAMOTO YUICHI , SAIGA YASUHITO , SAWAI KAZUO
IPC分类号： H01L21/027 , G03F7/20
CPC分类号： H01L21/31144 , H01L21/0274 , H01L21/0276
摘要： PROBLEM TO BE SOLVED: To reduce the fluctuation of linewidth occurring between patternings when patternings of multiple times are carried out to a film to be processed of the same layer on a wafer surface. SOLUTION: Patterning for the first time is carried out on a film to be processed on a wafer surface, and the dimension of the pattern formed by the patterning for the first time is measured. Then, based on the dimension measurement result of the patterning or the first time, the condition of patterning for the second time is set. In this event, the condition of the patterning for the second time is set so that a difference between the dimension of the patterning for the first time and a target dimension of the patterning for the first time is equal to a difference between a dimension of the patterning for the second time and a target dimension of the patterning for the second time. The patterning for the second time is carried out under the set patterning condition. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了减少在多个图案上的图案之间发生的线宽的波动，在晶圆表面上对同一层的加工膜进行。解决方案：首先对要在晶片表面上处理的膜进行图案化，并且测量通过第一次图案化形成的图案的尺寸。然后，基于图案化或第一次的尺寸测量结果，设置第二次的图案化状态。在这种情况下，第二次图案化的条件被设定为使得第一次的图案化的尺寸和第一次的图案化的目标尺寸之间的差等于第二次构图，第二次构图的目标尺寸。第二次的图案化在设定的图案化条件下进行。版权所有（C）2008，JPO＆INPIT

6. 发明专利

JP2000082735A APPARATUS AND METHOD FOR PROCESSING SUBSTRATE 失效
公开(公告)号：JP2000082735A
公开(公告)日：2000-03-21
申请号：JP16405299
申请日：1999-06-10
申请人： TOKYO ELECTRON LTD
发明人： UEDA KAZUNARI , YAMAGUCHI TADAYUKI , HARA YOSHITAKA
IPC分类号： H01L21/677 , H01L21/027 , H01L21/68
摘要： PROBLEM TO BE SOLVED: To accurately take out an abnormally processed or precedently processed substrate by conveying the substrate in a route of a first placing unit for containing a plurality of substrates before and after processing, a processing unit for processing the substrate and a second placing unit for containing the plurality of the substrates abnormally processed by the processing unit. SOLUTION: A precedently processed wafer W to be confirmed whether a desired result is obtained or not in a processing unit for processing a plurality of substrates is contained in a recovery placing unit 20e, and a selective screen of whether the wafer W is returned to placing units 20a to 20d of a wafer placing unit CR or not is displayed. In the case of selecting to return the wafer W to the placing unit, the wafer W is conveyed to a wafer placing unit via a route B different from a route C of the normally processed wafer W by a wafer conveying mechanism 22. At the time of receiving abnormal occurrence information after the normal process is started, the abnormally processed wafer W is contained in a recovering placing unit 20e, and similar selective screen is displayed. In the case of selecting to return the wafer W to the units 20a to 20d, the wafer W is conveyed to the placing unit via the route B.

7. 发明专利

JPH11354605A SUBSTRATE TRANSFER APPARATUS AND SUBSTRATE PROCESSING APPARATUS 失效
公开(公告)号：JPH11354605A
公开(公告)日：1999-12-24
申请号：JP15800398
申请日：1998-06-05
申请人： TOKYO ELECTRON LTD
发明人： UEDA KAZUNARI , YAMAGUCHI TADAYUKI
IPC分类号： B65G49/07 , H01L21/677 , H01L21/68
摘要： PROBLEM TO BE SOLVED: To provide substrate transfer and processing apparatuses which can further suppress generation of dust, and can realize reduction of the footprint of the apparatus or the like by simplifying mechanisms of stage positioning or the like. SOLUTION: The tip end of a pair of tweezers 2 is provided on its upper face with an engaging member 2a for engaging with the peripheral edge of a wafer W, and a base end of the tweezers 2 is provided on its upper face with a movable engaging member 2b which is faces opposite the engaging member 2a. The movable engaging member 2b, which is made movable by a driving mechanism 2c in a direction towards and away from the engaging member 2a, is able to hold the wafer W in its positioned condition, with the wafer held between the engagement members 2a and 2b.

8. 发明专利

JPH07201719A HEAT TREATMENT DEVICE AND METHOD 失效
公开(公告)号：JPH07201719A
公开(公告)日：1995-08-04
申请号：JP35299693
申请日：1993-12-31
申请人： TOKYO ELECTRON LTD
发明人： USHIJIMA MITSURU , YAMAGUCHI TADAYUKI
IPC分类号： H01L21/22 , H01L21/027
摘要： PURPOSE:To enable processed body to be heat-treated both from surface and rear surface as well as processing time to be cut down by rapidly raising and lowering the temperature for increasing the throughput. CONSTITUTION:Within the heat treatment device mounting wafers W to control the temperature, a mounting base 61 mounting the wafers W, supporting pins 63 projecting from the surface of the mounting base 61 for supporting the wafers W, a cover 65 rapidly raising and lowering the temperature of the wafers W are arranged on the position opposite to the mounting base 61 so that the mounting base 61 and the cover 65 may be independently temperature-controlled. Furthermore, the wafers W are formed free-movably to and from either one out of the mounting base 61 and the cover 65 by the supporting pins 63 thereby enabling the gap between the wafers W, the mounting base 61 and the cover 65 to be made adjustable.

9. 发明专利

JP2000114165A DEVELOPING DEVICE 失效
公开(公告)号：JP2000114165A
公开(公告)日：2000-04-21
申请号：JP30337898
申请日：1998-10-09
申请人： TOKYO ELECTRON LTD
发明人： YAMAGUCHI TADAYUKI
IPC分类号： H01L21/027 , G03F7/30
摘要： PROBLEM TO BE SOLVED: To decrease the waiting state of each constituent device provided in an apparatus and to enhance the operating efficiency of each constituent device. SOLUTION: In a development device 90, which develops wafers W, the wafers W are made to flow sequentially in the order of developer removing chamber 91, a developer resting chamber 92 and a developer removing chamber 93. The supply and stopping of the developer and the removal of the developer are performed in parallel at the same time. Therefore, constituting devices such as a developer supplying nozzle 98, a pure-water supplying nozzle 142, a spin chuck 141 and the like provided in the developing device 90 operate constantly. The exhaust can be performed sufficiently with only the developing solution removing chamber 93.

10. 发明专利

JP2000091226A SUBSTRATE TREATMENT APPARATUS 失效
公开(公告)号：JP2000091226A
公开(公告)日：2000-03-31
申请号：JP19556899
申请日：1999-07-09
申请人： TOKYO ELECTRON LTD
发明人： UEDA KAZUNARI , MATSUSHITA MICHIAKI , ITO KAZUHIKO , YAMAGUCHI TADAYUKI
IPC分类号： H01L21/027 , G03F7/20 , G03F7/30
摘要： PROBLEM TO BE SOLVED: To provide a substrate treatment apparatus with a good throughput at a high-speed treatment, in which strict temperature control can be realized as compared with a conventional case and a circuit pattern can be transfered accurately. SOLUTION: A mechanism for temperature control of a wafer put in a buffer cassette BR in an interface part includes an air temperature control mechanism 101 for BR temperature control and a BR temperature control unit 102 for controlling the air temperature control mechanism 101. In addition, a control signal and a temperature detection signal from an exposure-apparatus temperature control unit 203 to a substrate temperature control mechanism 202 for the exposure apparatus are entered in the BR temperature control unit 102. On the basis of the tendency of the signal, the control signal to the air temperature control mechanism 101 for BR temperature control is adjusted.

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