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1. 发明专利

JP2012204806A Determination method, control method, determination device, pattern formation system, and program 有权
标题翻译：确定方法，控制方法，确定装置，模式形成系统和程序
公开(公告)号：JP2012204806A
公开(公告)日：2012-10-22
申请号：JP2011070947
申请日：2011-03-28
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： SAWAI KAZUO , TANAKA KEISUKE , NAGAHATA HISASHI
IPC分类号： H01L21/3065
CPC分类号： H01J37/32642 , H01J37/32009 , H01J37/3244 , H01J37/32724 , H01J37/32807 , H01J37/3288 , H01J37/32972 , H01J37/3299 , H01J2237/334 , H01J2237/3343 , H01L21/3065
摘要： PROBLEM TO BE SOLVED: To provide a determination method capable of accurately and rapidly determining a replacement timing of a focus ring, a control method, a determination device, a pattern formation system, and a program.SOLUTION: A determination method for determining a replacement timing of a focus ring disposed around a substrate to improve in-plane uniformity of a pattern when the pattern is formed by etching a film on the substrate comprises a measurement step of measuring a shape or dimension of the pattern and a determination step of determining a replacement timing of the focus ring based on the shape or dimension of the measured pattern.
摘要翻译：要解决的问题：提供一种能够准确且快速地确定聚焦环的更换定时，控制方法，确定装置，图案形成系统和程序的确定方法。解决方案：一种确定方法，用于确定设置在基板周围的聚焦环的替换定时，以通过在基板上蚀刻膜形成图案来提高图案的面内均匀性包括测量步骤，测量形状或尺寸，以及基于测量图案的形状或尺寸来确定聚焦环的替换定时的确定步骤。版权所有（C）2013，JPO＆INPIT

2. 发明专利

JP2008053687A Method of processing substrate, program, computer storage medium, and system of processing substrate 有权
标题翻译：处理基板，程序，计算机存储介质的方法和处理基板的系统
公开(公告)号：JP2008053687A
公开(公告)日：2008-03-06
申请号：JP2007133807
申请日：2007-05-21
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： YAMADA YOSHIAKI , YAMAGUCHI TADAYUKI , YAMAMOTO YUICHI , SAIGA YASUHITO , SAWAI KAZUO
IPC分类号： H01L21/027 , G03F7/20
CPC分类号： H01L21/31144 , H01L21/0274 , H01L21/0276
摘要： PROBLEM TO BE SOLVED: To reduce the fluctuation of linewidth occurring between patternings when patternings of multiple times are carried out to a film to be processed of the same layer on a wafer surface. SOLUTION: Patterning for the first time is carried out on a film to be processed on a wafer surface, and the dimension of the pattern formed by the patterning for the first time is measured. Then, based on the dimension measurement result of the patterning or the first time, the condition of patterning for the second time is set. In this event, the condition of the patterning for the second time is set so that a difference between the dimension of the patterning for the first time and a target dimension of the patterning for the first time is equal to a difference between a dimension of the patterning for the second time and a target dimension of the patterning for the second time. The patterning for the second time is carried out under the set patterning condition. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了减少在多个图案上的图案之间发生的线宽的波动，在晶圆表面上对同一层的加工膜进行。解决方案：首先对要在晶片表面上处理的膜进行图案化，并且测量通过第一次图案化形成的图案的尺寸。然后，基于图案化或第一次的尺寸测量结果，设置第二次的图案化状态。在这种情况下，第二次图案化的条件被设定为使得第一次的图案化的尺寸和第一次的图案化的目标尺寸之间的差等于第二次构图，第二次构图的目标尺寸。第二次的图案化在设定的图案化条件下进行。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2010060388A Pattern shape inspection method and manufacturing method for semiconductor device 有权
标题翻译：图形形状检测方法及半导体器件的制造方法
公开(公告)号：JP2010060388A
公开(公告)日：2010-03-18
申请号：JP2008225250
申请日：2008-09-02
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： SAWAI KAZUO , IWABUCHI NORIYUKI , TANAKA KEISUKE
IPC分类号： G01B11/24 , G01N21/956 , H01L21/027 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To provide a pattern shape inspection method capable of accurately inspecting a pattern shape in an SWT (Side Wall Transfer) process, and to provide a manufacturing method for a semiconductor device with improved quality. SOLUTION: The pattern shape detection method inspects the cross-sectional shape of a second pattern formed by a side wall covering a side wall of a first pattern cyclically formed on a substrate, and includes: a measurement step (S21) of acquiring measurement data including amplitude ratio spectra of reflected light which is diffracted and reflected incident light to the substrate having the second pattern formed thereon and phase difference spectra; and determination steps (S22 to S25) of determining the cross-sectional form of the second pattern by calculating a plurality of calculated data including calculated amplitude ratio spectra and phase difference spectra of a plurality of cross-sectional form models each having a different form parameter for determining the cross-sectional form of the side wall and determining a form parameter so that the calculated data optimally matches the measurement data of the second pattern. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够精确地检查SWT（侧壁转移）工艺中的图案形状的图案形状检查方法，并且提供具有改进质量的半导体器件的制造方法。解决方案：图案形状检测方法检查由覆盖在基板上周期性地形成的第一图案的侧壁的侧壁形成的第二图案的横截面形状，并且包括：获取的测量步骤（S21）测量数据包括将入射光衍射并反射到其上形成有第二图案的基板的反射光的振幅比谱，以及相位差光谱; 以及通过计算包括计算的振幅比谱和多个截面形式模型的相位差谱的多个计算数据来确定第二图案的横截面形状的确定步骤（S22至S25），每个横截面模型具有不同的形状参数用于确定侧壁的横截面形状并确定形式参数，使得所计算的数据最佳地匹配第二图案的测量数据。版权所有（C）2010，JPO＆INPIT

4. 发明专利

JP2006147627A Method of detecting synchronous precision of exposure device and method of detecting aberration 审中-公开
标题翻译：检测同步精度的接触装置的方法及检测方法
公开(公告)号：JP2006147627A
公开(公告)日：2006-06-08
申请号：JP2004331746
申请日：2004-11-16
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： SAWAI KAZUO , SONODA AKIHIRO
IPC分类号： H01L21/027
CPC分类号： G03F7/70675 , G03F7/70525
摘要： PROBLEM TO BE SOLVED: To provide a method of detecting the synchronous precision of an exposure device which raises synchronous precision at the time of exposing a resist film.
SOLUTION: The method of detecting the synchronous precision of the exposure device includes steps of forming the resist film in a wafer W (step 1), applying exposure treatment to this resist film, for example, using a photomask having a pattern in which circular patterns are aligned in lateral and longitudinal directions (step 2), developing it (step 3), measuring the shape of a hole formed in the resist film originating in this pattern by a scatterometer technology (step 4), analyzing an acquired spectral reflection spectrum (step 5), and comparing the shape the hole with the pattern shape of the photomask (step 6). As a result, if the synchronous precision is good, the treatment of a product wafer is successively performed (step 7). If it is not good, an alarm is issued, and a process manager inspects the exposure device 14 (step 8).
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种检测在曝光抗蚀剂膜时提高同步精度的曝光装置的同步精度的方法。检测曝光装置的同步精度的方法包括以下步骤：在晶片W中形成抗蚀剂膜（步骤1），对该抗蚀剂膜进行曝光处理，例如使用具有图案的光掩模其中圆形图案在横向和纵向方向（步骤2）对准，显影（步骤3），通过散射仪技术（步骤4）测量由该散点仪技术产生的抗蚀剂膜形成的孔的形状（步骤4），分析获得的光谱反射光谱（步骤5），并将孔的形状与光掩模的图案形状进行比较（步骤6）。结果，如果同步精度良好，则连续执行产品晶片的处理（步骤7）。如果不好，则发出报警，进程管理器检查曝光装置14（步骤8）。版权所有（C）2006，JPO＆NCIPI

5. 发明专利

JP2006173579A Exposure condition setting method, substrate processing unit and computer program 有权
标题翻译：曝光条件设置方法，基板处理单元和计算机程序
公开(公告)号：JP2006173579A
公开(公告)日：2006-06-29
申请号：JP2005323414
申请日：2005-11-08
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： SAWAI KAZUO , SONODA AKIHIRO
IPC分类号： H01L21/027 , G03F7/20
CPC分类号： G03F7/70641 , H01L21/31144 , H01L22/12 , H01L22/34 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide an exposure condition setting method capable of easily obtaining an etching pattern of predetermined shape. SOLUTION: A resist film is formed on the etched layer of a test substrate provided with an etched layer, a plurality of regions in the resist film are sequentially exposed by each changing exposure amounts and focus values in a predetermined test pattern, and is developed to form resist patterns at a plurality of the regions (Steps 1 to 5). Next, etching is performed on the etched film, the resist patterns are exfoliated to measure pattern shapes of the etched film at a plurality of the regions with scatterometry technology (Steps 6 to 9), and the control scope of a combination of allowable exposure amounts and focus values is determined to obtain etching patterns of predetermined shapes based on exposure amounts and focus values of sequential exposure, line widths of resist patterns and line widths of etching patterns (Steps 10 to 11). COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供能够容易地获得预定形状的蚀刻图案的曝光条件设置方法。解决方案：在设置有蚀刻层的测试基板的蚀刻层上形成抗蚀剂膜，通过每个改变的曝光量和聚焦值以预定的测试图案顺序地曝光抗蚀剂膜中的多个区域，以及被开发成在多个区域形成抗蚀剂图案（步骤1至5）。接下来，对蚀刻膜进行蚀刻，利用散射测定技术（步骤6〜9）对抗蚀剂图案进行剥离以测定多个区域的蚀刻膜的图案形状，以及允许曝光量的组合的控制范围并且确定聚焦值，以基于连续曝光的曝光量和聚焦值，抗蚀剂图案的线宽和蚀刻图案的线宽来获得预定形状的蚀刻图案（步骤10至11）。版权所有（C）2006，JPO＆NCIPI

6. 发明专利

JP2006147628A Treatment method of substrate, inspection method of substrate, control program and computer storage medium 有权
标题翻译：基板处理方法，基板检查方法，控制程序和计算机存储介质
公开(公告)号：JP2006147628A
公开(公告)日：2006-06-08
申请号：JP2004331747
申请日：2004-11-16
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： SAWAI KAZUO , SONODA AKIHIRO
IPC分类号： H01L21/027 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To easily distinguish a defect which exists in a substrate beforehand such as a ground defect, etc., and a defect generated in arbitrary treatment such as photolithography, etc.
SOLUTION: Inspection before treatment in a step S101 and inspection after development in a step S105 are performed in a defect inspection unit (INS). Information about a detected defect is saved in a computer. In a step S106, the defected detected by the inspection before the treatment is compared with the defect detected by the inspection after the development, and analysis treatment is performed. In this analysis treatment, the defect of the inspection before the treatment of the step S101 is deleted from the defect of the inspection after the development of the step S105 based on the defect information such as the position, the size, the shape, the number, etc. of the defect. Further, the defect generated in the photolithography is extracted.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：容易地区分预先存在于基板中的缺陷，例如接地缺陷等，以及在诸如光刻等任意处理中产生的缺陷。解决方案：处理前的检查在缺陷检查单元（INS）中执行步骤S101和步骤S105中的显影后检查。有关检测到的缺陷的信息保存在计算机中。在步骤S106中，将通过处理前的检查检测到的缺陷与通过显影后的检查检测到的缺陷进行比较，并进行分析处理。在该分析处理中，基于诸如位置，大小，形状，数量等缺陷信息，在步骤S105的开发之后，从检查缺陷中删除步骤S101的处理之前的检查缺陷等等的缺陷。此外，提取在光刻中产生的缺陷。版权所有（C）2006，JPO＆NCIPI

7. 发明专利

JP2006128572A Exposure condition correcting method, substrate processing apparatus, and computer program 审中-公开
标题翻译：接触条件校正方法，基板处理装置和计算机程序
公开(公告)号：JP2006128572A
公开(公告)日：2006-05-18
申请号：JP2004318275
申请日：2004-11-01
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： SAWAI KAZUO , SONODA AKIHIRO
IPC分类号： H01L21/027
CPC分类号： G03F7/70641
摘要： PROBLEM TO BE SOLVED: To provide an exposure condition correcting method in which optimum exposure conditions, based on the shape measurement result of a resist pattern can be set to an exposure device, and to provide a substrate processing apparatus and a computer program that implement the exposure condition correcting method.
SOLUTION: A resist film is formed on a wafer W, by using a resist coating/development processing system 1 which forms the resist film on the wafer W and performs development processing and the exposure device 14, and different positions of the resist film are exposed one after another with the same pattern, while the focus value is varied and then developed. The resist coating/development processing system 1 measures the line width of the obtained resist pattern by scatterometry, determines an optimum focus value from the relation between the obtained line width and corresponding focus value, and transmits data for correcting the focus value of the exposure device 14 via data communication, without human intervention. The exposure device 14 corrects the focus value based on the data.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种曝光条件校正方法，其中可以将基于抗蚀剂图案的形状测量结果的最佳曝光条件设置为曝光装置，并提供基板处理装置和计算机程序实施曝光条件校正方法。解决方案：通过使用在晶片W上形成抗蚀剂膜并进行显影处理和曝光装置14的抗蚀剂涂覆/显影处理系统1，在晶片W上形成抗蚀剂膜，并且抗蚀剂的不同位置电影以相同的模式一个接一个地暴露，而焦点值是变化的，然后发展。抗蚀剂涂布/显影处理系统1通过散射测量所获得的抗蚀剂图案的线宽度，根据获得的线宽与对应焦点值之间的关系确定最佳聚焦值，并发送用于校正曝光装置的聚焦值的数据 14通过数据通信，无需人为干预。曝光装置14基于该数据校正焦点值。版权所有（C）2006，JPO＆NCIPI

8. 发明公开

EP1814143A4 EXPOSURE CONDITION SETTING METHOD, SUBSTRATE PROCESSING DEVICE, AND COMPUTER PROGRAM 审中-公开
标题翻译：曝光条件设置过程，基片处理设备和计算机程序
公开(公告)号：EP1814143A4
公开(公告)日：2009-01-21
申请号：EP05803015
申请日：2005-11-08
申请人： TOKYO ELECTRON LTD
发明人： SAWAI KAZUO , SONODA AKIHIRO
IPC分类号： H01L21/027 , G03F7/20
CPC分类号： G03F7/70641 , H01L21/31144 , H01L22/12 , H01L22/34 , H01L2924/0002 , H01L2924/00
摘要： A test substrate has a to-be-etched-layer. A resist film is formed on the to-be-etched-layer. A plurality of parts of the resist film are successively exposed with a predetermined test pattern while changing the exposure amount and the focus value. The plurality of parts are developed to form resist patterns there. Next, the to-be-etched-film is etched, the resist pattern is peeled off, and the pattern shape of the to-be-etched-film of the plurality of parts is measured by the scaterometry technique. According to the exposure amount and the focus value of the successive exposure, the resist pattern line width, and the etching pattern line width, it is possible to decide the management range of the combination of the exposure amount and the focus value allowed to obtain an etching pattern of a desired shape.

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