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1. 发明申请

US20080276149A1 Error control code apparatuses and methods of using the same 有权
标题翻译：错误控制代码设备及其使用方法
公开(公告)号：US20080276149A1
公开(公告)日：2008-11-06
申请号：US11905733
申请日：2007-10-03
申请人： Jun Jin Kong , Seung-Hwan Song , Young Hwan Lee , Dong Hyuk Chae , Kyoung Lae Cho , Nam Phil Jo , Sung Chung Park , Dong Ku Kang
发明人： Jun Jin Kong , Seung-Hwan Song , Young Hwan Lee , Dong Hyuk Chae , Kyoung Lae Cho , Nam Phil Jo , Sung Chung Park , Dong Ku Kang
IPC分类号： G06F11/07
CPC分类号： G06F11/1008
摘要： An Error Control Code (ECC) apparatus may include a control signal generator that generates an ECC control signal based on channel information. The ECC apparatus also may include: a plurality of ECC encoding controllers that output data respectively inputted via storage elements corresponding to the ECC control signal; and/or an encoding unit that encodes, using a plurality of data outputted from the plurality of ECC encoding controllers, encoding input data into a number of subdata corresponding to the ECC control signal. In addition or in the alternative, the ECC apparatus may include: a plurality of ECC decoding controllers that output data respectively inputted via the storage elements corresponding to the ECC control signal; and/or a decoding unit that decodes, using a plurality of data outputted from the plurality of ECC decoding controllers, a number of decoding input data corresponding to the ECC control signal into one piece of output data.
摘要翻译：错误控制码（ECC）装置可以包括基于频道信息产生ECC控制信号的控制信号发生器。 ECC装置还可以包括：多个ECC编码控制器，其输出经由与ECC控制信号对应的存储元件分别输入的数据; 和/或编码单元，其使用从所述多个ECC编码控制器输出的多个数据，将输入数据编码为对应于所述ECC控制信号的多个子数据进行编码。另外或者可选地，ECC装置可以包括：多个ECC解码控制器，其输出经由与ECC控制信号对应的存储元件分别输入的数据; 和/或解码单元，其使用从所述多个ECC解码控制器输出的多个数据将对应于所述ECC控制信号的多个解码输入数据解码为一条输出数据。

2. 发明授权

US08255770B2 Multi-level cell memory device and method thereof 有权
标题翻译：多级单元存储装置及其方法
公开(公告)号：US08255770B2
公开(公告)日：2012-08-28
申请号：US13067099
申请日：2011-05-09
申请人： Sung Chung Park , Jun Jin Kong , Young Hwan Lee , Dong Ku Kang
发明人： Sung Chung Park , Jun Jin Kong , Young Hwan Lee , Dong Ku Kang
IPC分类号： G11C29/00 , H03M13/00
CPC分类号： G11C11/5621 , G11C7/1006 , G11C29/00
摘要： A Multi-Level Cell (MLC) memory device and method thereof are provided. The example MLC memory device may be configured to perform data operations, and may include an MLC memory cell, a first coding device performing a first coding function, the first coding function being one of an encoding function and a decoding function, a second coding device performing a second coding function, the second coding function being one of an encoding function and a decoding function and a signal module configured to perform at least one of instructing the MLC memory cell to store data output by the second coding device if the first and second coding functions are encoding functions, and generating a demapped bit stream based on data retrieved from the MLC memory cell if the first and second coding functions are decoding functions.
摘要翻译：提供了一种多级单元（MLC）存储器件及其方法。示例MLC存储器件可以被配置为执行数据操作，并且可以包括MLC存储器单元，执行第一编码功能的第一编码装置，作为编码功能和解码功能之一的第一编码功能，第二编码装置执行第二编码功能，所述第二编码功能是编码功能和解码功能之一;以及信号模块，被配置为执行指令所述MLC存储器单元存储由所述第二编码装置输出的数据中的至少一个，如果所述第一和第二编码功能编码功能是编码功能，并且如果第一和第二编码功能是解码功能，则基于从MLC存储器单元检索的数据来生成解映射比特流。

3. 发明授权

US07962831B2 Multi-level cell memory device and method thereof 有权
公开(公告)号：US07962831B2
公开(公告)日：2011-06-14
申请号：US11808173
申请日：2007-06-07
申请人： Sung Chung Park , Jun Jin Kong , Young Hwan Lee , Dong Ku Kang
发明人： Sung Chung Park , Jun Jin Kong , Young Hwan Lee , Dong Ku Kang
IPC分类号： G11C29/00
CPC分类号： G11C11/5621 , G11C7/1006 , G11C29/00
摘要： A Multi-Level Cell (MLC) memory device and method thereof are provided. The example MLC memory device may be configured to perform data operations, and may include an MLC memory cell, a first coding device performing a first coding function, the first coding function being one of an encoding function and a decoding function, a second coding device performing a second coding function, the second coding function being one of an encoding function and a decoding function and a signal module configured to perform at least one of instructing the MLC memory cell to store data output by the second coding device if the first and second coding functions are encoding functions, and generating a demapped bit stream based on data retrieved from the MLC memory cell if the first and second coding functions are decoding functions.

4. 发明申请

US20080151621A1 Multi-level cell memory devices and methods of storing data in and reading data from the memory devices 有权
标题翻译：多级单元存储器件以及将数据存储在存储器件中并从其读取数据的方法
公开(公告)号：US20080151621A1
公开(公告)日：2008-06-26
申请号：US11802656
申请日：2007-05-24
申请人： Jun Jin Kong , Sung Chung Park , Dong Ku Kang , Young Hwan Lee , Si Hoon Hong , Jae Woong Hyun
发明人： Jun Jin Kong , Sung Chung Park , Dong Ku Kang , Young Hwan Lee , Si Hoon Hong , Jae Woong Hyun
IPC分类号： G11C11/34
CPC分类号： G11C16/10 , G11C7/1006 , G11C11/5628 , G11C11/5642 , G11C16/0483
摘要： A multi-level cell (MLC) memory device may include ‘a’ number of m-bit MLC memory cells; an encoder that encodes ‘k’ bits of data at a code rate of k/n to generate an encoded bit stream; and a signal mapping module that applies pulses to the MLC memory cells in order to write the encoded bit stream in the MLC memory cells. In the device, ‘a’ and ‘m’ may be integers greater than or equal to 2, ‘k’ and ‘n’ may be integers greater than or equal to 1, and ‘n’ may be greater than ‘k’. A method of storing data in the device may include encoding ‘k’ bits of data at a code rate of k/n to generate an encoded bit stream. A method of reading data from the device may include decoding ‘n’ bits of data at a code rate of n/k to generate a decoded bit stream.
摘要翻译：多级单元（MLC）存储器件可以包括“a”个m位MLC存储器单元; 编码器，其以k / n的码率对“k”位数据进行编码，以产生编码比特流; 以及信号映射模块，其向MLC存储器单元施加脉冲以便将编码比特流写入MLC存储器单元。在设备中，'a'和'm'可以是大于或等于2的整数，'k'和'n'可以是大于或等于1的整数，'n'可能大于'k'。在设备中存储数据的方法可以包括以k / n的码率对'k'位数据进行编码，以产生编码比特流。从设备读取数据的方法可以包括以n / k的码率对'n'比特的数据进行解码，以产生解码比特流。

5. 发明申请

US20080137414A1 Multi-level cell memory device and method thereof 有权
标题翻译：多级单元存储装置及其方法
公开(公告)号：US20080137414A1
公开(公告)日：2008-06-12
申请号：US11808173
申请日：2007-06-07
申请人： Sung Chung Park , Jun Jin Kong , Young Hwan Lee , Dong Ku Kang
发明人： Sung Chung Park , Jun Jin Kong , Young Hwan Lee , Dong Ku Kang
IPC分类号： G11C7/10
CPC分类号： G11C11/5621 , G11C7/1006 , G11C29/00
摘要： A Multi-Level Cell (MLC) memory device and method thereof are provided. The example MLC memory device may be configured to perform data operations, and may include an MLC memory cell, a first coding device performing a first coding function, the first coding function being one of an encoding function and a decoding function, a second coding device performing a second coding function, the second coding function being one of an encoding function and a decoding function and a signal module configured to perform at least one of instructing the MLC memory cell to store data output by the second coding device if the first and second coding functions are encoding functions, and generating a demapped bit stream based on data retrieved from the MLC memory cell if the first and second coding functions are decoding functions.
摘要翻译：提供了一种多级单元（MLC）存储器件及其方法。示例MLC存储器件可以被配置为执行数据操作，并且可以包括MLC存储器单元，执行第一编码功能的第一编码装置，作为编码功能和解码功能之一的第一编码功能，第二编码装置执行第二编码功能，所述第二编码功能是编码功能和解码功能之一;以及信号模块，被配置为执行指令所述MLC存储器单元存储由所述第二编码装置输出的数据中的至少一个，如果所述第一和第二编码功能编码功能是编码功能，并且如果第一和第二编码功能是解码功能，则基于从MLC存储器单元检索的数据来生成解映射比特流。

6. 发明授权

US08020081B2 Multi-level cell memory devices using trellis coded modulation and methods of storing data in and reading data from the memory devices 有权
标题翻译：使用网格编码调制的多级单元存储器件以及将数据存储在存储器件中并从其读取数据的方法
公开(公告)号：US08020081B2
公开(公告)日：2011-09-13
申请号：US11802334
申请日：2007-05-22
申请人： Jun Jin Kong , Sung Chung Park , Yun Tae Lee , Young Hwan Lee , Si Hoon Hong , Jae Woong Hyun , Dong Ku Kang
发明人： Jun Jin Kong , Sung Chung Park , Yun Tae Lee , Young Hwan Lee , Si Hoon Hong , Jae Woong Hyun , Dong Ku Kang
IPC分类号： H03M13/03
CPC分类号： G11C11/5628 , G11C7/1006 , G11C11/5642 , G11C16/10
摘要： A multi-level cell (MLC) memory device may include: a MLC memory cell; an outer encoder that encodes data using a first encoding scheme to generate an outer encoded bit stream; and a trellis coded modulation (TCM) modulator that applies a program pulse to the MLC memory cell to write the data in the MLC memory cell. The program pulse may be generated by TCM modulating the outer encoded bit stream. A method of storing data in a MLC memory device, reading data from the MLC memory device, or storing data in and reading data from the MLC memory device may include: encoding data using a first encoding scheme to generate an outer encoded bit stream; and applying a program pulse to a MLC memory cell of the MLC memory device to write the data in the MLC memory cell. The program pulse may be generated by TCM modulating the outer encoded bit stream.
摘要翻译：多级单元（MLC）存储器件可以包括：MLC存储器单元; 外部编码器，其使用第一编码方案对数据进行编码以生成外部编码比特流; 以及网格编码调制（TCM）调制器，其向MLC存储器单元施加编程脉冲以将数据写入MLC存储器单元。可以通过对外部编码比特流进行TCM调制来生成编程脉冲。一种在MLC存储器件中存储数据，从MLC存储器件读取数据或将数据存储在MLC存储器件中并从MLC存储器件读取数据的方法可以包括：使用第一编码方案对数据进行编码以产生外编码位流; 以及向MLC存储器件的MLC存储器单元施加编程脉冲以将数据写入MLC存储单元。可以通过对外部编码比特流进行TCM调制来生成编程脉冲。

7. 发明申请

US20110213930A1 Multi-level cell memory device and method thereof 有权
标题翻译：多级单元存储装置及其方法
公开(公告)号：US20110213930A1
公开(公告)日：2011-09-01
申请号：US13067099
申请日：2011-05-09
申请人： Sung Chung Park , Jun Jin Kong , Young Hwan Lee , Dong Ku Kang
发明人： Sung Chung Park , Jun Jin Kong , Young Hwan Lee , Dong Ku Kang
IPC分类号： G06F12/08
CPC分类号： G11C11/5621 , G11C7/1006 , G11C29/00
摘要： A Multi-Level Cell (MLC) memory device and method thereof are provided. The example MLC memory device may be configured to perform data operations, and may include an MLC memory cell, a first coding device performing a first coding function, the first coding function being one of an encoding function and a decoding function, a second coding device performing a second coding function, the second coding function being one of an encoding function and a decoding function and a signal module configured to perform at least one of instructing the MLC memory cell to store data output by the second coding device if the first and second coding functions are encoding functions, and generating a demapped bit stream based on data retrieved from the MLC memory cell if the first and second coding functions are decoding functions.
摘要翻译：提供了一种多级单元（MLC）存储器件及其方法。示例MLC存储器件可以被配置为执行数据操作，并且可以包括MLC存储器单元，执行第一编码功能的第一编码装置，作为编码功能和解码功能之一的第一编码功能，第二编码装置执行第二编码功能，所述第二编码功能是编码功能和解码功能之一;以及信号模块，被配置为执行指令所述MLC存储器单元存储由所述第二编码装置输出的数据中的至少一个，如果所述第一和第二编码功能编码功能是编码功能，并且如果第一和第二编码功能是解码功能，则基于从MLC存储器单元检索的数据来生成解映射比特流。

8. 发明申请

US20080137413A1 Multi-level cell memory devices using trellis coded modulation and methods of storing data in and reading data from the memory devices 有权
标题翻译：使用网格编码调制的多级单元存储器件以及将数据存储在存储器件中并从其读取数据的方法
公开(公告)号：US20080137413A1
公开(公告)日：2008-06-12
申请号：US11802334
申请日：2007-05-22
申请人： Jun Jin Kong , Sung Chung Park , Yun Tae Lee , Young Hwan Lee , Si Hoon Hong , Jae Woong Hyun , Dong Ku Kang
发明人： Jun Jin Kong , Sung Chung Park , Yun Tae Lee , Young Hwan Lee , Si Hoon Hong , Jae Woong Hyun , Dong Ku Kang
IPC分类号： G11C11/34
CPC分类号： G11C11/5628 , G11C7/1006 , G11C11/5642 , G11C16/10
摘要： A multi-level cell (MLC) memory device may include: a MLC memory cell; an outer encoder that encodes data using a first encoding scheme to generate an outer encoded bit stream; and a TCM modulator that applies a program pulse to the MLC memory cell to write the data in the MLC memory cell. The program pulse may be generated by TCM modulating the outer encoded bit stream. A method of storing data in a MLC memory device, reading data from the MLC memory device, or storing data in and reading data from the MLC memory device may include: encoding data using a first encoding scheme to generate an outer encoded bit stream; and applying a program pulse to a MLC memory cell of the MLC memory device to write the data in the MLC memory cell. The program pulse may be generated by TCM modulating the outer encoded bit stream.
摘要翻译：多级单元（MLC）存储器件可以包括：MLC存储器单元; 外部编码器，其使用第一编码方案对数据进行编码以生成外部编码比特流; 以及将编程脉冲施加到MLC存储器单元以将数据写入MLC存储单元的TCM调制器。可以通过对外部编码比特流进行TCM调制来生成编程脉冲。一种在MLC存储器件中存储数据，从MLC存储器件读取数据或将数据存储在MLC存储器件中并从MLC存储器件读取数据的方法可以包括：使用第一编码方案对数据进行编码以产生外编码位流; 以及向MLC存储器件的MLC存储器单元施加编程脉冲以将数据写入MLC存储单元。可以通过对外部编码比特流进行TCM调制来生成编程脉冲。

9. 发明授权

US08499215B2 Multi-level cell memory devices and methods of storing data in and reading data from the memory devices 有权
标题翻译：多级单元存储器件以及将数据存储在存储器件中并从其读取数据的方法
公开(公告)号：US08499215B2
公开(公告)日：2013-07-30
申请号：US11802656
申请日：2007-05-24
申请人： Jun Jin Kong , Sung Chung Park , Dong Ku Kang , Young Hwan Lee , Si Hoon Hong , Jae Woong Hyun
发明人： Jun Jin Kong , Sung Chung Park , Dong Ku Kang , Young Hwan Lee , Si Hoon Hong , Jae Woong Hyun
IPC分类号： H03M13/29 , G11C29/00
CPC分类号： G11C16/10 , G11C7/1006 , G11C11/5628 , G11C11/5642 , G11C16/0483
摘要： A multi-level cell (MLC) memory device may include ‘a’ number of m-bit MLC memory cells; an encoder that encodes ‘k’ bits of data at a code rate of k/n to generate an encoded bit stream; and a signal mapping module that applies pulses to the MLC memory cells in order to write the encoded bit stream in the MLC memory cells. In the device, ‘a’ and ‘m’ may be integers greater than or equal to 2, ‘k’ and ‘n’ may be integers greater than or equal to 1, and ‘n’ may be greater than ‘k’. A method of storing data in the device may include encoding ‘k’ bits of data at a code rate of k/n to generate an encoded bit stream. A method of reading data from the device may include decoding ‘n’ bits of data at a code rate of n/k to generate a decoded bit stream.
摘要翻译：多级单元（MLC）存储器件可以包括“a”个m位MLC存储器单元; 编码器，其以k / n的码率对“k”位数据进行编码，以产生编码比特流; 以及信号映射模块，其向MLC存储器单元施加脉冲以便将编码比特流写入MLC存储器单元。在设备中，'a'和'm'可以是大于或等于2的整数，'k'和'n'可以是大于或等于1的整数，'n'可能大于'k'。在设备中存储数据的方法可以包括以k / n的码率对'k'位数据进行编码，以产生编码比特流。从设备读取数据的方法可以包括以n / k的码率对'n'比特的数据进行解码，以产生解码比特流。

10. 发明授权

US08028215B2 Error control code apparatuses and methods of using the same 有权
标题翻译：错误控制代码设备及其使用方法
公开(公告)号：US08028215B2
公开(公告)日：2011-09-27
申请号：US11905733
申请日：2007-10-03
申请人： Jun Jin Kong , Seung-Hwan Song , Young Hwan Lee , Dong Hyuk Chae , Kyong Lae Cho , Nam Phil Jo , Sung Chung Park , Dong Ku Kang
发明人： Jun Jin Kong , Seung-Hwan Song , Young Hwan Lee , Dong Hyuk Chae , Kyong Lae Cho , Nam Phil Jo , Sung Chung Park , Dong Ku Kang
IPC分类号： H03M13/00 , G06F11/00
CPC分类号： G06F11/1008
摘要： An Error Control Code (ECC) apparatus may include a control signal generator that generates an ECC control signal based on channel information. The ECC apparatus also may include: a plurality of ECC encoding controllers that output data respectively inputted via storage elements corresponding to the ECC control signal; and/or an encoding unit that encodes, using a plurality of data outputted from the plurality of ECC encoding controllers, encoding input data into a number of subdata corresponding to the ECC control signal. In addition or in the alternative, the ECC apparatus may include: a plurality of ECC decoding controllers that output data respectively inputted via the storage elements corresponding to the ECC control signal; and/or a decoding unit that decodes, using a plurality of data outputted from the plurality of ECC decoding controllers, a number of decoding input data corresponding to the ECC control signal into one piece of output data.
摘要翻译：错误控制码（ECC）装置可以包括基于频道信息产生ECC控制信号的控制信号发生器。 ECC装置还可以包括：多个ECC编码控制器，其输出经由与ECC控制信号对应的存储元件分别输入的数据; 和/或编码单元，其使用从所述多个ECC编码控制器输出的多个数据，将输入数据编码为对应于所述ECC控制信号的多个子数据进行编码。另外或者可选地，ECC装置可以包括：多个ECC解码控制器，其输出经由与ECC控制信号对应的存储元件分别输入的数据; 和/或解码单元，其使用从所述多个ECC解码控制器输出的多个数据将对应于所述ECC控制信号的多个解码输入数据解码为一条输出数据。

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