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1. 发明申请

US20050156285A1 Low k and ultra low k SiCOH dielectric films and methods to form the same 有权
标题翻译：低k和超低k SiCOH介电膜及其形成方法
公开(公告)号：US20050156285A1
公开(公告)日：2005-07-21
申请号：US10758724
申请日：2004-01-16
申请人： Stephen Gates , Christos Dimitrakopoulos , Alfred Grill , Son Nguyen
发明人： Stephen Gates , Christos Dimitrakopoulos , Alfred Grill , Son Nguyen
IPC分类号： H01L21/768 , C23C16/00 , C23C16/40 , C23C16/56 , H01L21/31 , H01L21/312 , H01L21/316 , H01L23/522 , H01L23/532 , H01L23/58
CPC分类号： H01L21/02126 , C23C16/401 , C23C16/56 , H01L21/02216 , H01L21/02274 , H01L21/02304 , H01L21/0234 , H01L21/02348 , H01L21/02351 , H01L21/02362 , H01L21/31633 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Dielectric materials including elements of Si, C, O and H having specific values of mechanical properties (tensile stress, elastic modulus, hardness cohesive strength, crack velocity in water) that result in a stable ultra low k film which is not degraded by water vapor or integration processing are provided. The dielectric materials have a dielectric constant of about 2.8 or less, a tensile stress of less than 45 MPa, an elastic modulus from about 2 to about 15 GPa, and a hardness from about 0.2 to about 2 GPa. Electronic structures including the dielectric materials of the present invention as well as various methods of fabricating the dielectric materials are also provided.
摘要翻译：包含Si，C，O和H元素的介电材料具有机械性能（拉伸应力，弹性模量，硬度内聚强度，水中裂纹速度）的特定值，这导致稳定的超低k膜，其不被水蒸气降解或集成处理。电介质材料具有约2.8或更小的介电常数，小于45MPa的拉伸应力，约2至约15GPa的弹性模量和约0.2至约2GPa的硬度。还提供了包括本发明的电介质材料的电子结构以及制造介电材料的各种方法。

2. 发明申请

US20080044668A1 ULTRALOW DIELECTRIC CONSTANT LAYER WITH CONTROLLED BIAXIAL STRESS 有权
标题翻译：超导介质恒定层与受控双向应力
公开(公告)号：US20080044668A1
公开(公告)日：2008-02-21
申请号：US11034479
申请日：2005-01-13
申请人： Christos Dimitrakopoulos , Stephen Gates , Alfred Grill , Michael Lane , Eric Liniger , Xiao Liu , Son Nguyen , Deborah Neumayer , Thomas Shaw
发明人： Christos Dimitrakopoulos , Stephen Gates , Alfred Grill , Michael Lane , Eric Liniger , Xiao Liu , Son Nguyen , Deborah Neumayer , Thomas Shaw
IPC分类号： B32B9/04 , B32B13/04
CPC分类号： H01L21/76834 , C23C16/30 , C23C16/56 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/02282 , H01L21/02348 , H01L21/3105 , H01L21/31058 , H01L21/31633 , H01L21/76801 , H01L21/76825 , H01L21/76828 , H01L21/76829 , H01L21/76832 , Y10T428/249953 , Y10T428/249969 , Y10T428/249979
摘要： A method for forming a ultralow dielectric constant layer with controlled biaxial stress is described incorporating the steps of forming a layer containing Si, C, O and H by one of PECVD and spin-on coating and curing the film in an environment containing very low concentrations of oxygen and water each less than 10 ppm. A material is also described by using the method with a dielectric constant of not more than 2.8. The invention overcomes the problem of forming films with low biaxial stress less than 46 MPa.
摘要翻译：描述了形成具有受控双轴应力的超低介电常数层的方法，其包括以下步骤：通过PECVD和旋涂方法之一形成包含Si，C，O和H的层，并在含有非常低的浓度的环境中固化该膜的氧和水各自小于10ppm。还通过使用介电常数不大于2.8的方法描述材料。本发明克服了低双轴应力低于46MPa的薄膜形成问题。

3. 发明申请

US20060055004A1 Low K and ultra low K SiCOH dielectric films and methods to form the same 有权
标题翻译：低K和超低K SiCOH介电膜及其形成方法
公开(公告)号：US20060055004A1
公开(公告)日：2006-03-16
申请号：US11268106
申请日：2005-11-07
申请人： Stephen Gates , Christos Dimitrakopoulos , Alfred Grill , Son Nguyen
发明人： Stephen Gates , Christos Dimitrakopoulos , Alfred Grill , Son Nguyen
IPC分类号： H01L23/58
CPC分类号： H01L21/02126 , C23C16/401 , C23C16/56 , H01L21/02216 , H01L21/02274 , H01L21/02304 , H01L21/0234 , H01L21/02348 , H01L21/02351 , H01L21/02362 , H01L21/31633 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Dielectric materials including elements of Si, C, O and H having specific values of mechanical properties (tensile stress, elastic modulus, hardness cohesive strength, crack velocity in water) that result in a stable ultra low k film which is not degraded by water vapor or integration processing are provided. The dielectric materials have a dielectric constant of about 2.8 or less, a tensile stress of less than 45 MPa, an elastic modulus from about 2 to about 15 GPa, and a hardness from about 0.2 to about 2 GPa. Electronic structures including the dielectric materials of the present invention as well as various methods of fabricating the dielectric materials are also provided.
摘要翻译：包含Si，C，O和H元素的介电材料具有机械性能（拉伸应力，弹性模量，硬度内聚强度，水中裂纹速度）的特定值，这导致稳定的超低k膜，其不被水蒸气降解或集成处理。电介质材料具有约2.8或更小的介电常数，小于45MPa的拉伸应力，约2至约15GPa的弹性模量和约0.2至约2GPa的硬度。还提供了包括本发明的电介质材料的电子结构以及制造介电材料的各种方法。

4. 发明授权

US08877340B2 Graphene growth on a non-hexagonal lattice 有权
标题翻译：非六方晶格上的石墨烯生长
公开(公告)号：US08877340B2
公开(公告)日：2014-11-04
申请号：US12844029
申请日：2010-07-27
申请人： Jack O. Chu , Christos Dimitrakopoulos , Marcus O. Freitag , Alfred Grill , Timothy J. McArdle , Chun-Yung Sung , Robert L. Wisnieff
发明人： Jack O. Chu , Christos Dimitrakopoulos , Marcus O. Freitag , Alfred Grill , Timothy J. McArdle , Chun-Yung Sung , Robert L. Wisnieff
IPC分类号： B32B9/00
CPC分类号： H01L21/02527 , B82Y30/00 , B82Y40/00 , C01B32/188 , H01L21/02378 , H01L21/02433 , H01L21/02447 , H01L21/02516 , Y10T428/30
摘要： A graphene layer is formed on a crystallographic surface having a non-hexagonal symmetry. The crystallographic surface can be a surface of a single crystalline semiconductor carbide layer. The non-hexagonal symmetry surface of the single crystalline semiconductor carbide layer is annealed at an elevated temperature in ultra-high vacuum environment to form the graphene layer. During the anneal, the semiconductor atoms on the non-hexagonal surface of the single crystalline semiconductor carbide layer are evaporated selective to the carbon atoms. As the semiconductor atoms are selectively removed, the carbon concentration on the surface of the semiconductor-carbon alloy layer increases. Despite the non-hexagonal symmetry of the surface of the semiconductor-carbon alloy layer, the remaining carbon atoms can coalesce to form a graphene layer having hexagonal symmetry.
摘要翻译：在具有非六边形对称性的结晶表面上形成石墨烯层。晶体表面可以是单晶半导体碳化物层的表面。单晶半导体碳化物层的非六边形对称表面在超高真空环境中在升高的温度下退火以形成石墨烯层。在退火过程中，单晶半导体碳化物层的非六边形表面上的半导体原子对碳原子有选择性的蒸发。随着半导体原子被选择性地去除，半导体 - 碳合金层表面上的碳浓度增加。尽管半导体 - 碳合金层的表面具有非六边形对称性，但剩余的碳原子可以聚结形成具有六边形对称性的石墨烯层。

5. 发明申请

US20120028052A1 GRAPHENE GROWTH ON A NON-HEXAGONAL LATTICE 有权
公开(公告)号：US20120028052A1
公开(公告)日：2012-02-02
申请号：US12844029
申请日：2010-07-27
申请人： Jack O. Chu , Christos Dimitrakopoulos , Marcus O. Freitag , Alfred Grill , Timothy J. McArdle , Chun-Yung Sung , Robert L. Wisnieff
发明人： Jack O. Chu , Christos Dimitrakopoulos , Marcus O. Freitag , Alfred Grill , Timothy J. McArdle , Chun-Yung Sung , Robert L. Wisnieff
IPC分类号： B32B17/06 , H01L21/20
CPC分类号： H01L21/02527 , B82Y30/00 , B82Y40/00 , C01B32/188 , H01L21/02378 , H01L21/02433 , H01L21/02447 , H01L21/02516 , Y10T428/30
摘要： A graphene layer is formed on a crystallographic surface having a non-hexagonal symmetry. The crystallographic surface can be a surface of a single crystalline semiconductor carbide layer. The non-hexagonal symmetry surface of the single crystalline semiconductor carbide layer is annealed at an elevated temperature in ultra-high vacuum environment to form the graphene layer. During the anneal, the semiconductor atoms on the non-hexagonal surface of the single crystalline semiconductor carbide layer are evaporated selective to the carbon atoms. As the semiconductor atoms are selectively removed, the carbon concentration on the surface of the semiconductor-carbon alloy layer increases. Despite the non-hexagonal symmetry of the surface of the semiconductor-carbon alloy layer, the remaining carbon atoms can coalesce to form a graphene layer having hexagonal symmetry.

6. 发明申请

US20120319078A1 GRAPHENE GROWTH ON A NON-HEXAGONAL LATTICE 审中-公开
标题翻译：非黑龙江地区的石墨生长
公开(公告)号：US20120319078A1
公开(公告)日：2012-12-20
申请号：US13596152
申请日：2012-08-28
申请人： Jack O. Chu , Christos Dimitrakopoulos , Marcus O. Freitag , Alfred Grill , Timothy J. McArdle , Chun-Yung Sung , Robert L. Wisnieff
发明人： Jack O. Chu , Christos Dimitrakopoulos , Marcus O. Freitag , Alfred Grill , Timothy J. McArdle , Chun-Yung Sung , Robert L. Wisnieff
IPC分类号： H01L29/06 , B82Y99/00
CPC分类号： H01L21/02527 , B82Y30/00 , B82Y40/00 , C01B32/188 , H01L21/02378 , H01L21/02433 , H01L21/02447 , H01L21/02516 , Y10T428/30
摘要： A graphene layer is formed on a crystallographic surface having a non-hexagonal symmetry. The crystallographic surface can be a surface of a single crystalline semiconductor carbide layer. The non-hexagonal symmetry surface of the single crystalline semiconductor carbide layer is annealed at an elevated temperature in ultra-high vacuum environment to form the graphene layer. During the anneal, the semiconductor atoms on the non-hexagonal surface of the single crystalline semiconductor carbide layer are evaporated selective to the carbon atoms. As the semiconductor atoms are selectively removed, the carbon concentration on the surface of the semiconductor-carbon alloy layer increases. Despite the non-hexagonal symmetry of the surface of the semiconductor-carbon alloy layer, the remaining carbon atoms can coalesce to form a graphene layer having hexagonal symmetry.
摘要翻译：在具有非六边形对称性的结晶表面上形成石墨烯层。晶体表面可以是单晶半导体碳化物层的表面。单晶半导体碳化物层的非六边形对称表面在超高真空环境中在升高的温度下退火以形成石墨烯层。在退火过程中，单晶半导体碳化物层的非六边形表面上的半导体原子对碳原子有选择性的蒸发。随着半导体原子被选择性地去除，半导体 - 碳合金层表面上的碳浓度增加。尽管半导体 - 碳合金层的表面具有非六边形对称性，但剩余的碳原子可以聚结形成具有六边形对称性的石墨烯层。

7. 发明申请

US20070228570A1 RELIABLE BEOL INTEGRATION PROCESS WITH DIRECT CMP OF POROUS SiCOH DIELECTRIC 有权
标题翻译：具有多孔SiCOH介质的直接CMP的可靠的整流过程
公开(公告)号：US20070228570A1
公开(公告)日：2007-10-04
申请号：US11763135
申请日：2007-06-14
申请人： Christos Dimitrakopoulos , Stephen Gates , Vincent McGahay , Sanjay Mehta
发明人： Christos Dimitrakopoulos , Stephen Gates , Vincent McGahay , Sanjay Mehta
IPC分类号： H01L23/532
CPC分类号： H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L21/76829 , H01L21/76834 , H01L21/76885 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： The present invention relates to methods of improving the fabrication of interconnect structures of the single or dual damascene type, in which there is no problem of hard mask retention or of conductivity between the metal lines after fabrication. The methods of the present invention include at least steps of chemical mechanical polishing and UV exposure or chemical repair treatment which steps improve the reliability of the interconnect structure formed. The present invention also relates to an interconnect structure which include a porous ultra low k dielectric of the SiCOH type in which the surface layer thereof has been modified so as to form a gradient layer that has both a density gradient and a C content gradient.
摘要翻译：本发明涉及改进单镶嵌型或双镶嵌型互连结构的制造方法，其中在制造之后金属线之间没有硬掩模保持或导电性问题。本发明的方法包括化学机械抛光和紫外线曝光或化学修复处理的至少步骤，这些步骤提高了形成的互连结构的可靠性。本发明还涉及一种互连结构，其包括SiCOH型的多孔超低k电介质，其中其表面层被修饰以形成具有密度梯度和C含量梯度的梯度层。

8. 发明申请

US20060189133A1 Reliable BEOL integration process with direct CMP of porous SiCOH dielectric 失效
标题翻译：可靠的BEOL集成工艺与多孔SiCOH电介质的直接CMP
公开(公告)号：US20060189133A1
公开(公告)日：2006-08-24
申请号：US11063152
申请日：2005-02-22
申请人： Christos Dimitrakopoulos , Stephen Gates , Vincent McGahay , Sanjay Mehta
发明人： Christos Dimitrakopoulos , Stephen Gates , Vincent McGahay , Sanjay Mehta
IPC分类号： H01L21/4763 , H01L21/44 , H01L23/48
CPC分类号： H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L21/76829 , H01L21/76834 , H01L21/76885 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： The present invention relates to methods of improving the fabrication of interconnect structures of the single or dual damascene type, in which there is no problem of hard mask retention or of conductivity between the metal lines after fabrication. The methods of the present invention include at least steps of chemical mechanical polishing and UV exposure or chemical repair treatment which steps improve the reliability of the interconnect structure formed. The present invention also relates to an interconnect structure which include a porous ultra low k dielectric of the SiCOH type in which the surface layer thereof has been modified so as to form a gradient layer that has both a density gradient and a C content gradient.
摘要翻译：本发明涉及改进单镶嵌型或双镶嵌型互连结构的制造方法，其中在制造之后金属线之间没有硬掩模保持或导电性问题。本发明的方法包括化学机械抛光和紫外线曝光或化学修复处理的至少步骤，这些步骤提高了形成的互连结构的可靠性。本发明还涉及一种互连结构，其包括SiCOH型的多孔超低k电介质，其中其表面层被修饰以形成具有密度梯度和C含量梯度的梯度层。

9. 发明申请

US20070227700A1 VLSI chip hot-spot minimization using nanotubes 审中-公开
标题翻译：使用纳米管的VLSI芯片热点最小化
公开(公告)号：US20070227700A1
公开(公告)日：2007-10-04
申请号：US11397033
申请日：2006-03-29
申请人： Christos Dimitrakopoulos , Christos Georgiou
发明人： Christos Dimitrakopoulos , Christos Georgiou
IPC分类号： F28D15/00
CPC分类号： F28F21/02 , F28D2015/0225 , F28D2021/0029 , F28F2255/00 , F28F2260/02 , H01L23/373 , H01L2924/0002 , H01L2924/00
摘要： The invention relates to a semiconductive device comprising a die with at least one defined hot-spot area lying in a plane on the die and a cooling structure comprising nanotubes such as carbon nanotubes extending in a plane different than the plane of the hot-spot area and outwardly from the plane of the hot-spot area. The nanotubes are operatively associated with the hot-spot area to decrease any temperature gradient between the hot-spot area and at least one other area on the die defined by a temperature lower than the hot-spot area. A matrix material comprising a second heat conducting material substantially surrounds the nanotubes and is operatively associated with and in heat conducting relation with the other area on the die defined by a temperature lower than the hot-spot area. The heat conductivity of the nanotubes is greater than the heat conductivity of the matrix material, with the distal ends of the nanotubes exposed to present a distal surface comprising the first heat conducting means for direct contact with a medium comprising a cooling fluid. The inventors also disclose processes for manufacturing and using the device and products produced by the processes.
摘要翻译：本发明涉及一种半导体器件，其包括具有位于管芯上的平面中的至少一个限定热点区域的管芯和包括在不同于热点区域的平面的平面内延伸的碳纳米管的纳米管的冷却结构并从热点区域的平面向外。纳米管与热点区域可操作地相关联，以降低由热点区域和模具上的至少一个其它区域之间的温度梯度，该温度梯度由低于热点区域的温度限定。包括第二导热材料的基质材料基本上围绕纳米管，并且与由热点区域的温度限定的模具上的另一个区域可操作地相关联并与其导热。纳米管的导热性大于基体材料的导热性，其中纳米管的远端暴露于远侧表面，该远端表面包括用于与包含冷却流体的介质直接接触的第一导热装置。本发明人还公开了用于制造和使用由该方法生产的装置和产品的方法。

10. 发明申请

US20070057624A1 Patterns of electrically conducting polymers and their application as electrodes or electrical contacts 审中-公开
公开(公告)号：US20070057624A1
公开(公告)日：2007-03-15
申请号：US11472959
申请日：2006-06-22
申请人： Marie Angelopoulos , Christos Dimitrakopoulos , Bruce Furman , Teresita Graham , Shui-Chih Lien
发明人： Marie Angelopoulos , Christos Dimitrakopoulos , Bruce Furman , Teresita Graham , Shui-Chih Lien
IPC分类号： H05B33/00 , H01L51/50
CPC分类号： H01L51/5203 , C08G61/12 , G02F1/13439 , H01B1/125 , H01B1/127 , H01B1/128 , H01J29/868 , H01L21/0332 , H01L21/31138 , H01L23/49894 , H01L23/60 , H01L29/456 , H01L29/458 , H01L29/4908 , H01L33/38 , H01L33/42 , H01L51/0018 , H01L51/0021 , H01L51/0023 , H01L51/0504 , H01L51/0508 , H01L51/0512 , H01L51/0545 , H01L51/102 , H01L51/5206 , H01L51/5234 , H01L2251/5323 , H01L2924/0002 , H01L2924/09701 , H01L2924/12044 , Y10T428/10 , Y10T428/1055 , Y10T428/12528 , Y10T428/24331 , Y10T428/31504 , Y10T428/31533 , Y10T428/31678 , Y10T428/31692 , H01L2924/00
摘要： Electronic devices having patterned electrically conductive polymers providing electrical connection thereto and methods of fabrication thereof are described. Liquid crystal display cells are described having at least one of the electrodes providing a bias across the liquid crystal material formed from a patterned electrically conductive polymer. Thin film transistors having patterned electrically conductive polymers as source drain and gate electrodes are described. Light emitting diodes having anode and coated regions formed from patterned electrically conductive polymers are described. Methods of patterning using a resist mask; patterning using a patterned metal layer; patterning the metal layer using a resist; and patterning the electrically conductive polymer directly to form electrodes and anode and cathode regions are described.

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