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1. 发明授权

US08263421B2 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US08263421B2
公开(公告)日：2012-09-11
申请号：US12944841
申请日：2010-11-12
申请人： Shunpei Yamazaki , Sachiaki Teduka , Satoshi Toriumi , Makoto Furuno , Yasuhiro Jinbo , Koji Dairiki , Hideaki Kuwabara
发明人： Shunpei Yamazaki , Sachiaki Teduka , Satoshi Toriumi , Makoto Furuno , Yasuhiro Jinbo , Koji Dairiki , Hideaki Kuwabara
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： C23C16/515 , C23C16/509 , H01L27/1288 , H01L29/04 , H01L29/458 , H01L29/4908 , H01L29/78696
摘要： An object is to provide a manufacturing method of a microcrystalline semiconductor film with favorable quality over a large-area substrate. After forming a gate insulating film over a gate electrode, in order to improve quality of a microcrystalline semiconductor film formed in an initial stage, glow discharge plasma is generated by supplying high-frequency powers with different frequencies, and a lower part of the film near an interface with the gate insulating film is formed under a first film formation condition, which is low in film formation rate but results in a good quality film. Thereafter, an upper part of the film is deposited under a second film formation condition with higher film formation rate, and further, a buffer layer is stacked on the microcrystalline semiconductor film.
摘要翻译：本发明的目的是提供一种在大面积基板上具有优良质量的微晶半导体膜的制造方法。在栅电极上形成栅极绝缘膜之后，为了提高在初始阶段形成的微晶半导体膜的质量，通过提供具有不同频率的高频功率并且膜的下部附近产生辉光放电等离子体在第一成膜条件下形成具有栅极绝缘膜的界面，其成膜速率低，但是导致良好的膜质量。此后，在成膜速度较高的第二成膜条件下沉积膜的上部，并且还在微晶半导体膜上层叠缓冲层。

2. 发明授权

US07833845B2 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US07833845B2
公开(公告)日：2010-11-16
申请号：US12222547
申请日：2008-08-12
申请人： Shunpei Yamazaki , Sachiaki Teduka , Satoshi Toriumi , Makoto Furuno , Yasuhiro Jinbo , Koji Dairiki , Hideaki Kuwabara
发明人： Shunpei Yamazaki , Sachiaki Teduka , Satoshi Toriumi , Makoto Furuno , Yasuhiro Jinbo , Koji Dairiki , Hideaki Kuwabara
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： C23C16/515 , C23C16/509 , H01L27/1288 , H01L29/04 , H01L29/458 , H01L29/4908 , H01L29/78696
摘要： An object is to provide a manufacturing method of a microcrystalline semiconductor film with favorable quality over a large-area substrate. After forming a gate insulating film over a gate electrode, in order to improve quality of a microcrystalline semiconductor film formed in an initial stage, glow discharge plasma is generated by supplying high-frequency powers with different frequencies, and a lower part of the film near an interface with the gate insulating film is formed under a first film formation condition, which is low in film formation rate but results in a good quality film. Thereafter, an upper part of the film is deposited under a second film formation condition with higher film formation rate, and further, a buffer layer is stacked on the microcrystalline semiconductor film.
摘要翻译：本发明的目的是提供一种在大面积基板上具有优良质量的微晶半导体膜的制造方法。在栅电极上形成栅极绝缘膜之后，为了提高在初始阶段形成的微晶半导体膜的质量，通过提供具有不同频率的高频功率并且膜的下部附近产生辉光放电等离子体在第一成膜条件下形成具有栅极绝缘膜的界面，其成膜速率低，但是导致良好的膜质量。此后，在成膜速度较高的第二成膜条件下沉积膜的上部，并且还在微晶半导体膜上层叠缓冲层。

3. 发明申请

US20090047761A1 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20090047761A1
公开(公告)日：2009-02-19
申请号：US12222547
申请日：2008-08-12
申请人： Shunpei Yamazaki , Sachiaki Teduka , Satoshi Toriumi , Makoto Furuno , Yasuhiro Jinbo , Koji Dairiki , Hideaki Kuwabara
发明人： Shunpei Yamazaki , Sachiaki Teduka , Satoshi Toriumi , Makoto Furuno , Yasuhiro Jinbo , Koji Dairiki , Hideaki Kuwabara
IPC分类号： H01L21/00
CPC分类号： C23C16/515 , C23C16/509 , H01L27/1288 , H01L29/04 , H01L29/458 , H01L29/4908 , H01L29/78696
摘要： An object is to provide a manufacturing method of a microcrystalline semiconductor film with favorable quality over a large-area substrate. After forming a gate insulating film over a gate electrode, in order to improve quality of a microcrystalline semiconductor film formed in an initial stage, glow discharge plasma is generated by supplying high-frequency powers with different frequencies, and a lower part of the film near an interface with the gate insulating film is formed under a first film formation condition, which is low in film formation rate but results in a good quality film. Thereafter, an upper part of the film is deposited under a second film formation condition with higher film formation rate, and further, a buffer layer is stacked on the microcrystalline semiconductor film.
摘要翻译：本发明的目的是提供一种在大面积基板上具有优良质量的微晶半导体膜的制造方法。在栅电极上形成栅极绝缘膜之后，为了提高在初始阶段形成的微晶半导体膜的质量，通过提供具有不同频率的高频功率并且膜的下部附近产生辉光放电等离子体在第一成膜条件下形成具有栅极绝缘膜的界面，其成膜速率低，但是导致良好的膜质量。此后，在成膜速度较高的第二成膜条件下沉积膜的上部，并且还在微晶半导体膜上层叠缓冲层。

4. 发明申请

US20090047759A1 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20090047759A1
公开(公告)日：2009-02-19
申请号：US12222109
申请日：2008-08-01
申请人： Shunpei Yamazaki , Sachiaki Teduka , Satoshi Toriumi , Makoto Furuno , Yasuhiro Jinbo , Koji Dairiki , Hideaki Kuwabara
发明人： Shunpei Yamazaki , Sachiaki Teduka , Satoshi Toriumi , Makoto Furuno , Yasuhiro Jinbo , Koji Dairiki , Hideaki Kuwabara
IPC分类号： H01L21/84 , H01L21/00
CPC分类号： H01L29/78696 , H01L21/02532 , H01L21/0262 , H01L21/67207 , H01L27/1288 , H01L29/04 , H01L29/41733 , H01L29/4908 , H01L29/66765 , H01L29/78678
摘要： After a gate insulating film is formed over a gate electrode, in order to improve the quality of a microcrystalline semiconductor film which is formed in an early stage of deposition, a film near an interface with the gate insulating film is formed under a first deposition condition in which a deposition rate is low but the quality of a film to be formed is high, and then, a film is further deposited under a second deposition condition in which a deposition rate is high. Then, a buffer layer is formed to be in contact with the microcrystalline semiconductor film. Further, plasma treatment with a rare gas such as argon or hydrogen plasma treatment is performed before formation of the film under the first deposition condition for removing adsorbed water on a substrate.
摘要翻译：在栅电极上形成栅极绝缘膜之后，为了提高在沉积的早期形成的微晶半导体膜的质量，在第一沉积条件下形成与栅极绝缘膜的界面附近的膜其中沉积速率低，但是要形成的膜的质量高，然后在沉积速率高的第二沉积条件下进一步沉积膜。然后，形成与微晶半导体膜接触的缓冲层。此外，在用于除去基板上的吸附水的第一沉积条件下，在形成膜之前，进行诸如氩气或氢等离子体处理的稀有气体的等离子体处理。

5. 发明授权

US09054206B2 Method for manufacturing semiconductor device 有权
公开(公告)号：US09054206B2
公开(公告)日：2015-06-09
申请号：US12222109
申请日：2008-08-01
申请人： Shunpei Yamazaki , Sachiaki Teduka , Satoshi Toriumi , Makoto Foruno , Yasuhiro Jinbo , Koji Dairiki , Hideaki Kuwabara
发明人： Shunpei Yamazaki , Sachiaki Teduka , Satoshi Toriumi , Makoto Foruno , Yasuhiro Jinbo , Koji Dairiki , Hideaki Kuwabara
IPC分类号： H01L21/84 , H01L29/786 , H01L29/04 , H01L29/417 , H01L29/49 , H01L29/66 , H01L21/02 , H01L21/67 , H01L27/12
CPC分类号： H01L29/78696 , H01L21/02532 , H01L21/0262 , H01L21/67207 , H01L27/1288 , H01L29/04 , H01L29/41733 , H01L29/4908 , H01L29/66765 , H01L29/78678
摘要： After a gate insulating film is formed over a gate electrode, in order to improve the quality of a microcrystalline semiconductor film which is formed in an early stage of deposition, a film near an interface with the gate insulating film is formed under a first deposition condition in which a deposition rate is low but the quality of a film to be formed is high, and then, a film is further deposited under a second deposition condition in which a deposition rate is high. Then, a buffer layer is formed to be in contact with the microcrystalline semiconductor film. Further, plasma treatment with a rare gas such as argon or hydrogen plasma treatment is performed before formation of the film under the first deposition condition for removing adsorbed water on a substrate.

6. 发明授权

US08900970B2 Method for manufacturing a semiconductor device using a flexible substrate 有权
标题翻译：使用柔性基板制造半导体器件的方法
公开(公告)号：US08900970B2
公开(公告)日：2014-12-02
申请号：US11735009
申请日：2007-04-13
申请人： Junya Maruyama , Yasuhiro Jinbo , Hironobu Shoji , Hideaki Kuwabara , Shunpei Yamazaki
发明人： Junya Maruyama , Yasuhiro Jinbo , Hironobu Shoji , Hideaki Kuwabara , Shunpei Yamazaki
IPC分类号： H01L21/30 , H01L21/78 , H01L51/00 , H01L27/12 , H01L23/64 , G06K19/077 , H01L23/66 , G02F1/167 , H01L23/498 , G02F1/136
CPC分类号： H01L21/7806 , G02F1/167 , G02F2001/13613 , G06K19/07749 , H01L23/49855 , H01L23/645 , H01L23/66 , H01L27/1214 , H01L27/1218 , H01L27/1266 , H01L51/003 , H01L51/0097 , H01L2223/6677 , H01L2924/0002 , H01L2924/09701 , H01L2924/12044 , H01L2924/3011 , Y02E10/549 , Y02P70/521 , H01L2924/00
摘要： A technique for peeling an element manufactured through a process at relatively low temperature (lower than 500° C.) from a substrate and transferring the element to a flexible substrate (typically, a plastic film). With the use of an existing manufacturing device for a large glass substrate, a molybdenum film (Mo film) is formed over a glass substrate, an oxide film is formed over the molybdenum film, and an element is formed over the oxide film through a process at relatively low temperature (lower than 500° C.). Then, the element is peeled from the glass substrate and transferred to a flexible substrate.
摘要翻译：一种从基板剥离通过相对较低温度（低于500℃）的工艺制造的元件并将元件转移到柔性基板（通常为塑料膜）的技术。通过使用现有的大型玻璃基板的制造装置，在玻璃基板上形成钼膜（Mo膜），在钼膜上形成氧化膜，通过工序在氧化膜上形成元件在相对较低的温度（低于500℃）。然后，将元件从玻璃基板剥离并转移到柔性基板。

7. 发明授权

US09176353B2 Liquid crystal display device 有权
公开(公告)号：US09176353B2
公开(公告)日：2015-11-03
申请号：US12213728
申请日：2008-06-24
申请人： Shunpei Yamazaki , Yukie Suzuki , Hideaki Kuwabara , Hajime Kimura , Hidekazu Miyairi , Yoshiyuki Kurokawa , Satoshi Kobayashi
发明人： Shunpei Yamazaki , Yukie Suzuki , Hideaki Kuwabara , Hajime Kimura , Hidekazu Miyairi , Yoshiyuki Kurokawa , Satoshi Kobayashi
IPC分类号： G02F1/136 , G02F1/1368 , H01L21/67
CPC分类号： G02F1/1368 , G02F1/133345 , H01L21/67207 , H01L29/41733 , H01L29/66765 , H01L29/78678 , H01L29/78696
摘要： An object is to propose a method of manufacturing, with high mass productivity, liquid crystal display devices having thin film transistors with highly reliable electric characteristics. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.

8. 发明授权

US08648343B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08648343B2
公开(公告)日：2014-02-11
申请号：US12839519
申请日：2010-07-20
申请人： Shunpei Yamazaki , Junichiro Sakata , Hiroyuki Miyake , Hideaki Kuwabara , Ikuko Kawamata
发明人： Shunpei Yamazaki , Junichiro Sakata , Hiroyuki Miyake , Hideaki Kuwabara , Ikuko Kawamata
IPC分类号： H01L27/12
CPC分类号： H01L27/1225 , H01L27/124
摘要： An object is to increase the aperture ratio of a semiconductor device. The semiconductor device includes a driver circuit portion and a display portion (also referred to as a pixel portion) over the same substrate. The driver circuit portion includes a channel-etched thin film transistor for a driver circuit, in which a source electrode and a drain electrode are formed using a metal and a channel layer is formed using an oxide semiconductor, and a driver circuit wiring formed using a metal. The display portion includes a channel protection thin film transistor for a pixel, in which a source electrode and a drain electrode are formed using an oxide conductor and a semiconductor layer is formed using an oxide semiconductor, and a display portion wiring formed using an oxide conductor. The thin film transistors provided in the semiconductor device are formed with a resist mask formed using a multi-tone mask.
摘要翻译：目的是提高半导体器件的开口率。半导体器件包括驱动器电路部分和在同一衬底上的显示部分（也称为像素部分）。驱动器电路部分包括用于驱动电路的沟道蚀刻薄膜晶体管，其中使用金属形成源电极和漏电极，并且使用氧化物半导体形成沟道层，以及使用金属。显示部分包括用于像素的沟道保护薄膜晶体管，其中使用氧化物导体形成源电极和漏电极，并且使用氧化物半导体形成半导体层，以及使用氧化物导体形成的显示部分布线。设置在半导体器件中的薄膜晶体管形成有使用多色调掩模形成的抗蚀剂掩模。

9. 发明授权

US08552423B2 Semiconductor device and method for manufacturing semiconductor device 有权
标题翻译：半导体装置及半导体装置的制造方法
公开(公告)号：US08552423B2
公开(公告)日：2013-10-08
申请号：US12835903
申请日：2010-07-14
申请人： Shunpei Yamazaki , Junichiro Sakata , Hiroyuki Miyake , Hideaki Kuwabara , Tatsuya Takahashi
发明人： Shunpei Yamazaki , Junichiro Sakata , Hiroyuki Miyake , Hideaki Kuwabara , Tatsuya Takahashi
IPC分类号： H01L29/10
CPC分类号： H01L27/1225 , G02F1/1368 , H01L21/02554 , H01L21/02565 , H01L27/124 , H01L27/1251 , H01L27/1255 , H01L29/45 , H01L29/78645
摘要： An aperture ratio of a semiconductor device is improved. A driver circuit and a pixel are provided over one substrate, and a first thin film transistor in the driver circuit and a second thin film transistor in the pixel each include a gate electrode layer, a gate insulating layer over the gate electrode layer, an oxide semiconductor layer over the gate insulating layer, source and drain electrode layers over the oxide semiconductor layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer over the gate insulating layer, the oxide semiconductor layer, and the source and drain electrode layers. The gate electrode layer, the gate insulating layer, the oxide semiconductor layer, the source and drain electrode layers, and the oxide insulating layer of the second thin film transistor each have a light-transmitting property.
摘要翻译：半导体器件的开口率提高。驱动电路和像素设置在一个基板上，驱动电路中的第一薄膜晶体管和像素中的第二薄膜晶体管均包括栅极电极层，栅电极层上的栅极绝缘层，氧化物栅极绝缘层上的半导体层，氧化物半导体层上的源极和漏极层以及与栅极绝缘层，氧化物半导体层以及源极和漏极上的部分氧化物半导体层接触的氧化物绝缘层层。栅极电极层，栅极绝缘层，氧化物半导体层，源极和漏极电极层以及第二薄膜晶体管的氧化物绝缘层各自具有透光性。

10. 发明授权

US08421135B2 Semiconductor device, and manufacturing method thereof 有权
公开(公告)号：US08421135B2
公开(公告)日：2013-04-16
申请号：US12323724
申请日：2008-11-26
申请人： Shunpei Yamazaki , Jun Koyama , Hideaki Kuwabara , Saishi Fujikawa
发明人： Shunpei Yamazaki , Jun Koyama , Hideaki Kuwabara , Saishi Fujikawa
IPC分类号： H01L31/062
CPC分类号： H01L27/1222 , G02F1/13454 , G02F1/13458 , H01L27/124 , H01L27/156 , H01L29/6675 , H01L29/66765
摘要： In a display device such as a liquid crystal display device, a large-sized display screen is realized under low power consumption. A surface of a source wiring line of a pixel portion employed in an active matrix type liquid crystal display device is processed by way of a plating process operation so as to lower a resistance value of this source wiring line. The source wiring line of the pixel portion is manufactured at a step different from a step for manufacturing a source wiring line of a drive circuit portion. Further, electrodes of a terminal portion are processed by a plating process operation so as to reduce a resistance value thereof.

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