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1. 发明申请

US20060022300A1 Self correcting multiple-link fuse 有权
标题翻译：自校正多链路保险丝
公开(公告)号：US20060022300A1
公开(公告)日：2006-02-02
申请号：US10910008
申请日：2004-08-02
申请人： Shieh-Yang Wu , Shi-Bai Chen
发明人： Shieh-Yang Wu , Shi-Bai Chen
IPC分类号： H01L29/00 , H01L21/82
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： An improved fuse link structure and fuse blowing method, the fuse-link structure including a plurality of elongated fuse-link members comprising polysilicon electrically connected in parallel according to a common input Voltage contact and common output current contact to form a fuse-link structure; and, wherein at least a portion of the plurality of elongated fuse-link comprise a different electrical resistance with respect to one another according to a variable condition selected from the group consisting of critical dimension, polysilicon doping condition, and silicide agglomeration condition.
摘要翻译：一种改进的熔断体结构和保险丝熔断方法，所述熔断体结构包括多个细长的熔断体连接部件，所述多个细长的熔断体部件包括根据共同的输入电压接触和公共的输出电流接触并联电连接以形成熔丝链节结构的多晶硅; 并且其中所述多个细长熔断体的至少一部分根据从由临界尺寸，多晶硅掺杂条件和硅化物聚集条件组成的组中选择的可变条件相对于彼此包括不同的电阻。

2. 发明授权

US07304366B2 Self correcting multiple-link fuse 有权
标题翻译：自校正多链路保险丝
公开(公告)号：US07304366B2
公开(公告)日：2007-12-04
申请号：US10910008
申请日：2004-08-02
申请人： Shieh-Yang Wu , Shi-Bai Chen
发明人： Shieh-Yang Wu , Shi-Bai Chen
IPC分类号： H01L29/00 , H01L21/82 , G11C17/00
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： An improved fuse link structure and fuse blowing method, the fuse-link structure including a plurality of elongated fuse-link members comprising polysilicon electrically connected in parallel according to a common input Voltage contact and common output current contact to form a fuse-link structure; and, wherein at least a portion of the plurality of elongated fuse-link comprise a different electrical resistance with respect to one another according to a variable condition selected from the group consisting of critical dimension, polysilicon doping condition, and silicide agglomeration condition.
摘要翻译：一种改进的熔断体结构和保险丝熔断方法，所述熔断体结构包括多个细长的熔断体连接部件，所述多个细长的熔断体部件包括根据共同的输入电压接触和公共的输出电流接触并联电连接以形成熔丝链节结构的多晶硅; 并且其中所述多个细长熔断体的至少一部分根据从由临界尺寸，多晶硅掺杂条件和硅化物聚集条件组成的组中选择的可变条件相对于彼此包含不同的电阻。

3. 发明申请

US20120196434A1 E-fuse Structure Design in Electrical Programmable Redundancy for Embedded Memory Circuit 有权
标题翻译：嵌入式存储器电路的电可编程冗余中的电熔丝结构设计
公开(公告)号：US20120196434A1
公开(公告)日：2012-08-02
申请号：US13443550
申请日：2012-04-10
申请人： Kong-Beng Thei , Chung Long Cheng , Chung-Shi Liu , Harry Chuang , Shien-Yang Wu , Shi-Bai Chen
发明人： Kong-Beng Thei , Chung Long Cheng , Chung-Shi Liu , Harry Chuang , Shien-Yang Wu , Shi-Bai Chen
IPC分类号： H01L21/02
CPC分类号： H01L23/5256 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： An electrical fuse and a method of forming the same are presented. A first-layer conductive line is formed over a base material. A via is formed over the first-layer conductive line. The via preferably comprises a barrier layer and a conductive material. A second-layer conductive line is formed over the via. A first external pad is formed coupling to the first-layer conductive line. A second external pad is formed coupling to the second-layer conductive line. The via, the first conductive line and the second conductive line are adapted to be an electrical fuse. The electrical fuse can be burned out by applying a current. The vertical structure of the preferred embodiment is suitable to be formed in any layer.
摘要翻译：提出了电熔丝及其形成方法。在基材上形成第一层导电线。在第一层导电线上形成通孔。通孔优选包括阻挡层和导电材料。在通孔上形成第二层导电线。第一外部焊盘形成为耦合到第一层导电线。第二外部焊盘形成为耦合到第二层导电线。通孔，第一导线和第二导线适于作为电熔丝。电熔丝可以通过施加电流而烧坏。优选实施例的垂直结构适合于形成任何层。

4. 发明申请

US20120154102A1 ELECTRICAL FUSE STRUCTURE 审中-公开
标题翻译：电熔丝结构
公开(公告)号：US20120154102A1
公开(公告)日：2012-06-21
申请号：US12969593
申请日：2010-12-16
申请人： Shi-Bai Chen
发明人： Shi-Bai Chen
IPC分类号： H01H85/08
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： An electrical fuse structure includes a first metal strip having a first width W1 and a first length L1; a second metal strip having a second width W2 and a second length L2; and at least one via element having a via width W0, the via element being electrically connecting one end of the first metal strip to one end of the second metal strip, wherein W1
摘要翻译：电熔丝结构包括具有第一宽度W1和第一长度L1的第一金属带; 具有第二宽度W2和第二长度L2的第二金属带; 以及至少一个具有通孔宽度W0的通孔元件，所述通孔元件将所述第一金属带的一端电连接到所述第二金属带的一端，其中W1 <5W0。

5. 发明申请

US20120009734A1 SEMICONDUCTOR DEVICE ASSEMBLY AND METHOD THEREOF 有权
标题翻译：半导体器件组件及其方法
公开(公告)号：US20120009734A1
公开(公告)日：2012-01-12
申请号：US13241262
申请日：2011-09-23
申请人： Yin-Chao Huang , Shi-Bai Chen , Kang-Wei Hsueh , Hung-Sung Li
发明人： Yin-Chao Huang , Shi-Bai Chen , Kang-Wei Hsueh , Hung-Sung Li
IPC分类号： H01L21/60
CPC分类号： H01L23/49575 , H01L23/49531 , H01L24/06 , H01L24/48 , H01L24/49 , H01L25/0652 , H01L2224/05553 , H01L2224/05554 , H01L2224/05599 , H01L2224/32145 , H01L2224/48137 , H01L2224/48139 , H01L2224/48145 , H01L2224/4911 , H01L2224/49171 , H01L2224/49175 , H01L2224/85399 , H01L2225/06506 , H01L2225/0651 , H01L2225/06527 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01033 , H01L2924/01075 , H01L2924/01082 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor device assembly includes a first semiconductor die, a second semiconductor die, at least one semiconductor package component or another semiconductor die, a first conductive element and a second conductive element. The first semiconductor die includes at least one bonding pad. The second semiconductor die includes a bonding pad module. The first conductive element is coupled between the bonding pad module of the second semiconductor die and the bonding pad of the first semiconductor die, and the second conductive element is coupled between the bonding pad module of the second semiconductor die and the semiconductor package component or the another semiconductor die, wherein the first semiconductor die is coupled to the semiconductor package component or the another semiconductor die via the bonding pad and the bonding pad module and the first and second conductive elements.
摘要翻译：半导体器件组件包括第一半导体管芯，第二半导体管芯，至少一个半导体封装部件或另一个半导体管芯，第一导电元件和第二导电元件。第一半导体管芯包括至少一个焊盘。第二半导体管芯包括焊盘模块。第一导电元件耦合在第二半导体管芯的焊盘模块和第一半导体管芯的焊盘之间，并且第二导电元件耦合在第二半导体管芯的焊盘模块和半导体封装部件之间或者另一个半导体管芯，其中第一半导体管芯经由焊盘和焊盘模块以及第一和第二导电元件耦合到半导体封装部件或另一半导体管芯。

6. 发明授权

US07667302B1 Integrated circuit chip with seal ring structure 有权
标题翻译：集成电路芯片采用密封圈结构
公开(公告)号：US07667302B1
公开(公告)日：2010-02-23
申请号：US12207490
申请日：2008-09-09
申请人： Tien-Chang Chang , Shi-Bai Chen , Tao Cheng
发明人： Tien-Chang Chang , Shi-Bai Chen , Tao Cheng
IPC分类号： H01L23/552
CPC分类号： H01L27/0203 , H01L23/5225 , H01L23/552 , H01L23/564 , H01L23/66 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit chip includes an analog and/or RF circuit block, a digital circuit, and a seal ring structure surrounding and protecting the analog and/or RF circuit block. The seal ring structure comprises a continuous outer seal ring, and a discontinuous inner seal ring divided into at least a first portion and a second portion. The second portion is situated in front of the analog and/or RF circuit block for shielding a noise from interfering the analog and/or RF circuit block.
摘要翻译：集成电路芯片包括模拟和/或RF电路块，数字电路和围绕和保护模拟和/或RF电路块的密封环结构。密封圈结构包括连续的外部密封环，以及分成至少第一部分和第二部分的不连续的内部密封环。第二部分位于模拟和/或RF电路块的前面，用于屏蔽噪声干扰模拟和/或RF电路块。

7. 发明授权

US08361757B2 Semiconductor device assembly and method thereof 有权
标题翻译：半导体器件组件及其方法
公开(公告)号：US08361757B2
公开(公告)日：2013-01-29
申请号：US13241262
申请日：2011-09-23
申请人： Yin-Chao Huang , Shi-Bai Chen , Kang-Wei Hsueh , Hung-Sung Li
发明人： Yin-Chao Huang , Shi-Bai Chen , Kang-Wei Hsueh , Hung-Sung Li
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L23/49575 , H01L23/49531 , H01L24/06 , H01L24/48 , H01L24/49 , H01L25/0652 , H01L2224/05553 , H01L2224/05554 , H01L2224/05599 , H01L2224/32145 , H01L2224/48137 , H01L2224/48139 , H01L2224/48145 , H01L2224/4911 , H01L2224/49171 , H01L2224/49175 , H01L2224/85399 , H01L2225/06506 , H01L2225/0651 , H01L2225/06527 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01033 , H01L2924/01075 , H01L2924/01082 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor device assembly includes a first semiconductor die, a second semiconductor die, at least one semiconductor package component or another semiconductor die, a first conductive element and a second conductive element. The first semiconductor die includes at least one bonding pad. The second semiconductor die includes a bonding pad module. The first conductive element is coupled between the bonding pad module of the second semiconductor die and the bonding pad of the first semiconductor die, and the second conductive element is coupled between the bonding pad module of the second semiconductor die and the semiconductor package component or the another semiconductor die, wherein the first semiconductor die is coupled to the semiconductor package component or the another semiconductor die via the bonding pad and the bonding pad module and the first and second conductive elements.
摘要翻译：半导体器件组件包括第一半导体管芯，第二半导体管芯，至少一个半导体封装部件或另一个半导体管芯，第一导电元件和第二导电元件。第一半导体管芯包括至少一个焊盘。第二半导体管芯包括焊盘模块。第一导电元件耦合在第二半导体管芯的焊盘模块和第一半导体管芯的焊盘之间，并且第二导电元件耦合在第二半导体管芯的焊盘模块和半导体封装部件之间或者另一个半导体管芯，其中第一半导体管芯经由焊盘和焊盘模块以及第一和第二导电元件耦合到半导体封装部件或另一半导体管芯。

8. 发明授权

US07892895B2 Diode junction poly fuse 有权
标题翻译：二极管结聚熔丝
公开(公告)号：US07892895B2
公开(公告)日：2011-02-22
申请号：US11207634
申请日：2005-08-19
申请人： Shien-Yang Wu , Shi-Bai Chen
发明人： Shien-Yang Wu , Shi-Bai Chen
IPC分类号： H01L21/82
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： System and method for providing an electrical fuse having a p-n junction diode. A preferred embodiment comprises a cathode, an anode, and one or more links formed between the cathode and the anode. The cathode and the portion of the cathode adjoining the link are doped with a first impurity, preferably a p-type impurity. The anode and the portion of the link adjoining the anode are doped with a second impurity, preferably an n-type impurity. The junction of the first impurity and the second impurity in the link forms a p-n junction diode. A conductive layer, such as a silicide layer, is formed over the p-n junction diodes. In an alternative embodiment, a plurality of p-n junction diodes may be formed in each link. One or more contacts may be formed to provide electrical contact to the cathode and the anode.
摘要翻译：用于提供具有p-n结二极管的电熔丝的系统和方法。优选实施例包括阴极，阳极和形成在阴极和阳极之间的一个或多个连接。邻接连接的阴极和阴极部分掺杂有第一杂质，优选p型杂质。阳极和邻接阳极的连接部分掺杂有第二杂质，优选为n型杂质。连接中的第一杂质和第二杂质的结形成p-n结二极管。在p-n结二极管上形成诸如硅化物层的导电层。在替代实施例中，可以在每个链路中形成多个p-n结二极管。可以形成一个或多个触点以提供与阴极和阳极的电接触。

9. 发明申请

US20050218475A1 Low power fuse structure and method for making the same 有权
标题翻译：低功率熔断器结构及制作方法
公开(公告)号：US20050218475A1
公开(公告)日：2005-10-06
申请号：US10805747
申请日：2004-03-22
申请人： Shien-Yang Wu , Shi-Bai Chen
发明人： Shien-Yang Wu , Shi-Bai Chen
IPC分类号： H01L21/02 , H01L21/768 , H01L23/525 , H01L23/62 , H01L27/10
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A fuse comprises a silicide element disposed above a substrate, a first terminal contact coupled to a first end of the silicide element, and a first metal line disposed above the silicide element and coupled to the first terminal contact. The fuse further comprises a plurality of second terminal contacts coupled to a second end of the silicide element, and a second metal line disposed above the silicide element and coupled to the plurality of second terminal contacts. The silicide element has a sufficient width that a programming potential applied across the first and second metal lines causes a discontinuity in the first terminal contact.
摘要翻译：熔丝包括设置在衬底上的硅化物元件，耦合到硅化物元件的第一端的第一端子触点和设置在硅化物元件上方并耦合到第一端子触点的第一金属线。熔丝还包括耦合到硅化物元件的第二端的多个第二端子触点，以及设置在硅化物元件上方并耦合到多个第二端子触点的第二金属线。硅化物元件具有足够的宽度，使得施加在第一和第二金属线上的编程电位导致第一端子触点中的不连续性。

10. 发明授权

US08174091B2 Fuse structure 有权
标题翻译：保险丝结构
公开(公告)号：US08174091B2
公开(公告)日：2012-05-08
申请号：US12503641
申请日：2009-07-15
申请人： Kong-Beng Thei , Chung Long Cheng , Chung-Shi Liu , Harry Chuang , Shien-Yang Wu , Shi-Bai Chen
发明人： Kong-Beng Thei , Chung Long Cheng , Chung-Shi Liu , Harry Chuang , Shien-Yang Wu , Shi-Bai Chen
IPC分类号： H01L29/00
CPC分类号： H01L23/5256 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： An electrical fuse and a method of forming the same are presented. A first-layer conductive line is formed over a base material. A via is formed over the first-layer conductive line. The via preferably comprises a barrier layer and a conductive material. A second-layer conductive line is formed over the via. A first external pad is formed coupling to the first-layer conductive line. A second external pad is formed coupling to the second-layer conductive line. The via, the first conductive line and the second conductive line are adapted to be an electrical fuse. The electrical fuse can be burned out by applying a current. The vertical structure of the preferred embodiment is suitable to be formed in any layer.
摘要翻译：提出了电熔丝及其形成方法。在基材上形成第一层导电线。在第一层导电线上形成通孔。通孔优选包括阻挡层和导电材料。在通孔上形成第二层导电线。第一外部焊盘形成为耦合到第一层导电线。第二外部焊盘形成为耦合到第二层导电线。通孔，第一导线和第二导线适于作为电熔丝。电熔丝可以通过施加电流而烧坏。优选实施例的垂直结构适合于形成任何层。

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