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1. 发明授权

US08198923B2 Harmonic suppression circuit, an injection-locked frequency divider circuit and associated methods 有权
标题翻译：谐波抑制电路，注入锁相分频电路及相关方法
公开(公告)号：US08198923B2
公开(公告)日：2012-06-12
申请号：US12165151
申请日：2008-06-30
申请人： Shey-Shi Lu , Hsien-Ku Chen
发明人： Shey-Shi Lu , Hsien-Ku Chen
IPC分类号： H03B19/06
CPC分类号： H03B19/14
摘要： The invention includes a harmonic suppression circuit, an injection-locked frequency divider circuit (ILFD) and associated methods. The harmonic suppression circuit comprises a source voltage, two suppression modules, two input terminals, two smoothed output terminals and a ground. The ILFD comprises a ground, an input transistor, an input terminal, two divider legs, two output terminals and a source voltage. The associated method to improve harmonic suppression comprises acts of synthesizing differential-phase signals and simultaneously suppressing second harmonics of in-phase signals. The method to extent an ILFD's locking range comprises acts of decreasing quality factor while keeping resonance frequency constant.
摘要翻译：本发明包括谐波抑制电路，注入锁定分频器电路（ILFD）和相关方法。谐波抑制电路包括源极电压，两个抑制模块，两个输入端子，两个平滑的输出端子和接地。 ILFD包括接地，输入晶体管，输入端子，两个分频器脚，两个输出端子和源极电压。改善谐波抑制的相关方法包括合成差分相位信号并同时抑制同相信号的二次谐波的动作。扩展ILFD锁定范围的方法包括降低质量因子的作用，同时保持共振频率不变。

2. 发明授权

US08354867B2 Phase-locked loop circuit and an associated method 有权
标题翻译：锁相环电路及相关方法
公开(公告)号：US08354867B2
公开(公告)日：2013-01-15
申请号：US12718291
申请日：2010-03-05
申请人： Shey-Shi Lu , Hsien-Ku Chen
发明人： Shey-Shi Lu , Hsien-Ku Chen
IPC分类号： H03D9/00 , G01R25/00 , H03L7/06 , H03L7/00
CPC分类号： H03L7/0814 , H03L7/085 , H03L7/23
摘要： The present invention relates to a PLL circuit and an associated method that allows the PLL circuit to operate at a higher operating frequency with a wider bandwidth and a better out-band noise suppression. The PLL circuit comprises a delay locked loop (DLL), a phase-frequency detector (PFD), a loop filter, a voltage controlled oscillator (VCO) and a frequency divider.
摘要翻译：本发明涉及一种PLL电路和相关方法，其允许PLL电路在更宽的带宽和更好的带外噪声抑制的较高工作频率下工作。 PLL电路包括延迟锁定环（DLL），相位频率检测器（PFD），环路滤波器，压控振荡器（VCO）和分频器。

3. 发明申请

US20090261868A1 HARMONIC SUPPRESSION CIRCUIT, AN INJECTION-LOCKED FREQUENCY DIVIDER CIRCUIT AND ASSOCIATED METHODS 有权
标题翻译：谐波抑制电路，注射锁频分路电路及相关方法
公开(公告)号：US20090261868A1
公开(公告)日：2009-10-22
申请号：US12165151
申请日：2008-06-30
申请人： Shey-Shi Lu , Hsien-Ku Chen
发明人： Shey-Shi Lu , Hsien-Ku Chen
IPC分类号： H03B19/12 , H03B1/04
CPC分类号： H03B19/14
摘要： The invention includes a harmonic suppression circuit, an injection-locked frequency divider circuit (ILFD) and associated methods. The harmonic suppression circuit comprises a source voltage, two suppression modules, two input terminals, two smoothed output terminals and a ground. The ILFD comprises a ground, an input transistor, an input terminal, two divider legs, two output terminals and a source voltage. The associated method to improve harmonic suppression comprises acts of synthesizing differential-phase signals and simultaneously suppressing second harmonics of in-phase signals. The method to extent an ILFD's locking range comprises acts of decreasing quality factor while keeping resonance frequency constant.
摘要翻译：本发明包括谐波抑制电路，注入锁定分频器电路（ILFD）和相关方法。谐波抑制电路包括源极电压，两个抑制模块，两个输入端子，两个平滑的输出端子和接地。 ILFD包括接地，输入晶体管，输入端子，两个分频器脚，两个输出端子和源极电压。改善谐波抑制的相关方法包括合成差分相位信号并同时抑制同相信号的二次谐波的动作。扩展ILFD锁定范围的方法包括降低质量因子的作用，同时保持共振频率不变。

4. 发明授权

US08339211B2 Voltage-controlled oscillator 有权
公开(公告)号：US08339211B2
公开(公告)日：2012-12-25
申请号：US13067903
申请日：2011-07-06
申请人： Shey-Shi Lu , Hsien-Ku Chen
发明人： Shey-Shi Lu , Hsien-Ku Chen
IPC分类号： H03B5/08
CPC分类号： H03B5/1228 , H03B5/1212 , H03B5/1243 , H03B27/00 , H03B2200/0078
摘要： This invention provides a voltage-controlled oscillator, comprising a first voltage-controlled oscillator circuit and a second voltage-controlled oscillator circuit. The first voltage-controlled oscillator circuit comprises a plurality of inductors, a plurality of variable capacitors, and a plurality of MOS transistors. The circuit configuration of the second voltage-controlled oscillator circuit is symmetrical to that of the first voltage-controlled oscillator circuit. The inductors of the first voltage-controlled oscillator circuit are cross-coupled to the inductors of the second voltage-controlled oscillator circuit.

5. 发明申请

US20120223779A1 Voltage-controlled oscillator 有权
标题翻译：压控振荡器
公开(公告)号：US20120223779A1
公开(公告)日：2012-09-06
申请号：US13067903
申请日：2011-07-06
申请人： Shey-Shi Lu , Hsien-Ku Chen
发明人： Shey-Shi Lu , Hsien-Ku Chen
IPC分类号： H03B5/02
CPC分类号： H03B5/1228 , H03B5/1212 , H03B5/1243 , H03B27/00 , H03B2200/0078
摘要： This invention provides a voltage-controlled oscillator, comprising a first voltage-controlled oscillator circuit and a second voltage-controlled oscillator circuit. The first voltage-controlled oscillator circuit comprises a plurality of inductors, a plurality of variable capacitors, and a plurality of MOS transistors. The circuit configuration of the second voltage-controlled oscillator circuit is symmetrical to that of the first voltage-controlled oscillator circuit. The inductors of the first voltage-controlled oscillator circuit are cross-coupled to the inductors of the second voltage-controlled oscillator circuit.
摘要翻译：本发明提供了一种压控振荡器，包括第一压控振荡器电路和第二压控振荡器电路。第一压控振荡器电路包括多个电感器，多个可变电容器和多个MOS晶体管。第二压控振荡器电路的电路配置与第一压控振荡器电路的电路配置对称。第一压控振荡器电路的电感器交叉耦合到第二压控振荡器电路的电感器。

6. 发明授权

US07898304B2 Multimode millimeter-wave frequency divider circuit with multiple presettable frequency dividing modes 有权
标题翻译：多模式毫米波分频电路，具有多种可预置分频模式
公开(公告)号：US07898304B2
公开(公告)日：2011-03-01
申请号：US12568828
申请日：2009-09-29
申请人： Shey-Shi Lu , Hsien-Ku Chen
发明人： Shey-Shi Lu , Hsien-Ku Chen
IPC分类号： H03B19/06
CPC分类号： H03B19/14 , H03B5/1215 , H03B5/1228 , H03B5/124 , H03B2200/0034 , H03B2200/0074 , H03L7/18
摘要： A multimode millimeter-wave frequency divider circuit with multiple selectable frequency dividing modes is proposed, which is designed for integration with a millimeter wave (MMW) circuit system, such as a phase-locked loop (PLL) circuit, for providing multimode frequency dividing functions. In actual application, the millimeter wave frequency divider circuit of multi frequency dividing mode provides at least three frequency dividing operational modes, including modes of dividing two, dividing 3 and dividing four. In practice, the millimeter wave frequency divider circuit of multi frequency divider mode may be integrated with a millimeter wave phase-locked circuit to provide a frequency synthetic function having multi frequency sections, such as including 38 GHZ, 60 GHZ and 77 GHZ, and may use reduced circuit layout surfaces and operational power.
摘要翻译：提出了一种具有多种可选分频模式的多模毫米波分频电路，其设计用于与诸如锁相环（PLL）电路的毫米波（MMW）电路系统集成，用于提供多模分频功能。在实际应用中，多分频模式的毫米波分频电路至少提供三种分频运行模式，包括分频，分频，四分频模式。实际上，多分频模式的毫米波分频器电路可以与毫米波锁相电路集成，以提供具有多频段的频率合成功能，例如包括38GHZ，60GHZ和77GHZ，并且可以使用减少的电路布局表面和操作电源。

7. 发明授权

US07769360B2 Adapter for the RF front end processor chip 有权
标题翻译：射频前端处理器芯片适配器
公开(公告)号：US07769360B2
公开(公告)日：2010-08-03
申请号：US11703182
申请日：2007-02-07
申请人： Hsien-Ku Chen , Shey-Shi Lu , Da-Chiang Chang , Ying-Zong Juang , Chin-Fong Chiu
发明人： Hsien-Ku Chen , Shey-Shi Lu , Da-Chiang Chang , Ying-Zong Juang , Chin-Fong Chiu
IPC分类号： H04B1/26
CPC分类号： H04B1/18
摘要： An adapter for RF front end processor chip wherein the RF front end processor chip includes a low noise amplifier which is used to receive a RF filter signal so as to generate a first signal. An adapter is used to receive a first signal so as to induce and generate a second signal and a third signal which is electrically reverse. Then a frequency mixer of the RF front end processor chip is used to receive the second signal and the third signal and a resonant signal, the second signal and the third signal are used to generate a medium frequency signal. Wherein, adapter includes a primary measured coil.
摘要翻译：一种用于RF前端处理器芯片的适配器，其中RF前端处理器芯片包括用于接收RF滤波器信号以产生第一信号的低噪声放大器。适配器用于接收第一信号，以便产生第二信号和电反向的第三信号。然后使用RF前端处理器芯片的混频器来接收第二信号和第三信号，并且使用谐振信号，第二信号和第三信号来产生中频信号。其中，适配器包括主要测量线圈。

8. 发明申请

US20080188196A1 Adapter for the RF front end processor chip 有权
标题翻译：射频前端处理器芯片适配器
公开(公告)号：US20080188196A1
公开(公告)日：2008-08-07
申请号：US11703182
申请日：2007-02-07
申请人： Hsien-Ku Chen , Shey-Shi Lu , Da-Chiang Chang , Ying-Zong Juang , Chin-Fong Chiu
发明人： Hsien-Ku Chen , Shey-Shi Lu , Da-Chiang Chang , Ying-Zong Juang , Chin-Fong Chiu
IPC分类号： H04B1/18
CPC分类号： H04B1/18
摘要： An adapter for RF front end processor chip wherein the RF front end processor chip includes a low noise amplifier which is used to receive a RF filter signal so as to generate a first signal. An adapter is used to receive a first signal so as to induce and generate a second signal and a third signal which is electrically reverse. Then a frequency mixer of the RF front end processor chip is used to receive the second signal and the third signal and a resonant signal, the second signal and the third signal are used to generate a medium frequency signal. Wherein, adapter includes a primary measured coil, a secondary measured first coil and a secondary measured second coil; therefore, through the electrical connection of the positive end of the secondary measured first coil to the negative end of the secondary measured second coil or through the electrical connection of the negative end of the secondary measured first coil to the positive end of the secondary measured second coil, when the first signal is received at the first coil, the second signal and the third signal of electrically reverse signal will be induced and generated at the location of the secondary measured first coil and the secondary measured second coil.
摘要翻译：一种用于RF前端处理器芯片的适配器，其中RF前端处理器芯片包括用于接收RF滤波器信号以产生第一信号的低噪声放大器。适配器用于接收第一信号，以便产生第二信号和电反向的第三信号。然后使用RF前端处理器芯片的混频器来接收第二信号和第三信号，并且使用谐振信号，第二信号和第三信号来产生中频信号。其中，适配器包括初级测量线圈，次级测量的第一线圈和次级测量的第二线圈; 因此，通过二次测量的第一线圈的正端与次级测量的第二线圈的负端的电连接或通过次级测量的第一线圈的负端的电连接到次级测量的第二线圈的正端线圈，当在第一线圈处接收到第一信号时，将在第二测量的第一线圈和次级测量的第二线圈的位置处感应并产生第二信号和第三信号的电反向信号。

9. 发明授权

US08521221B2 Dual mode RF transceiver and receiving method of the same 有权
标题翻译：双模RF收发器和接收方式相同
公开(公告)号：US08521221B2
公开(公告)日：2013-08-27
申请号：US12960453
申请日：2010-12-03
申请人： Shey-Shi Lu , Hsien-Ku Chen
发明人： Shey-Shi Lu , Hsien-Ku Chen
IPC分类号： H04M1/00
CPC分类号： H04B1/30 , H04B1/0053 , H04B1/50
摘要： A dual mode RF transceiver is provided. The dual mode RF transceiver comprises an antenna, a differential low noise amplifier (LNA), a local oscillator and a dual mode differential mixer. The differential LNA receives an RF signal from the antenna to generate a differential amplified RF signal. The dual mode differential mixer comprises a switch module, a plurality of fundamental mixers and a plurality of sub-harmonic mixers. The fundamental mixers are activated in a first receiving mode to generate a first differential baseband signal according to a multiphase local oscillating (LO) signal from the local oscillator and the differential amplified RF signal. The sub-harmonic mixers are activated in a second receiving mode to generate a second differential baseband signal according to the multiphase LO signal from the local oscillator and the differential amplified RF signal. An RF signal receiving method is disclosed herein as well.
摘要翻译：提供双模RF收发器。双模RF收发器包括天线，差分低噪声放大器（LNA），本地振荡器和双模式差分混频器。差分LNA从天线接收RF信号以产生差分放大RF信号。双模差分混频器包括开关模块，多个基本混频器和多个次谐波混频器。基本混频器在第一接收模式下被激活，以根据来自本地振荡器和差分放大RF信号的多相本地振荡（LO）信号产生第一差分基带信号。次谐波混频器在第二接收模式下被激活，以根据来自本地振荡器的多相LO信号和差分放大的RF信号产生第二差分基带信号。本文还公开了RF信号接收方法。

10. 发明申请

US20100271082A1 MULTIMODE MILLIMETER-WAVE FREQUENCY DIVIDER CIRCUIT WITH MULTIPLE PRESETTABLE FREQUENCY DIVIDING MODES 有权
标题翻译：具有多种预置频率分频模式的多模微波波分频电路
公开(公告)号：US20100271082A1
公开(公告)日：2010-10-28
申请号：US12568828
申请日：2009-09-29
申请人： Shey-Shi Lu , Hsien-Ku Chen
发明人： Shey-Shi Lu , Hsien-Ku Chen
IPC分类号： H03B19/14
CPC分类号： H03B19/14 , H03B5/1215 , H03B5/1228 , H03B5/124 , H03B2200/0034 , H03B2200/0074 , H03L7/18
摘要： A multimode millimeter-wave frequency divider circuit with multiple selectable frequency dividing modes is proposed, which is designed for integration with a millimeter wave (MMW) circuit system, such as a phase-locked loop (PLL) circuit, for providing multimode frequency dividing functions. In actual application, the millimeter wave frequency divider circuit of multi frequency dividing mode provides at least three frequency dividing operational modes, including modes of dividing two, dividing 3 and dividing four. In practice, the millimeter wave frequency divider circuit of multi frequency divider mode may be integrated with a millimeter wave phase-locked circuit to provide a frequency synthetic function having multi frequency sections, such as including 38 GHZ, 60 GHZ and 77 GHZ, and may use reduced circuit layout surfaces and operational power.
摘要翻译：提出了一种具有多种可选分频模式的多模毫米波分频电路，其设计用于与诸如锁相环（PLL）电路的毫米波（MMW）电路系统集成，用于提供多模分频功能。在实际应用中，多分频模式的毫米波分频电路至少提供三种分频运行模式，包括分频，分频，四分频模式。实际上，多分频模式的毫米波分频器电路可以与毫米波锁相电路集成，以提供具有多频段的频率合成功能，例如包括38GHZ，60GHZ和77GHZ，并且可以使用减少的电路布局表面和操作电源。

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