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1. 发明申请

US20130330903A1 MANUFACTURABLE HIGH-K DRAM MIM CAPACITOR STRUCTURE 有权
标题翻译：可制造的高K DRAM MIM电容结构
公开(公告)号：US20130330903A1
公开(公告)日：2013-12-12
申请号：US13494808
申请日：2012-06-12
申请人： Sandra Malhotra , Wim Deweerd , Ode Hiroyuki
发明人： Sandra Malhotra , Wim Deweerd , Ode Hiroyuki
IPC分类号： H01L21/02
CPC分类号： H01L28/56 , H01L27/10852 , H01L28/60 , H01L28/90
摘要： A method for forming a capacitor stack is described. In some embodiments of the present invention, a first dielectric material is formed above a first electrode material. The first electrode material is rigid and has good mechanical strength and serves as a robust frame for the capacitor stack. The first dielectric material is sufficiently thin ( 3 nm) or lightly doped or non-doped so that it crystallizes after subsequent anneal treatments. A second electrode material is formed adjacent to the second dielectric material. The second electrode material has a high work function and a crystal structure that serves to promote the formation of the high k-value crystal structure of the second dielectric material.
摘要翻译：描述形成电容器堆叠的方法。在本发明的一些实施例中，第一电介质材料形成在第一电极材料之上。第一电极材料是刚性的并且具有良好的机械强度并且用作用于电容器叠层的坚固框架。第一介电材料足够薄（ 3nm）或轻掺杂或未掺杂，使得其在随后的退火处理之后结晶。与第二电介质材料相邻地形成第二电极材料。第二电极材料具有高功函数和用于促进形成第二电介质材料的高k值晶体结构的晶体结构。

2. 发明授权

US08815677B2 Method of processing MIM capacitors to reduce leakage current 有权
标题翻译： MIM电容器的处理方法，以减少泄漏电流
公开(公告)号：US08815677B2
公开(公告)日：2014-08-26
申请号：US13159842
申请日：2011-06-14
申请人： Hanhong Chen , Wim Deweerd , Xiangxin Rui , Sandra Malhotra , Hiroyuki Ode
发明人： Hanhong Chen , Wim Deweerd , Xiangxin Rui , Sandra Malhotra , Hiroyuki Ode
IPC分类号： H01L21/8242 , H01L21/20
CPC分类号： H01L28/40
摘要： A method for processing dielectric materials and electrodes to decrease leakage current is disclosed. The method includes a post dielectric anneal treatment in an oxidizing atmosphere to reduce the concentration of oxygen vacancies in the dielectric material. The method further includes a post metallization anneal treatment in an oxidizing atmosphere to reduce the concentration of interface states at the electrode/dielectric interface and to further reduce the concentration of oxygen vacancies in the dielectric material.
摘要翻译：公开了一种用于处理电介质材料和电极以减少泄漏电流的方法。该方法包括在氧化气氛中的后介电退火处理，以降低电介质材料中氧空位的浓度。该方法还包括在氧化气氛中的后金属化退火处理，以减少电极/电介质界面处的界面态的浓度，并进一步降低电介质材料中氧空位的浓度。

3. 发明授权

US08541282B2 Blocking layers for leakage current reduction in DRAM devices 有权
公开(公告)号：US08541282B2
公开(公告)日：2013-09-24
申请号：US13290795
申请日：2011-11-07
申请人： Sandra Malhotra , Hanhong Chen , Wim Deweerd , Hiroyuki Ode
发明人： Sandra Malhotra , Hanhong Chen , Wim Deweerd , Hiroyuki Ode
IPC分类号： H01L21/20 , H01L29/94
CPC分类号： H01L28/60 , H01L27/10852 , H01L28/40
摘要： A method for forming a DRAM MIM capacitor stack having low leakage current involves the use of a first electrode that serves as a template for promoting the high k phase of a subsequently deposited dielectric layer. The high k dielectric layer comprises a doped material that can be crystallized after a subsequent annealing treatment. An amorphous blocking is formed on the dielectric layer. The thickness of the blocking layer is chosen such that the blocking layer remains amorphous after a subsequent annealing treatment. A second electrode layer compatible with the blocking layer is formed on the blocking layer.

4. 发明申请

US20130143383A1 METHOD OF FORMING AN ALD MATERIAL 有权
标题翻译：形成ALD材料的方法
公开(公告)号：US20130143383A1
公开(公告)日：2013-06-06
申请号：US13310980
申请日：2011-12-05
申请人： Sandra Malhotra , Wim Deweerd , Edward Haywood , Hiroyuki Ode
发明人： Sandra Malhotra , Wim Deweerd , Edward Haywood , Hiroyuki Ode
IPC分类号： H01L21/02
CPC分类号： C23C16/45534 , C23C16/405 , H01L21/28562 , H01L21/32051 , H01L28/60
摘要： In some embodiments of the present invention, methods are developed wherein a gas flow of an electron donating compound (EDC) is introduced in sequence with a precursor pulse and alters the deposition of the precursor material. In some embodiments, the EDC pulse is introduced sequentially with the precursor pulse with a purge step used to remove the non-adsorbed EDC from the process chamber before the precursor is introduced. In some embodiments, the EDC pulse is introduced using a vapor draw technique or a bubbler technique. In some embodiments, the EDC pulse is introduced in the same gas distribution manifold as the precursor pulse. In some embodiments, the EDC pulse is introduced in a separate gas distribution manifold from the precursor pulse.
摘要翻译：在本发明的一些实施方案中，开发了方法，其中给电子化合物（EDC）的气流按前驱脉冲依次导入并改变前体材料的沉积。在一些实施方案中，EDC脉冲依次与前体脉冲一起引入，其中吹扫步骤用于在引入前体之前从处理室去除未吸附的EDC。在一些实施例中，使用蒸汽抽吸技术或起泡器技术引入EDC脉冲。在一些实施例中，EDC脉冲被引入与前驱脉冲相同的气体分配歧管中。在一些实施例中，EDC脉冲从前驱脉冲引入到单独的气体分配歧管中。

5. 发明授权

US08765570B2 Manufacturable high-k DRAM MIM capacitor structure 有权
标题翻译：可制造的高k DRAM MIM电容器结构
公开(公告)号：US08765570B2
公开(公告)日：2014-07-01
申请号：US13494808
申请日：2012-06-12
申请人： Sandra Malhotra , Wim Deweerd , Hiroyuki Ode
发明人： Sandra Malhotra , Wim Deweerd , Hiroyuki Ode
IPC分类号： H01L21/20
CPC分类号： H01L28/56 , H01L27/10852 , H01L28/60 , H01L28/90
摘要： A method for forming a capacitor stack is described. In some embodiments of the present invention, a first dielectric material is formed above a first electrode material. The first electrode material is rigid and has good mechanical strength and serves as a robust frame for the capacitor stack. The first dielectric material is sufficiently thin ( 3 nm) or lightly doped or non-doped so that it crystallizes after subsequent anneal treatments. A second electrode material is formed adjacent to the second dielectric material. The second electrode material has a high work function and a crystal structure that serves to promote the formation of the high k-value crystal structure of the second dielectric material.
摘要翻译：描述形成电容器堆叠的方法。在本发明的一些实施例中，第一电介质材料形成在第一电极材料之上。第一电极材料是刚性的并且具有良好的机械强度并且用作用于电容器叠层的坚固框架。第一介电材料足够薄（<2nm）或高度掺杂，使得在随后的退火处理之后其保持非晶态。在第一电介质材料上方形成第二电介质材料。第二介电材料足够厚（> 3nm）或轻掺杂或未掺杂，使得其在随后的退火处理之后结晶。与第二电介质材料相邻地形成第二电极材料。第二电极材料具有高功函数和用于促进形成第二电介质材料的高k值晶体结构的晶体结构。

6. 发明授权

US08563392B2 Method of forming an ALD material 有权
标题翻译：形成ALD材料的方法
公开(公告)号：US08563392B2
公开(公告)日：2013-10-22
申请号：US13310980
申请日：2011-12-05
申请人： Sandra Malhotra , Wim Deweerd , Edward Haywood , Hiroyuki Ode
发明人： Sandra Malhotra , Wim Deweerd , Edward Haywood , Hiroyuki Ode
IPC分类号： H01L21/02
CPC分类号： C23C16/45534 , C23C16/405 , H01L21/28562 , H01L21/32051 , H01L28/60
摘要： In some embodiments of the present invention, methods are developed wherein a gas flow of an electron donating compound (EDC) is introduced in sequence with a precursor pulse and alters the deposition of the precursor material. In some embodiments, the EDC pulse is introduced sequentially with the precursor pulse with a purge step used to remove the non-adsorbed EDC from the process chamber before the precursor is introduced. In some embodiments, the EDC pulse is introduced using a vapor draw technique or a bubbler technique. In some embodiments, the EDC pulse is introduced in the same gas distribution manifold as the precursor pulse. In some embodiments, the EDC pulse is introduced in a separate gas distribution manifold from the precursor pulse.
摘要翻译：在本发明的一些实施方案中，开发了一种方法，其中给电子化合物（EDC）的气流按前驱脉冲依次导入并改变前体材料的沉积。在一些实施方案中，EDC脉冲依次与前体脉冲一起引入，其中吹扫步骤用于在引入前体之前从处理室去除未吸附的EDC。在一些实施例中，使用蒸汽抽吸技术或起泡器技术引入EDC脉冲。在一些实施例中，EDC脉冲被引入与前驱脉冲相同的气体分配歧管中。在一些实施例中，EDC脉冲从前驱脉冲引入到单独的气体分配歧管中。

7. 发明申请

US20130122678A1 ADSORPTION SITE BLOCKING METHOD FOR CO-DOPING ALD FILMS 有权
标题翻译：用于混合ALD膜的吸附位点阻断方法
公开(公告)号：US20130122678A1
公开(公告)日：2013-05-16
申请号：US13294341
申请日：2011-11-11
申请人： Sandra Malhotra , Hanhong Chen , Wim Deweerd , Toshiyuki Hirota , Hiroyuki Ode
发明人： Sandra Malhotra , Hanhong Chen , Wim Deweerd , Toshiyuki Hirota , Hiroyuki Ode
IPC分类号： H01L21/02
CPC分类号： H01L28/60 , C23C16/45534 , H01L21/02175 , H01L21/02178 , H01L21/02186 , H01L21/02189 , H01L21/02194 , H01L21/0228 , H01L27/10852 , H01L28/40 , H01L28/56 , H01L29/4234
摘要： A method for doping a dielectric material by pulsing a first dopant precursor, purging the non-adsorbed precursor, pulsing a second precursor, purging the non-adsorbed precursor, and pulsing a oxidant to form an intermixed layer of two (or more) metal oxide dielectric dopant materials. The method may also be used to form a blocking layer between a bulk dielectric layer and a second electrode layer. The method improves the control of the composition and the control of the uniformity of the dopants throughout the thickness of the doped dielectric material.
摘要翻译：一种用于通过脉冲第一掺杂剂前体掺杂电介质材料的方法，清洗未吸附的前体，脉冲第二前体，净化未吸附的前体，以及脉冲氧化剂以形成两个（或多个）金属氧化物的混合层电介质掺杂剂材料。该方法还可用于在体电介质层和第二电极层之间形成阻挡层。该方法改善了组合物的控制和掺杂介质材料整个厚度均匀性的控制。

8. 发明授权

US08440537B1 Adsorption site blocking method for co-doping ALD films 有权
公开(公告)号：US08440537B1
公开(公告)日：2013-05-14
申请号：US13294341
申请日：2011-11-11
申请人： Sandra Malhotra , Hanhong Chen , Wim Deweerd , Toshiyuki Hirota , Hiroyuki Ode
发明人： Sandra Malhotra , Hanhong Chen , Wim Deweerd , Toshiyuki Hirota , Hiroyuki Ode
IPC分类号： H01L21/20
CPC分类号： H01L28/60 , C23C16/45534 , H01L21/02175 , H01L21/02178 , H01L21/02186 , H01L21/02189 , H01L21/02194 , H01L21/0228 , H01L27/10852 , H01L28/40 , H01L28/56 , H01L29/4234
摘要： A method for doping a dielectric material by pulsing a first dopant precursor, purging the non-adsorbed precursor, pulsing a second precursor, purging the non-adsorbed precursor, and pulsing a oxidant to form an intermixed layer of two (or more) metal oxide dielectric dopant materials. The method may also be used to form a blocking layer between a bulk dielectric layer and a second electrode layer. The method improves the control of the composition and the control of the uniformity of the dopants throughout the thickness of the doped dielectric material.

9. 发明授权

US08415227B2 High performance dielectric stack for DRAM capacitor 有权
公开(公告)号：US08415227B2
公开(公告)日：2013-04-09
申请号：US13220460
申请日：2011-08-29
申请人： Sandra Malhotra , Wim Deweerd , Hanhong Chen , Xiangxin Rui , Hiroyuki Ode , Mitsuhiro Horikawa , Kenichi Koyanagi
发明人： Sandra Malhotra , Wim Deweerd , Hanhong Chen , Xiangxin Rui , Hiroyuki Ode , Mitsuhiro Horikawa , Kenichi Koyanagi
IPC分类号： H01L21/20 , H01L21/31
CPC分类号： H01L28/60 , H01L28/40 , H01L28/75
摘要： A method for fabricating a DRAM capacitor stack is described wherein the dielectric material is a multi-layer stack formed from a highly-doped material combined with a lightly or non-doped material. The highly-doped material remains amorphous with a crystalline content of less than 30% after an annealing step. The lightly or non-doped material becomes crystalline with a crystalline content of equal to or greater than 30% after an annealing step. The dielectric multi-layer stack maintains a high k-value while minimizing the leakage current and the EOT value.

10. 发明申请

US20130052792A1 HIGH PERFORMANCE DIELECTRIC STACK FOR DRAM CAPACITOR 有权
标题翻译：用于DRAM电容器的高性能电介质堆叠
公开(公告)号：US20130052792A1
公开(公告)日：2013-02-28
申请号：US13220460
申请日：2011-08-29
申请人： Sandra Malhotra , Wim Deweerd , Hanhong Chen , Xiangxin Rui , Hiroyuki Ode , Mitsuhiro Horikawa , Kenichi Koyanagi
发明人： Sandra Malhotra , Wim Deweerd , Hanhong Chen , Xiangxin Rui , Hiroyuki Ode , Mitsuhiro Horikawa , Kenichi Koyanagi
IPC分类号： H01L21/02
CPC分类号： H01L28/60 , H01L28/40 , H01L28/75
摘要： A method for fabricating a DRAM capacitor stack is described wherein the dielectric material is a multi-layer stack formed from a highly-doped material combined with a lightly or non-doped material. The highly-doped material remains amorphous with a crystalline content of less than 30% after an annealing step. The lightly or non-doped material becomes crystalline with a crystalline content of equal to or greater than 30% after an annealing step. The dielectric multi-layer stack maintains a high k-value while minimizing the leakage current and the EOT value.
摘要翻译：描述了制造DRAM电容器堆叠的方法，其中电介质材料是由与轻掺杂或非掺杂材料组合的高掺杂材料形成的多层叠层。在退火步骤之后，高掺杂材料保持无定形，结晶含量小于30％。在退火步骤之后，轻掺杂或非掺杂材料变成结晶含量等于或大于30％的晶体。电介质多层堆叠保持高的k值，同时使漏电流和EOT值最小化。

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