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1. 发明授权

US08828821B2 Fabrication of semiconductor stacks with ruthenium-based materials 有权
标题翻译：用钌基材料制造半导体叠层
公开(公告)号：US08828821B2
公开(公告)日：2014-09-09
申请号：US13395071
申请日：2009-09-18
申请人： Hanhong Chen , Nobumichi Fuchigami , Imran Hashim , Pragati Kumar , Sandra Malhotra , Sunil Shanker
发明人： Hanhong Chen , Nobumichi Fuchigami , Imran Hashim , Pragati Kumar , Sandra Malhotra , Sunil Shanker
IPC分类号： H01L21/8242 , H01L21/02 , C23C16/455 , C23C16/02 , H01L27/108 , H01L49/02 , C23C16/40
CPC分类号： C23C16/45531 , C23C16/0272 , C23C16/0281 , C23C16/405 , H01L21/02186 , H01L21/02194 , H01L21/02197 , H01L21/0228 , H01L21/02304 , H01L27/10852 , H01L28/40 , H01L28/65 , H01L28/75
摘要： This disclosure provides a method of fabricating a semiconductor stack and associated device such as a capacitor and DRAM cell. In particular, a bottom electrode upon which a dielectric layer is to be grown may have a ruthenium-based surface. Lattice matching of the ruthenium surface with the dielectric layer (e.g., titanium oxide, strontium titanate or barium strontium titanate) helps promote the growth of rutile-phase titanium oxide, thereby leading to higher dielectric constant and lower effective oxide thickness. The ruthenium-based material also provides a high work function material, leading to lower leakage. To mitigate nucleation delay associated with the use of ruthenium, an adherence or glue layer based in titanium may be employed. A pretreatment process may be further employed so as to increase effective capacitor plate area, and thus promote even further improvements in dielectric constant and effective oxide thickness (“EOT”).
摘要翻译：本公开提供了制造半导体堆叠和相关设备（诸如电容器和DRAM单元）的方法。特别地，要生长电介质层的底部电极可以具有钌基表面。钌表面与电介质层的晶格匹配（例如氧化钛，钛酸锶钛酸钡或钛酸钡锶）有助于促进金红石相二氧化钛的生长，从而导致更高的介电常数和更低的有效氧化物厚度。钌基材料还提供高功函数材料，导致较低的泄漏。为了减轻与使用钌有关的成核延迟，可以采用基于钛的粘附层或胶层。可以进一步采用预处理工艺，以增加有效的电容器板面积，从而进一步提高介电常数和有效的氧化物厚度（“EOT”）。

2. 发明授权

US08278735B2 Yttrium and titanium high-k dielectric films 有权
标题翻译：钇和钛高k电介质膜
公开(公告)号：US08278735B2
公开(公告)日：2012-10-02
申请号：US12901239
申请日：2010-10-08
申请人： Imran Hashim , Indranil De , Tony Chiang , Edward Haywood , Hanhong Chen , Nobi Fuchigami , Pragati Kumar , Sandra Malhotra , Sunil Shanker
发明人： Imran Hashim , Indranil De , Tony Chiang , Edward Haywood , Hanhong Chen , Nobi Fuchigami , Pragati Kumar , Sandra Malhotra , Sunil Shanker
IPC分类号： H01L21/02
CPC分类号： H01L28/40 , C23C14/083 , C23C14/3464 , C23C16/405 , C23C16/45531 , H01L21/02186 , H01L21/02192 , H01L21/02194 , H01L21/02266 , H01L21/0228
摘要： This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.
摘要翻译：本公开内容提供（a）制造基于钇和钛的氧化物层（例如，电介质层）的方法，以具有高介电常数和低泄漏特性，以及（b）相关的器件和结构。具有钇和钛的氧化物层可以制成无定形氧化物或交替的单层系列。在几个实施方案中，氧化物的特征在于对特定控制的总金属的钇贡献。如果需要，可以通过PVD工艺或者通过使用特定的前体材料以允许钛和钇的共同工艺温度窗口的原子层沉积工艺，作为反应过程的结果来生产氧化物层反应。

3. 发明申请

US20110248264A1 Methods of Combinatorial Processing for Screening Multiple Samples on a Semiconductor Substrate 有权
标题翻译：在半导体基板上筛选多个样品的组合处理方法
公开(公告)号：US20110248264A1
公开(公告)日：2011-10-13
申请号：US12905945
申请日：2010-10-15
申请人： Gaurav Verma , Kurt Weiner , Prashant Phatak , Imran Hashim , Sandra Malhotra , Tony Chiang
发明人： Gaurav Verma , Kurt Weiner , Prashant Phatak , Imran Hashim , Sandra Malhotra , Tony Chiang
IPC分类号： H01L29/66
CPC分类号： G01R31/2831 , G01R31/2834 , H01L22/34
摘要： In embodiments of the current invention, methods of combinatorial processing and a test chip for use in these methods are described. These methods and test chips enable the efficient development of materials, processes, and process sequence integration schemes for semiconductor manufacturing processes. In general, the methods simplify the processing sequence of forming devices or partially formed devices on a test chip such that the devices can be tested immediately after formation. The immediate testing allows for the high throughput testing of varied materials, processes, or process sequences on the test chip. The test chip has multiple site isolated regions where each of the regions is varied from one another and the test chip is designed to enable high throughput testing of the different regions.
摘要翻译：在本发明的实施例中，描述了用于这些方法的组合处理方法和测试芯片。这些方法和测试芯片能够有效地开发用于半导体制造工艺的材料，工艺和工艺顺序集成方案。通常，这些方法简化了在测试芯片上形成器件或部分形成的器件的处理顺序，使得器件可以在形成后立即进行测试。即时测试允许测试芯片上各种材料，工艺或工艺顺序的高通量测试。测试芯片具有多个位置隔离区域，其中每个区域彼此变化，并且测试芯片被设计为能够实现不同区域的高通量测试。

4. 发明申请

US20110203085A1 TITANIUM-BASED HIGH-K DIELECTRIC FILMS 有权
标题翻译：基于钛的高K电介质膜
公开(公告)号：US20110203085A1
公开(公告)日：2011-08-25
申请号：US13100538
申请日：2011-05-04
申请人： Hanhong Chen , Pragati Kumar , Sunil Shanker , Edward Haywood , Sandra Malhotra , Imran Hashim , Nobi Fuchigami , Prashant Phatak , Monica Mathur
发明人： Hanhong Chen , Pragati Kumar , Sunil Shanker , Edward Haywood , Sandra Malhotra , Imran Hashim , Nobi Fuchigami , Prashant Phatak , Monica Mathur
IPC分类号： H01G7/00
CPC分类号： H01G4/1218 , C23C16/405 , C23C16/45531 , C23C16/56 , H01G4/33 , H01L21/02186 , H01L21/022 , H01L21/0228 , H01L21/02312 , H01L21/02337 , H01L21/3141 , H01L21/3142 , H01L28/40
摘要： This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on titanium oxide, to suppress the formation of anatase-phase titanium oxide and (b) related devices and structures. A metal-insulator-metal (“MIM”) stack is formed using an ozone pretreatment process of a bottom electrode (or other substrate) followed by an ALD process to form a TiO2 dielectric, rooted in the use of an amide-containing precursor. Following the ALD process, an oxidizing anneal process is applied in a manner is hot enough to heal defects in the TiO2 dielectric and reduce interface states between TiO2 and electrode; the anneal temperature is selected so as to not be so hot as to disrupt BEL surface roughness. Further process variants may include doping the titanium oxide, pedestal heating during the ALD process to 275-300 degrees Celsius, use of platinum or ruthenium for the BEL, and plural reagent pulses of ozone for each ALD process cycle. The process provides high deposition rates, and the resulting MIM structure has substantially no x-ray diffraction peaks associated with anatase-phase titanium oxide.
摘要翻译：本公开内容提供（a）制造基于氧化钛的氧化物层（例如电介质层）的方法，以抑制锐钛矿相氧化钛的形成和（b）相关的器件和结构。使用底部电极（或其他基底）的臭氧预处理随后进行ALD工艺来形成金属 - 绝缘体 - 金属（“MIM”）堆叠，以形成根植于含酰胺前体的TiO 2电介质。在ALD工艺之后，氧化退火工艺的应用热度足以愈合TiO2电介质中的缺陷，并降低TiO2和电极之间的界面态; 选择退火温度以使其不那么热，以致破坏BEL表面粗糙度。进一步的工艺变型可以包括在ALD工艺期间掺杂氧化钛，基座加热至275-300摄氏度，对于BEL使用铂或钌，对于每个ALD工艺循环使用多个试剂脉冲的臭氧。该方法提供高沉积速率，并且所得MIM结构基本上没有与锐钛矿相氧化钛相关的x射线衍射峰。

5. 发明授权

US07884036B1 Methods for treating substrates in preparation for subsequent processes 有权
标题翻译：处理底物的方法用于后续方法的制备
公开(公告)号：US07884036B1
公开(公告)日：2011-02-08
申请号：US11777152
申请日：2007-07-12
申请人： Jinhong Tong , Anh Duong , Zhi-Wen Sun , Chi-I Lang , Sandra Malhotra , Tony Chiang
发明人： Jinhong Tong , Anh Duong , Zhi-Wen Sun , Chi-I Lang , Sandra Malhotra , Tony Chiang
IPC分类号： H01L21/00
CPC分类号： H01L21/3105 , H01L21/02063 , H01L21/76814 , H01L21/76825 , H01L21/76826 , H01L21/76849
摘要： Methods for treating a substrate in preparation for a subsequent process are presented, the method including: receiving the substrate, the substrate comprising conductive regions and dielectric regions; and applying an oxidizing agent to the substrate in a manner so that the dielectric regions are oxidized to become increasingly hydrophilic to enable access to the conductive regions in the subsequent process, wherein the dielectric region is treated to a depth in the range of approximately 1 to 5 atomic layers. In some embodiments, methods further include processing the substrate, wherein processing the conductive regions are selectively enhanced. In some embodiments, the oxidizing agent includes atmospheric pressure plasma and UV radiation.
摘要翻译：呈现用于处理衬底以用于后续工艺的方法，所述方法包括：接收衬底，所述衬底包括导电区域和电介质区域; 以及以使得电介质区域被氧化以变得越来越亲水的方式将氧化剂施加到衬底上，以便能够在随后的工艺中进入导电区域，其中将电介质区域处理到大约1至 5个原子层。在一些实施例中，方法还包括处理衬底，其中选择性地增强对导电区域的处理。在一些实施方案中，氧化剂包括大气压等离子体和UV辐射。

6. 发明申请

US20110027617A1 Methods of Forming Strontium Titanate Films 失效
公开(公告)号：US20110027617A1
公开(公告)日：2011-02-03
申请号：US12793614
申请日：2010-06-03
申请人： Laura M. Matz , Xiangxin Rui , Xinjian Lei , Sunil Shanker , Moo-Sung Kim , Nobi Fuchigami , Iain Buchanan , Duong Anh , Sandra Malhotra , Imran Hashim
发明人： Laura M. Matz , Xiangxin Rui , Xinjian Lei , Sunil Shanker , Moo-Sung Kim , Nobi Fuchigami , Iain Buchanan , Duong Anh , Sandra Malhotra , Imran Hashim
IPC分类号： B32B9/00
CPC分类号： C23C16/45531 , C23C16/409 , H01L21/02197 , H01L21/0228 , H01L21/02356 , H01L21/3142 , H01L21/31691 , H01L28/56
摘要： Embodiments of the current invention include methods of forming a strontium titanate (SrTiO3) film using atomic layer deposition (ALD). More particularly, the method includes forming a plurality of titanium oxide (TiO2) unit films using ALD and forming a plurality of strontium oxide (SrO) unit films using ALD. The combined thickness of the TiO2 and SrO unit films is less than approximately 5 angstroms. The TiO2 and SrO units films are then annealed to form a strontium titanate layer.

7. 发明申请

US20070166989A1 Substrate processing including a masking layer 有权
标题翻译：衬底处理包括掩模层
公开(公告)号：US20070166989A1
公开(公告)日：2007-07-19
申请号：US11647882
申请日：2006-12-29
申请人： Zachary Fresco , Chi-I Lang , Sandra Malhotra , Tony Chiang , Thomas Boussie , Nitin Kumar , Jinhong Tong , Anh Duong
发明人： Zachary Fresco , Chi-I Lang , Sandra Malhotra , Tony Chiang , Thomas Boussie , Nitin Kumar , Jinhong Tong , Anh Duong
IPC分类号： H01L21/44 , H01L21/4763 , H01L21/31
CPC分类号： H01L21/288 , B82Y30/00 , H01L21/3105 , H01L21/31058 , H01L21/76834 , H01L21/76849 , H01L21/7685
摘要： Methods for substrate processing are described. The methods include forming a material layer on a substrate. The methods include selecting constituents of a molecular masking layer (MML) to remove an effect of variations in the material layer as a result of substrate processing. The methods include normalizing the surface characteristics of the material layer by selectively depositing the MML on the material layer.
摘要翻译：描述基板处理方法。所述方法包括在基底上形成材料层。所述方法包括选择分子屏蔽层（MML）的成分以消除作为衬底处理的结果的材料层中的变化的影响。所述方法包括通过在材料层上选择性地沉积MML来使材料层的表面特性归一化。

8. 发明申请

US20060264020A1 Formation of a masking layer on a dielectric region to facilitate formation of a capping layer on electrically conductive regions separated by the dielectric region 有权
标题翻译：在电介质区域上形成掩模层，以便在由电介质区域分隔的导电区域上形成覆盖层
公开(公告)号：US20060264020A1
公开(公告)日：2006-11-23
申请号：US11132841
申请日：2005-05-18
申请人： David Lazovsky , Sandra Malhotra , Thomas Boussie
发明人： David Lazovsky , Sandra Malhotra , Thomas Boussie
IPC分类号： H01L21/44
CPC分类号： H01L21/76829 , B82Y30/00 , H01L21/02183 , H01L21/3148 , H01L21/31633 , H01L21/31695 , H01L21/3185 , H01L21/76826 , H01L21/76849
摘要： A masking layer is formed on a dielectric region of an electronic device so that, during subsequent formation of a capping layer on electrically conductive regions of the electronic device that are separated by the dielectric region, the masking layer inhibits formation of capping layer material on or in the dielectric region. The capping layer can be formed selectively on the electrically conductive regions or non-selectively; in either case (particularly in the latter), capping layer material formed over the dielectric region can subsequently be removed, thus ensuring that capping layer material is formed only on the electrically conductive regions. Silane-based materials, such as silane-based SAMs, can be used to form the masking layer. The capping layer can be formed of an electrically conductive material (e.g., a cobalt alloy, a nickel alloy, tungsten, tantalum, tantalum nitride), a semiconductor material, or an electrically insulative material, and can be formed using any appropriate process, including conventional deposition processes such as electroless deposition, chemical vapor deposition, physical vapor deposition or atomic layer deposition.
摘要翻译：在电子器件的电介质区域上形成掩模层，使得在随后在由电介质区域分离的电子器件的导电区域上形成覆盖层时，掩模层阻止在其上形成覆盖层材料在电介质区域。可以选择性地在导电区域或非选择性地形成覆盖层; 在任一情况下（特别是在后者中），可以随后去除在电介质区域上形成的覆盖层材料，从而确保覆盖层材料仅在导电区域上形成。可以使用诸如硅烷基SAM之类的硅烷基材料来形成掩模层。覆盖层可以由导电材料（例如，钴合金，镍合金，钨，钽，氮化钽），半导体材料或电绝缘材料形成，并且可以使用任何适当的工艺形成，包括常规沉积工艺如无电沉积，化学气相沉积，物理气相沉积或原子层沉积。

9. 发明申请

US20060110530A1 Method for increasing deposition rates of metal layers from metal-carbonyl precursors 有权
标题翻译：提高金属 - 羰基前体金属层沉积速率的方法
公开(公告)号：US20060110530A1
公开(公告)日：2006-05-25
申请号：US10996145
申请日：2004-11-23
申请人： Kenji Suzuki , Emmanuel Guidotti , Gerrit Leusink , Fenton McFeely , Sandra Malhotra
发明人： Kenji Suzuki , Emmanuel Guidotti , Gerrit Leusink , Fenton McFeely , Sandra Malhotra
IPC分类号： C23C16/00
CPC分类号： H01L21/76843 , C23C16/16 , H01L21/28556 , H01L21/76846 , H01L21/76873
摘要： A method for increasing deposition rates of metal layers from metal-carbonyl precursors by mixing a vapor of the metal-carbonyl precursor with CO gas. The method includes providing a substrate in a process chamber of a deposition system, forming a process gas containing a metal-carbonyl precursor vapor and a CO gas, and exposing the substrate to the process gas to deposit a metal layer on the substrate by a thermal chemical vapor deposition process.
摘要翻译：通过将羰基金属前体的蒸气与CO气体混合来提高金属 - 羰基前体的金属层的沉积速率的方法。该方法包括在沉积系统的处理室中提供衬底，形成含有羰基金属前体蒸气和CO气体的工艺气体，以及将衬底暴露于工艺气体，以通过热量沉积在衬底上的金属层化学气相沉积工艺。

10. 发明申请

US20050260833A1 Constant emissivity deposition member 失效
标题翻译：恒辐射率沉积元件
公开(公告)号：US20050260833A1
公开(公告)日：2005-11-24
申请号：US10851384
申请日：2004-05-22
申请人： Fenton McFeely , John Yurkas , Sandra Malhotra , Andrew Simon
发明人： Fenton McFeely , John Yurkas , Sandra Malhotra , Andrew Simon
IPC分类号： C23C16/44 , C30B1/00 , C30B35/00 , H01L21/20 , H01L21/285 , H01L21/36 , H01L21/44
CPC分类号： C23C16/4404 , C30B35/00 , H01L21/28556
摘要： A deposition member adapted for discharging a deposition material during a deposition process can acquire a coating during the deposition. Such an initial emissivity value is selected for the deposition member, before any of the coating became deposited, that the emissivity of the deposition member remains substantially unchanged during the deposition process. In a representative embodiment the deposition member is coated with an appropriate thin layer for achieving the selected emissivity value.
摘要翻译：适于在沉积过程中排出沉积材料的沉积构件可以在沉积期间获得涂层。在任何涂层沉积之前，沉积构件选择这种初始发射率值，沉积构件的发射率在沉积过程中保持基本不变。在代表性的实施例中，沉积构件涂覆有适当的薄层以实现所选择的发射率值。

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