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    • 1. 发明申请
    • VOLTAGE LEVEL GENERATOR CIRCUIT
    • 电压电平发生器电路
    • US20120249227A1
    • 2012-10-04
    • US13350795
    • 2012-01-15
    • Ryo NAKAYAMAMasaki YoshinagaYoshitaka AbeKenji HirayamaYoshihiro Hayashi
    • Ryo NAKAYAMAMasaki YoshinagaYoshitaka AbeKenji HirayamaYoshihiro Hayashi
    • G05F3/02
    • G05F3/20
    • A voltage level generator circuit comprised of a fixed voltage generator unit for generating a first electrical current in a fixed quantity from a first supply voltage; a first current mirror circuit unit including a first thin-film NMOSFET and a second thin-film NMOSFET and that outputs a second electrical current proportional to the first electrical current; a protective circuit including: a third thin-film NMOSFET and a first thick-film PMOSFET utilized as a grounded gate for protecting the second thin-film NMOSFET, a first diode for preventing inverse current flow to the first supply, and a second diode for preventing the gate-source voltage of the third thin-film NMOSFET from reaching a negative electrical potential; and a second current mirror circuit for outputting a third electrical current proportional to the second electrical current; and a first Zener diode unit for generating a first fixed voltage from a third electrical current.
    • 一种电压电平发生器电路,包括:固定电压发生器单元,用于从第一电源电压产生固定量的第一电流; 第一电流镜电路单元,包括第一薄膜NMOSFET和第二薄膜NMOSFET,并且输出与第一电流成比例的第二电流; 保护电路,包括:第三薄膜NMOSFET和用作保护第二薄膜NMOSFET的接地栅极的第一厚膜PMOSFET,用于防止反向电流流向第一电源的第一二极管和用于 防止第三薄膜NMOSFET的栅极 - 源极电压达到负电位; 以及第二电流镜电路,用于输出与第二电流成比例的第三电流; 以及用于从第三电流产生第一固定电压的第一齐纳二极管单元。
    • 8. 发明授权
    • Magnetic head circuit having a write current changeover circuit with a
clamp voltage depending on write current for high-speed data transfer
    • 磁头电路具有写入电流切换电路,其具有取决于用于高速数据传输的写入电流的钳位电压
    • US5392172A
    • 1995-02-21
    • US010146
    • 1993-01-28
    • Masaki YoshinagaNoriaki HatanakaTomoaki HiraiYuji NagayaTsuyoshi HiroseTadao Kaji
    • Masaki YoshinagaNoriaki HatanakaTomoaki HiraiYuji NagayaTsuyoshi HiroseTadao Kaji
    • G11B5/09G11B5/00G11B5/012G11B5/02G11B5/035G11B5/40G11B5/455G11B19/04
    • G11B5/012G11B5/02G11B5/022G11B5/035G11B5/40G11B5/455G11B19/04G11B2005/0013
    • A magnetic head circuit for a plurality of magnetic heads includes two emitter follower transistors for receiving magnetic head writing data, two differential transistors connected to the two emitter follower transistors for performing differential operation control thereover, and two resistors connected to collectors of the two differential transistors for supplying a base current to the two emitter follower transistors, and wherein the emitter follower transistors are connected in series with each other to perform differential switch operations over a magnetic head writing current. A magnetic head fly-back voltage has a clamp voltage which varies according to a writing current flowing through a pair of signal terminals. A pair of differential transistors, whose bases are connected to the pair of signal terminals and whose emitters are connected directly to each other, are operated according to a voltage appearing between the pair of signal terminals. Connected to the collectors of the pair of differential transistors are amplification transistors respectively. Connected to outputs of the amplification transistors are post-amplifiers. Such a connection configuration provides a small mirror capacitance as viewed from the bases of the amplification transistors. A high writing and reading accessing speed to the magnetic heads can be realized.
    • 用于多个磁头的磁头电路包括用于接收磁头写入数据的两个射极跟随器晶体管,连接到两个射极跟随器晶体管的两个差分晶体管,用于执行差分操作控制,以及连接到两个差分晶体管的集电极的两个电阻器 用于向两个射极跟随器晶体管提供基极电流,并且其中所述射极跟随器晶体管彼此串联连接以在磁头写入电流上进行差分开关操作。 磁头反向电压具有根据流过一对信号端子的写入电流而变化的钳位电压。 一对差分晶体管的基极连接到该对信号端并且其发射极彼此直接连接的差分晶体管根据出现在一对信号端子之间的电压而被操作。 连接到该对差分晶体管的集电极分别是放大晶体管。 连接到放大晶体管的输出端是后置放大器。 这种连接配置提供从放大晶体管的基极观察的小镜电容。 可以实现对磁头的高写入和读取访问速度。