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1. 发明授权

US07982537B2 Operational amplifier 有权
标题翻译：运算放大器
公开(公告)号：US07982537B2
公开(公告)日：2011-07-19
申请号：US12354309
申请日：2009-01-15
申请人： Yoshihiro Hayashi , Masaki Yoshinaga , Takashi Matsumoto
发明人： Yoshihiro Hayashi , Masaki Yoshinaga , Takashi Matsumoto
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F3/3022 , H03F2203/45248 , H03F2203/45612
摘要： Disclosed herewith is a circuit system for improving a slew rate while reducing the power consumption in an operational amplifier that requires a comparatively high supply voltage (e.g., 5 V or upper) operation. The operational amplifier includes level shift circuits, differential pairs whose source connected serially, current voltage conversion circuit and output stage. The level shift circuits convert a differential input signal level and output to differential pairs. Combination of level shift circuit and differential pairs realize input signal difference detection and driving current control in the common circuit.
摘要翻译：这里公开了一种用于在降低运算放大器中需要较高电源电压（例如5V或更高）操作的功率消耗的同时提高转换速率的电路系统。运算放大器包括电平移位电路，源极串联连接的差分对，电流电压转换电路和输出级。电平移位电路转换差分输入信号电平并输出到差分对。电平移位电路和差分对的组合实现了公共电路中的输入信号差分检测和驱动电流控制。

2. 发明授权

US06218903B1 Signal amplifier and magnetic disk storage apparatus using the same 失效
标题翻译：信号放大器和使用其的磁盘存储装置
公开(公告)号：US06218903B1
公开(公告)日：2001-04-17
申请号：US09514353
申请日：2000-02-28
申请人： Takashi Hashimoto , Yuji Nagaya , Masaki Yoshinaga , Noriaki Hatanaka , Tatsuo Mochizuki , Katsuya Sonoyama
发明人： Takashi Hashimoto , Yuji Nagaya , Masaki Yoshinaga , Noriaki Hatanaka , Tatsuo Mochizuki , Katsuya Sonoyama
IPC分类号： H03F316
CPC分类号： H03F3/45269 , G11B5/012 , G11B5/11 , G11B5/40 , G11B5/4886 , G11B19/04 , G11B23/0007 , G11B2005/0016 , G11B2005/0018 , H03F3/45183 , H03F2203/45298 , H03F2203/45612 , Y10T29/4903
摘要： A very-small-signal amplifier is capable of amplifying very small signals with high sensitivity up to high frequencies while simplifying the circuit, and a magnetic disk storage apparatus realizes a reading operation over a wide band up to high frequencies with high sensitivity. The signal amplifier is a modified differential circuit including a first transistor of a first conductivity type and a second transistor of a second conductivity type each having a control terminal, a terminal of the input side and a terminal of the output side. The terminals on the input side are connected in common, and a current corresponding to the voltage difference across the control terminals is allowed to flow. A very small voltage signal generated by an input signal source is applied to the control terminal of said first transistor. A bias voltage is applied to the control terminal of the second transistor. Therefore, an amplified signal corresponding to the very small voltage signal generated by the input signal source is generated at the terminal on the output side of the second transistor.
摘要翻译：一个非常小的信号放大器能够在高频率的情况下以高灵敏度放大非常小的信号，同时简化电路，而磁盘存储设备实现了高频高频，高灵敏度的宽带读取操作。信号放大器是包括具有第一导电类型的第一晶体管和第二导电类型的第二晶体管的修改的差分电路，每个具有控制端子，输入侧的端子和输出侧的端子。输入侧的端子共同连接，并且允许对应于控制端子两端的电压差的电流流动。由输入信号源产生的非常小的电压信号被施加到所述第一晶体管的控制端。偏压被施加到第二晶体管的控制端。因此，在第二晶体管的输出侧的端子产生与输入信号源产生的非常小的电压信号对应的放大信号。

3. 发明申请

US20120249227A1 VOLTAGE LEVEL GENERATOR CIRCUIT 审中-公开
标题翻译：电压电平发生器电路
公开(公告)号：US20120249227A1
公开(公告)日：2012-10-04
申请号：US13350795
申请日：2012-01-15
申请人： Ryo NAKAYAMA , Masaki Yoshinaga , Yoshitaka Abe , Kenji Hirayama , Yoshihiro Hayashi
发明人： Ryo NAKAYAMA , Masaki Yoshinaga , Yoshitaka Abe , Kenji Hirayama , Yoshihiro Hayashi
IPC分类号： G05F3/02
CPC分类号： G05F3/20
摘要： A voltage level generator circuit comprised of a fixed voltage generator unit for generating a first electrical current in a fixed quantity from a first supply voltage; a first current mirror circuit unit including a first thin-film NMOSFET and a second thin-film NMOSFET and that outputs a second electrical current proportional to the first electrical current; a protective circuit including: a third thin-film NMOSFET and a first thick-film PMOSFET utilized as a grounded gate for protecting the second thin-film NMOSFET, a first diode for preventing inverse current flow to the first supply, and a second diode for preventing the gate-source voltage of the third thin-film NMOSFET from reaching a negative electrical potential; and a second current mirror circuit for outputting a third electrical current proportional to the second electrical current; and a first Zener diode unit for generating a first fixed voltage from a third electrical current.
摘要翻译：一种电压电平发生器电路，包括：固定电压发生器单元，用于从第一电源电压产生固定量的第一电流; 第一电流镜电路单元，包括第一薄膜NMOSFET和第二薄膜NMOSFET，并且输出与第一电流成比例的第二电流; 保护电路，包括：第三薄膜NMOSFET和用作保护第二薄膜NMOSFET的接地栅极的第一厚膜PMOSFET，用于防止反向电流流向第一电源的第一二极管和用于防止第三薄膜NMOSFET的栅极 - 源极电压达到负电位; 以及第二电流镜电路，用于输出与第二电流成比例的第三电流; 以及用于从第三电流产生第一固定电压的第一齐纳二极管单元。

4. 发明授权

US6114905A Signal amplifier apparatus and magnetic disk storage apparatus using the same 失效
公开(公告)号：US6114905A
公开(公告)日：2000-09-05
申请号：US184336
申请日：1998-11-02
申请人： Takashi Hashimoto , Yuji Nagaya , Masaki Yoshinaga , Noriaki Hatanaka , Tatsuo Mochizuki , Katsuya Sonoyama
发明人： Takashi Hashimoto , Yuji Nagaya , Masaki Yoshinaga , Noriaki Hatanaka , Tatsuo Mochizuki , Katsuya Sonoyama
IPC分类号： G11B5/09 , G11B5/00 , G11B5/012 , G11B5/02 , G11B5/11 , G11B5/40 , G11B5/48 , G11B19/04 , G11B23/00 , H03F3/45
CPC分类号： H03F3/45269 , G11B19/04 , G11B5/012 , G11B5/11 , G11B5/40 , H03F3/45183 , G11B2005/0016 , G11B2005/0018 , G11B23/0007 , G11B5/4886 , H03F2203/45298 , H03F2203/45612 , Y10T29/4903
摘要： A very-small-signal amplifier is capable of amplifying very small signals with high sensitivity up to high frequencies while simplifying the circuit, and a magnetic disk storage apparatus realizes a reading operation over a wide band up to high frequencies with high sensitivity. The signal amplifier is a modified differential circuit including a first transistor of a first conductivity type and a second transistor of a second conductivity type each having a control terminal, a terminal of the input side and a terminal of the output side. The terminals on the input side are connected in common, and a current corresponding to the voltage difference across the control terminals is allowed to flow. A very small voltage signal generated by an input signal source is applied to the control terminal of said first transistor. A bias voltage is applied to the control terminal of the second transistor. Therefore, an amplified signal corresponding to the very small voltage signal generated by the input signal source is generated at the terminal on the output side of the second transistor.

5. 发明授权

US5434717A Read and/or write integrated circuit having an operation timing adjusting circuit and constant current elements 失效
标题翻译：具有操作定时调节电路和恒流元件的读和/或写集成电路
公开(公告)号：US5434717A
公开(公告)日：1995-07-18
申请号：US214846
申请日：1994-03-18
申请人： Masaki Yoshinaga , Yuji Nagaya , Tsuyoshi Hirose , Noriaki Hatanaka , Tomoaki Hirai , Tatsuo Mochizuki
发明人： Masaki Yoshinaga , Yuji Nagaya , Tsuyoshi Hirose , Noriaki Hatanaka , Tomoaki Hirai , Tatsuo Mochizuki
IPC分类号： G11B5/00 , G11B5/012 , G11B5/02 , G11B5/40 , G11B5/455 , G11B5/48 , G11B19/02 , G11B19/04 , G11B20/18 , H03F3/45 , H03F3/72 , G11B5/09 , G11B15/14
CPC分类号： G11B5/012 , G11B19/02 , G11B19/04 , G11B20/1879 , G11B5/02 , G11B5/455 , H03F3/45085 , H03F3/72 , G11B2005/001 , G11B5/40 , G11B5/4886 , H03F2203/45392 , H03F2203/45496 , H03F2203/45506 , H03F2203/45702 , H03F2203/45722 , H03F2203/45728
摘要： A timing adjusting circuit is provided to define the operating order of a differential amplifier circuit for amplifying read-out signals and an output circuit in order to minimize changes in output DC level. A damping resistor is disposed between two magnetic head terminals and a clamp circuit in a magnetic head driving circuit. To attend to a composite head configuration, short-circuiting with a power supply and a current flowing into the magnetic head during a non-write operation are detected as abnormalities. In addition, short-circuiting and open-circuiting of the magnetic head are also detected as abnormalities. Also, a read circuit is added to a write magnetic head, in order to output read-out signals in a read mode, so that the read-out signals are utilized for detecting errors in read-out signals from an exclusively designed read head or for detecting and correcting such errors.
摘要翻译：提供定时调整电路以定义用于放大读出信号的差分放大器电路的工作顺序和输出电路，以便最小化输出DC电平的变化。阻尼电阻器设置在磁头驱动电路中的两个磁头端子和钳位电路之间。为了参与复合头配置，在非写入操作期间，用电源短路和流入磁头的电流被检测为异常。此外，磁头的短路和开路也被检测为异常。此外，读写电路被添加到写磁头，以便以读模式输出读出信号，使得读出信号用于检测来自专门设计的读头的读出信号中的错误，或用于检测和纠正这种错误。

6. 发明申请

US20090184767A1 OPERATIONAL AMPLIFIER 有权
标题翻译：操作放大器
公开(公告)号：US20090184767A1
公开(公告)日：2009-07-23
申请号：US12354309
申请日：2009-01-15
申请人： Yoshihiro HAYASHI , Masaki YOSHINAGA , Takashi MATSUMOTO
发明人： Yoshihiro HAYASHI , Masaki YOSHINAGA , Takashi MATSUMOTO
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F3/3022 , H03F2203/45248 , H03F2203/45612
摘要： Disclosed herewith is a circuit system for improving a slew rate while reducing the power consumption in an operational amplifier that requires a comparatively high supply voltage (e.g., 5 V or upper) operation. The operational amplifier includes level shift circuits, differential pairs whose source connected serially, current voltage conversion circuit and output stage. The level shift circuits convert a differential input signal level and output to differential pairs. Combination of level shift circuit and differential pairs realize input signal difference detection and driving current control in the common circuit.
摘要翻译：这里公开了一种用于在降低运算放大器中需要较高电源电压（例如5V或更高）操作的功率消耗的同时提高转换速率的电路系统。运算放大器包括电平移位电路，源极串联连接的差分对，电流电压转换电路和输出级。电平移位电路转换差分输入信号电平并输出到差分对。电平移位电路和差分对的组合实现了公共电路中的输入信号差分检测和驱动电流控制。

7. 发明授权

US07239467B2 Storage media reading writing system 失效
标题翻译：存储介质读写系统
公开(公告)号：US07239467B2
公开(公告)日：2007-07-03
申请号：US10834194
申请日：2004-04-29
申请人： Hiroyasu Yoshizawa , Yoichiro Kobayashi , Toshio Shinomiya , Noriyuki Fujii , Masaki Yoshinaga
发明人： Hiroyasu Yoshizawa , Yoichiro Kobayashi , Toshio Shinomiya , Noriyuki Fujii , Masaki Yoshinaga
IPC分类号： G11B5/02 , G11B5/48
CPC分类号： G11B5/035 , G11B5/012 , G11B5/02 , G11B5/4833 , G11B5/484 , G11B33/121 , G11B33/122
摘要： The storage media recording/writing system includes a media drive circuit, a head retaining means, a head moving means, a head drive circuit, a signal processing circuit, and a controller to control these. The head drive circuit possesses a first semiconductor integrated circuit having an amplifier that amplifies the read signal from the head, and a second semiconductor integrated circuit placed between the first semiconductor integrated circuit and the signal processing circuit, which has a circuit that receives write data from the signal processing circuit and generates a drive signal to drive a write head. Further, the first semiconductor integrated circuit is mounted on a part near the front of the head retaining means, and the second semiconductor integrated circuit is installed on the side of the moving means.
摘要翻译：存储介质记录/写入系统包括介质驱动电路，磁头保持装置，磁头移动装置，磁头驱动电路，信号处理电路和控制器。头驱动电路具有第一半导体集成电路，其具有放大器，用于放大来自头部的读取信号的放大器，以及放置在第一半导体集成电路和信号处理电路之间的第二半导体集成电路，该电路具有接收来自信号处理电路，并产生驱动写入头的驱动信号。此外，第一半导体集成电路安装在靠近头保持装置的前部的部分上，并且第二半导体集成电路安装在移动装置的一侧。

8. 发明授权

US06762896B2 Storage media reading writing system 失效
公开(公告)号：US06762896B2
公开(公告)日：2004-07-13
申请号：US09902581
申请日：2001-07-12
申请人： Hiroyasu Yoshizawa , Yoichiro Kobayashi , Toshio Shinomiya , Noriyuki Fujii , Masaki Yoshinaga
发明人： Hiroyasu Yoshizawa , Yoichiro Kobayashi , Toshio Shinomiya , Noriyuki Fujii , Masaki Yoshinaga
IPC分类号： G11B502
CPC分类号： G11B5/035 , G11B5/012 , G11B5/02 , G11B5/4833 , G11B5/484 , G11B33/121 , G11B33/122
摘要： The storage media recording/writing system includes a media drive circuit, a head retaining means, a head moving means, a head drive circuit, a signal processing circuit, and a controller to control these. The head drive circuit possesses a first semiconductor integrated circuit having an amplifier that amplifies the read signal from the head, and a second semiconductor integrated circuit placed between the first semiconductor integrated circuit and the signal processing circuit, which has a circuit that receives write data from the signal processing circuit and generates a drive signal to drive a write head. Further, the first semiconductor integrated circuit is mounted on a part near the front of the head retaining means, and the second semiconductor integrated circuit is installed on the side of the moving means.

9. 发明授权

US06163218A Signal amplifier apparatus and magnetic disk storage apparatus using the same 失效
标题翻译：信号放大器装置和使用其的磁盘存储装置
公开(公告)号：US06163218A
公开(公告)日：2000-12-19
申请号：US451914
申请日：1999-12-01
申请人： Takashi Hashimoto , Yuji Nagaya , Masaki Yoshinaga , Noriaki Hatanaka , Tatsuo Mochizuki , Katsuya Sonoyama
发明人： Takashi Hashimoto , Yuji Nagaya , Masaki Yoshinaga , Noriaki Hatanaka , Tatsuo Mochizuki , Katsuya Sonoyama
IPC分类号： G11B5/09 , G11B5/00 , G11B5/012 , G11B5/02 , G11B5/11 , G11B5/40 , G11B5/48 , G11B19/04 , G11B23/00 , H03F3/45
CPC分类号： H03F3/45269 , G11B5/012 , G11B5/11 , G11B5/40 , G11B5/4886 , G11B19/04 , G11B23/0007 , G11B2005/0016 , G11B2005/0018 , H03F3/45183 , H03F2203/45298 , H03F2203/45612 , Y10T29/4903
摘要： A very-small-signal amplifier is capable of amplifying very small signals with high sensitivity up to high frequencies while simplifying the circuit, and a magnetic disk storage apparatus realizes a reading operation over a wide band up to high frequencies with high sensitivity. The signal amplifier is a modified differential circuit including a first transistor of a first conductivity type and a second transistor of a second conductivity type each having a control terminal, a terminal of the input side and a terminal of the output side. The terminals on the input side are connected in common, and a current corresponding to the voltage difference across the control terminals is allowed to flow. A very small voltage signal generated by an input signal source is applied to the control terminal of said first transistor. A bias voltage is applied to the control terminal of the second transistor. Therefore, an amplified signal corresponding to the very small voltage signal generated by the input signal source is generated at the terminal on the output side of the second transistor.
摘要翻译：一个非常小的信号放大器能够在高频率的情况下以高灵敏度放大非常小的信号，同时简化电路，而磁盘存储设备实现了高频高频，高灵敏度的宽带读取操作。信号放大器是包括具有第一导电类型的第一晶体管和第二导电类型的第二晶体管的修改的差分电路，每个具有控制端子，输入侧的端子和输出侧的端子。输入侧的端子共同连接，并且允许对应于控制端子两端的电压差的电流流动。由输入信号源产生的非常小的电压信号被施加到所述第一晶体管的控制端。偏压被施加到第二晶体管的控制端。因此，在第二晶体管的输出侧的端子产生与输入信号源产生的非常小的电压信号对应的放大信号。

10. 发明授权

US5638012A Write driver circuit 失效
标题翻译：写驱动电路
公开(公告)号：US5638012A
公开(公告)日：1997-06-10
申请号：US544824
申请日：1995-10-18
申请人： Takashi Hashimoto , Noriaki Hatanaka , Masaki Yoshinaga , Yuji Nagaya , Tsuyoshi Hirose , Yuji Soga , Tadao Kaji
发明人： Takashi Hashimoto , Noriaki Hatanaka , Masaki Yoshinaga , Yuji Nagaya , Tsuyoshi Hirose , Yuji Soga , Tadao Kaji
IPC分类号： G11B5/027 , G11B5/00 , G11B5/012 , G11B5/035 , G11B5/09 , G11B5/455 , G11B5/596 , G11B19/02 , G11B19/04 , G11B33/12 , H03K17/615 , H03K17/66 , H03K3/00 , H02M7/162
CPC分类号： G11B33/122 , G11B19/02 , G11B19/04 , G11B5/012 , G11B5/022 , G11B5/035 , G11B5/09 , G11B5/455 , G11B5/59633 , H03K17/615 , H03K17/662 , G11B2005/0013
摘要： A write driver for writing write data to a magnetic disk. The write driver is provided with first and second pnp type input transistors whose bases are each supplied with a pair of complementary input signals, and first and second npn type output transistor in the form of an inverted Darlington arrangement. A first resistor element is provided between the emitter of a corresponding pnp type input transistor and the collector of a npn type output transistor, whereas a second resistor element is provided between the common collector of the first and second npn type output transistors and supply voltage. The collectors of the first and second pnp type transistor are supplied with clamp voltage. Third and fourth npn type output transistors each connected to the first and second npn type output transistors in series and subjected to complementary switching control are provided to form a bridge circuit and to drive an inductive head.
摘要翻译：用于写入数据到磁盘的写入驱动器。写驱动器设置有第一和第二pnp型输入晶体管，其基极各自被提供有一对互补输入信号，第一和第二npn型输出晶体管呈反向达林顿布置形式。第一电阻元件设置在相应的pnp型输入晶体管的发射极和npn型输出晶体管的集电极之间，而第二电阻元件设置在第一和第nnn型输出晶体管的公共集电极和电源电压之间。第一和第二pnp型晶体管的集电极被提供钳位电压。分别连接到第一和第二npn型输出晶体管并进行互补切换控制的第三和第四npn型输出晶体管被提供以形成桥式电路并驱动感应头。

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