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    • 2. 发明授权
    • Depth-of-field effects using texture lookup
    • 使用纹理查找的景深效果
    • US06975329B2
    • 2005-12-13
    • US10314877
    • 2002-12-09
    • Rui M. BastosStephen D. LewCurtis A. BeesonJoseph E. Demers, Jr.
    • Rui M. BastosStephen D. LewCurtis A. BeesonJoseph E. Demers, Jr.
    • G06T15/20G06T15/40G09G5/00
    • G06T15/04G06T15/405
    • A graphical processing unit (GPU) and methods for rendering a three-dimensional (3D) scene generated in a field of view having in-focus and out-of-focus regions on a two-dimensional (2D) screen region of pixels are described. One method includes initially rendering the scene to create color and depth texture maps and creating mip-map layers for the color texture map. The method further comprises subsequently rendering the scene by, for each pixel: creating a mip-map layer selection value as a function of a depth of the pixel from the depth texture map, generating a color value by interpolation using color values from at least one of the mip-map layers chosen according to the mip-map layer selection value, and setting a color of the pixel to the generated color texture.
    • 描述图形处理单元(GPU)和用于渲染在像素的二维(2D)屏幕区域上具有焦点和离焦区域的视野中生成的三维(3D)场景的方法 。 一种方法包括最初渲染场景以创建颜色和深度纹理贴图并为颜色纹理贴图创建mip-map层。 该方法还包括随后对于每个像素渲染场景:从深度纹理图创建作为像素的深度的函数的mip-map层选择值,通过使用来自至少一个的颜色值的内插来生成颜色值 根据mip-map层选择值选择的mip-map层,并且将该像素的颜色设置为所生成的颜色纹理。
    • 3. 发明申请
    • DIGITAL MEDIA PROCESSOR
    • 数字媒体处理器
    • US20140055559A1
    • 2014-02-27
    • US13568875
    • 2012-08-07
    • Jen-Hsun HuangGerrit A. SlavenburgStephen D. LewJohn C. SchaferThomas F. FoxTaner E. Ozcelik
    • Jen-Hsun HuangGerrit A. SlavenburgStephen D. LewJohn C. SchaferThomas F. FoxTaner E. Ozcelik
    • G06T15/00H04N13/00
    • G06T15/005G06F15/78G09G5/003G09G2360/02H04N13/161
    • Circuits, methods, and apparatus that provide highly integrated digital media processors for digital consumer electronics applications. These digital media processors are capable of performing the parallel processing of multiple format audio, video, and graphics signals. In one embodiment, audio and video signals may be received from a variety of input devices or appliances, such as antennas, VCRs, DVDs, and networked devices such as camcorders and modems, while output audio and video signals may be provided to output devices such as televisions, monitors, and networked devices such as printers and networked video recorders. Another embodiment of the present invention interfaces with a variety of devices such as navigation, entertainment, safety, memory, and networking devices. This embodiment can also be configured for use in a digital TV, set-top box, or home server. In this configuration, video and audio streams may be received from a number of cable, satellite, Internet, and consumer devices.
    • 为数字消费电子应用提供高度集成的数字媒体处理器的电路,方法和设备。 这些数字媒体处理器能够执行多格式音频,视频和图形信号的并行处理。 在一个实施例中,音频和视频信号可以从诸如天线,VCR,DVD以及诸如摄像机和调制解调器之类的网络设备的各种输入设备或设备接收,而输出音频和视频信号可以被提供给诸如 作为电视机,显示器和网络设备,如打印机和网络录像机。 本发明的另一实施例与诸如导航,娱乐,安全,存储器和网络设备的各种设备接口。 该实施例还可以被配置为用于数字电视,机顶盒或家庭服务器中。 在该配置中,可以从多个有线,卫星,因特网和消费者设备接收视频和音频流。
    • 5. 发明申请
    • METHODS FOR SCALABLY EXPLOITING PARALLELISM IN A PARALLEL PROCESSING SYSTEM
    • 在平行处理系统中大量开发并行的方法
    • US20110238955A1
    • 2011-09-29
    • US13099035
    • 2011-05-02
    • John R. NickollsStephen D. Lew
    • John R. NickollsStephen D. Lew
    • G06F9/30
    • G06F9/3851G06F9/30072G06F9/3012G06F9/3889G06F9/5066
    • Parallelism in a parallel processing subsystem is exploited in a scalable manner. A problem to be solved can be hierarchically decomposed into at least two levels of sub-problems. Individual threads of program execution are defined to solve the lowest-level sub-problems. The threads are grouped into one or more thread arrays, each of which solves a higher-level sub-problem. The thread arrays are executable by processing cores, each of which can execute at least one thread array at a time. Thread arrays can be grouped into grids of independent thread arrays, which solve still higher-level sub-problems or an entire problem. Thread arrays within a grid, or entire grids, can be distributed across all of the available processing cores as available in a particular system implementation.
    • 并行处理子系统中的并行性以可扩展的方式被利用。 要解决的问题可以被分层分解成至少两个级别的子问题。 定义程序执行的各个线程来解决最低级别的问题。 线程被分组成一个或多个线程数组,每个线程数组都解决了较高级的子问题。 线程数组可以通过处理内核执行,每个核心可以一次执行至少一个线程数组。 线程数组可以分组成独立线程数组的网格,从而解决更高级的子问题或整个问题。 网格中的线程数组或整个网格可以分布在所有可用处理核心中,如特定系统实现中可用的。
    • 8. 发明授权
    • Platform-based idle-time processing
    • 基于平台的空闲时间处理
    • US07779191B2
    • 2010-08-17
    • US12182074
    • 2008-07-29
    • Chien-Ping LuStephen D. LewRobert William Chapman
    • Chien-Ping LuStephen D. LewRobert William Chapman
    • G06F9/48
    • G06F1/3203
    • A system and method for transitions a computing system between operating modes that have different power consumption characteristics. When a system management unit (SMU) determines that the computing system is in a low activity state, the SMU transitions the central processing unit (CPU) into a low power operating mode after the CPU stores critical operating state of the CPU in a memory. The SMU then intercepts and processes interrupts intended for the CPU, modifying a copy of the critical operating state. This effectively extends the time during which the CPU stays in lower power mode. When the SMU determines that the computing system exits a low activity state, the copy of the critical operating state is stored in the memory and the SMU transitions the CPU into a high power operating mode using the modified critical operating state.
    • 一种用于在具有不同功耗特性的操作模式之间转换计算系统的系统和方法。 当系统管理单元(SMU)确定计算系统处于低活动状态时,在CPU将CPU的临界操作状态存储在存储器中之后,SMU将中央处理单元(CPU)转换为低功耗操作模式。 然后,SMU拦截并处理用于CPU的中断,修改关键操作状态的副本。 这有效地延长了CPU处于较低功耗模式的时间。 当SMU确定计算系统退出低活动状态时,关键操作状态的副本存储在存储器中,并且SMU使用修改的关键操作状态将CPU转换为高功率​​操作模式。