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    • 4. 发明授权
    • Inter-processor failure detection and recovery
    • 处理器间故障检测和恢复
    • US08850262B2
    • 2014-09-30
    • US12902501
    • 2010-10-12
    • Charles S. CardinellRoger G. HathornBernhard LaubliTimothy J. Van Patten
    • Charles S. CardinellRoger G. HathornBernhard LaubliTimothy J. Van Patten
    • G06F11/00G06F11/07
    • G06F11/0757G06F11/0724
    • An approach to detecting processor failure in a multi-processor environment is disclosed. The approach may include having each CPU in the system responsible for monitoring another CPU in the system. A CPUn reads a timestampn+1 created by CPUn+1 which CPUn is monitoring from a shared memory location. The CPUn reads its own timestampn and compares the two timestamps to calculate a delta value. If the delta value is above a threshold, the CPUn determines that CPUn+1 has failed and initiates error handling for the CPUs in the system. One CPU may be designated a master CPU, and be responsible for beginning the error handling process. In such embodiments, the CPUn may initiate error handling by notifying the master CPU that CPUn+1 has failed. If CPUn+1 is the master CPU, the CPUn may take additional steps to initiate error handling, and may broadcast a non-critical interrupt to all CPUs, triggering error handling.
    • 公开了一种在多处理器环境中检测处理器故障的方法。 该方法可以包括使系统中的每个CPU负责监视系统中的另一个CPU。 CPUn读取CPUn + 1创建的时间戳+1,CPUn正在从共享内存位置进行监控。 CPUn读取自己的时间戳,并比较两个时间戳来计算增量值。 如果增量值高于阈值,CPUn确定CPUn + 1失败,并启动系统中CPU的错误处理。 一个CPU可能被指定为主CPU,并负责开始错误处理过程。 在这种实施例中,CPUn可以通过通知主CPU CPUn + 1失败来启动错误处理。 如果CPUn + 1是主CPU,CPUn可能会采取额外的步骤来启动错误处理,并可能会向所有CPU广播非关键中断,从而触发错误处理。
    • 6. 发明申请
    • SYSTEMS AND METHODS FOR AVOIDING HOST LEVEL BUSY AND RETRY LATENCIES
    • 避免主机级和重新启动的系统和方法
    • US20120159003A1
    • 2012-06-21
    • US12972313
    • 2010-12-17
    • Matthew R. CraigClint A. HardyRoger G. HathornBret W. Holley
    • Matthew R. CraigClint A. HardyRoger G. HathornBret W. Holley
    • G06F3/00
    • G06F3/0611G06F3/0659G06F3/0689
    • In one embodiment, a system includes logic adapted for receiving a command from a first system, logic adapted for determining which resources are required to process the command, logic adapted for checking for the required resources before receiving data associated with the command, logic adapted for receiving the data from the first system, logic adapted for checking for the required resources after receiving the data when the checking for the required resources before receiving data indicated that the required resources were not available before receiving the data, logic adapted for sending a status to the first system if the required resources are not available after receiving the data, and logic adapted for processing the command if the required resources are available either before receiving the data or after receiving the data. In more embodiments, a method and computer program product for processing a command are also presented.
    • 在一个实施例中,系统包括适于从第一系统接收命令的逻辑,适于确定需要哪些资源来处理命令的逻辑,适于在接收与命令相关联的数据之前检查所需资源的逻辑, 从第一系统接收数据,适于在接收数据之前检查所需资源的接收数据之后检查所需资源的逻辑指示在接收数据之前所需资源不可用,适于发送状态的逻辑 如果在接收到数据之后所需资源不可用的第一系统,以及如果所需资源在接收数据之前或在接收到数据之后可用的逻辑,则适于处理该命令。 在更多实施例中,还呈现了用于处理命令的方法和计算机程序产品。
    • 7. 发明授权
    • Method to recover from ungrouped logical path failures
    • 从未分组的逻辑路径故障中恢复的方法
    • US07996707B2
    • 2011-08-09
    • US12179862
    • 2008-07-25
    • Juan A. CoronadoRoger G. HathornBret W. HolleyDaniel J. PerkinDinh H. Le
    • Juan A. CoronadoRoger G. HathornBret W. HolleyDaniel J. PerkinDinh H. Le
    • G06F11/00
    • G06F11/0793G06F11/0727G06F11/201
    • A system and method for recovering from a single logical path failure. More specifically, although a host has not grouped its logical paths, the host knows which logical paths it has available. When a host detects a logical path failure, the host enters a path discovery mode of operation. If the host continues to detect a logical path failure while operating in the logical path discovery mode of operation, the host removes the logical path from a logical path mask, and the host does not use the removed logical path again. In the case of ungrouped logical paths, the host aborts its process because it does not have more paths available to continue its process. Additionally, in certain embodiments, a pseudo path group for ungrouped logical paths is created.
    • 用于从单个逻辑路径故障恢复的系统和方法。 更具体地说,尽管主机没有对其逻辑路径进行分组,但主机知道其可用的逻辑路径。 当主机检测到逻辑路径故障时,主机将进入路径发现操作模式。 如果在逻辑路径发现操作模式下主机继续检测到逻辑路径故障,则主机从逻辑路径掩码中删除逻辑路径,并且主机不再使用已删除的逻辑路径。 在未分组的逻辑路径的情况下,主机中止其进程,因为它没有更多可用的路径来继续其进程。 另外,在某些实施例中,创建用于未分组的逻辑路径的伪路径组。
    • 8. 发明申请
    • MULTIPLE CRC INSERTION IN AN OUTPUT DATA STREAM
    • 输出数据流中的多个CRC插入
    • US20090210769A1
    • 2009-08-20
    • US12030938
    • 2008-02-14
    • Daniel F. CasperJohn R. FlanaganRoger G. HathornCatherine C. HuangMatthew J. Kalos
    • Daniel F. CasperJohn R. FlanaganRoger G. HathornCatherine C. HuangMatthew J. Kalos
    • H03M13/00
    • H03M13/09H04L1/0041H04L1/0061
    • A computer program product, apparatus, and method for inserting multiple CRCs in an output data stream from a channel subsystem to a control unit are provided. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes receiving a message to transmit from the channel subsystem to the control unit. The method also includes determining a first CRC insertion position, and receiving a first CRC calculated over a first block of data in the message. The method additionally includes inserting the first calculated CRC at the first CRC insertion position, and determining a second CRC insertion position. The method further includes receiving a second CRC calculated over a second block of data in the message, and inserting the second calculated CRC at the second CRC insertion position.
    • 提供了一种用于在从信道子系统到控制单元的输出数据流中插入多个CRC的计算机程序产品,装置和方法。 计算机程序产品包括可由处理电路读取的有形存储介质,并且存储由处理电路执行以执行方法的指令。 该方法包括接收从信道子系统发送到控制单元的消息。 该方法还包括确定第一CRC插入位置,以及接收通过消息中的第一数据块计算的第一CRC。 该方法还包括在第一CRC插入位置插入第一计算的CRC,以及确定第二CRC插入位置。 该方法还包括接收通过消息中的第二数据块计算的第二CRC,以及将第二计算CRC插入到第二CRC插入位置。