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1. 发明申请

US20090179254A1 Memory Device With Improved Performance And Method Of Manufacturing Such A Memory Device 审中-公开
标题翻译：具有改进性能的存储器件和制造这样的存储器件的方法
公开(公告)号：US20090179254A1
公开(公告)日：2009-07-16
申请号：US12067491
申请日：2006-09-13
申请人： Robertus Theodorus Franciscus Van Schaijk , Pablo Garcia Tello , Michiel Slotboom
发明人： Robertus Theodorus Franciscus Van Schaijk , Pablo Garcia Tello , Michiel Slotboom
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L29/1054 , G11C16/14 , H01L29/66833 , H01L29/7843 , H01L29/7848 , H01L29/792
摘要： Non-volatile memory device on a semiconductor substrate, comprising a semiconductor base layer, a charge storage layer stack, and a control gate; the base layer comprising source and drain regions and a current-carrying channel region being positioned in between the source and drain regions; the charge storage layer stack comprising a first insulating layer, a charge trapping layer and a second insulating layer, the first insulating layer being positioned above the current-carrying channel region, the charge trapping layer being above the first insulating layer and the second insulating layer being above the charge trapping layer; the control gate being positioned above the charge storage layer stack; the charge storage layer stack being arranged for trapping charge in the charge trapping layer by direct tunneling of charge carriers from the current-carrying channel region through the first insulating layer, wherein the current-carrying channel region is a p-type channel for p-type charge carriers, and the material of at least one of the current-carrying channel region and/or the source and drain regions is in an elastically strained state.
摘要翻译：半导体基板上的非易失性存储器件，包括半导体基底层，电荷存储层堆叠和控制栅极; 所述基极层包括源极和漏极区域，并且载流通道区域位于所述源极和漏极区域之间; 所述电荷存储层堆叠包括第一绝缘层，电荷捕获层和第二绝缘层，所述第一绝缘层位于所述载流通道区域的上方，所述电荷捕获层位于所述第一绝缘层之上，所述第二绝缘层位于电荷捕获层之上; 控制栅极位于电荷存储层堆叠之上; 电荷存储层堆叠被布置用于通过从载流通道区域穿过第一绝缘层直接隧穿隧穿电荷来俘获电荷俘获层，其中载流通道区域是p型沟道，并且载流通道区域和/或源极和漏极区域中的至少一个的材料处于弹性应变状态。

2. 发明申请

US20090200536A1 Method for manufacturing an electric device with a layer of conductive material contracted by nanowire 有权
标题翻译：制造具有由纳米线收缩的导电材料层的电气装置的方法
公开(公告)号：US20090200536A1
公开(公告)日：2009-08-13
申请号：US11631212
申请日：2005-06-28
申请人： Robertus Theodorus Franciscus Van Schaijk , Prabhat Agarwal , Erik Petrus Antonius Maria Bakkers , Martijn Henri Richard Lankhorst , Michiel Jos Van Duuren , Abraham Rudolf Balkenende , Louis Felix Feiner , Pierre Hermanus Woerlee
发明人： Robertus Theodorus Franciscus Van Schaijk , Prabhat Agarwal , Erik Petrus Antonius Maria Bakkers , Martijn Henri Richard Lankhorst , Michiel Jos Van Duuren , Abraham Rudolf Balkenende , Louis Felix Feiner , Pierre Hermanus Woerlee
IPC分类号： H01L47/00 , H01L21/3205
CPC分类号： H01L45/1273 , B82Y10/00 , G11C13/0004 , G11C13/025 , G11C2213/81 , H01L21/28525 , H01L21/76879 , H01L27/2409 , H01L27/2436 , H01L27/2472 , H01L27/2481 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148 , H01L45/16
摘要： The electric device (100) according to the invention comprises a layer (107) of a memory material which has an electrical resistivity switchable between a first value and a second value. The memory material may be a phase change material. The electric device (100) further comprises a set of nanowires (NW) electrically connecting a first terminal (172) of the electric device and the layer (107) of memory material thereby enabling conduction of an electric current from the first terminal via the nanowires (NW) and the layer (107) of memory material to a second terminal (272) of the electric device. Each nanowire (NW) electrically contacts the layer (107) of memory material in a respective contact area. All contact areas are substantially identical. The method according to the invention is suited to manufacture the electric device (100) according to the invention.
摘要翻译：根据本发明的电子设备（100）包括存储材料的层（107），其具有可在第一值和第二值之间切换的电阻率。记忆材料可以是相变材料。电气设备（100）还包括电连接电子设备的第一端子（172）和存储器材料层（107）的一组纳米线（NW），从而能够经由纳米线传导来自第一端子的电流（NW）和存储器材料层（107）连接到电气设备的第二端子（272）。每个纳米线（NW）在相应的接触区域中电接触存储器材料的层（107）。所有接触区域基本相同。根据本发明的方法适用于制造根据本发明的电子设备（100）。

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