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    • 6. 发明授权
    • Methods of fabricating gallium nitride semiconductor layers by lateral growth from sidewalls into trenches, and gallium nitride semiconductor structures fabricated thereby
    • 通过从侧壁横向生长成沟槽来制造氮化镓半导体层的方法,以及由此制造的氮化镓半导体结构
    • US06265289B1
    • 2001-07-24
    • US09327136
    • 1999-06-07
    • Tsvetanka ZhelevaDarren B. ThomsonScott A. SmithKevin J. LinthicumThomas GehrkeRobert F. Davis
    • Tsvetanka ZhelevaDarren B. ThomsonScott A. SmithKevin J. LinthicumThomas GehrkeRobert F. Davis
    • H01L2136
    • H01L21/0265H01L21/02378H01L21/02458H01L21/0254H01L21/0262H01L21/02639H01L21/02647H01S5/021H01S2304/12
    • A sidewall of an underlying gallium nitride layer is laterally grown into a trench in the underlying gallium nitride layer, to thereby form a lateral gallium nitride semiconductor layer. Microelectronic devices may then be formed in the lateral gallium nitride layer. Dislocation defects do not significantly propagate laterally from the sidewall into the trench in the underlying gallium nitride layer, so that the lateral gallium nitride semiconductor layer is relatively defect free. Moreover, the sidewall growth may be accomplished without the need to mask portions of the underlying gallium nitride layer during growth of the lateral gallium nitride layer. The defect density of the lateral gallium nitride semiconductor layer may be further decreased by growing a second gallium nitride semiconductor layer from the lateral gallium nitride layer. In one embodiment, the lateral gallium nitride layer is masked with a mask that includes an array of openings therein. The lateral gallium nitride layer is then grown through the array of openings and onto the mask, to thereby form an overgrown gallium nitride semiconductor layer. In another embodiment, the lateral gallium nitride layer is grown vertically. A plurality of second sidewalls are formed in the vertically grown gallium nitride layer to define a plurality of second trenches. The plurality of second sidewalls of the vertically grown gallium nitride layer are then laterally grown into the plurality of second trenches, to thereby form a second lateral gallium nitride layer. Microelectronic devices are then formed in the gallium nitride semiconductor layer.
    • 下面的氮化镓层的侧壁横向生长在下面的氮化镓层中的沟槽中,从而形成横向氮化镓半导体层。 然后可以在横向氮化镓层中形成微电子器件。 位错缺陷不会从侧壁横向渗透到下面的氮化镓层中的沟槽中,使得侧向氮化镓半导体层相对无缺陷。 此外,可以在横向氮化镓层的生长期间不需要掩盖下面的氮化镓层的部分来实现侧壁生长。 通过从侧向氮化镓层生长第二氮化镓半导体层,可以进一步降低横向氮化镓半导体层的缺陷密度。 在一个实施例中,横向氮化镓层用包括其中的开口阵列的掩模掩蔽。 然后横向氮化镓层通过开口阵列生长到掩模上,从而形成过度生长的氮化镓半导体层。 在另一个实施例中,横向氮化镓层垂直生长。 在垂直生长的氮化镓层中形成多个第二侧壁以限定多个第二沟槽。 然后将垂直生长的氮化镓层的多个第二侧壁横向生长成多个第二沟槽,从而形成第二横向氮化镓层。 然后在氮化镓半导体层中形成微电子器件。
    • 10. 发明授权
    • Methods of forming zinc oxide based II-VI compound semiconductor layers with shallow acceptor conductivities
    • 形成具有浅受主电导率的氧化锌基II-VI化合物半导体层的方法
    • US07723154B1
    • 2010-05-25
    • US11551058
    • 2006-10-19
    • Bunmi T. AdekoreJonathan M. PierceRobert F. DavisGeorge B. Kenney
    • Bunmi T. AdekoreJonathan M. PierceRobert F. DavisGeorge B. Kenney
    • H01L21/00
    • H01L21/02565H01L21/0237H01L21/02554H01L21/02573H01L21/02579H01L21/02581H01L21/0262H01L21/425
    • A p-type ZnO-based II-VI compound semiconductor layer has silver, potassium and/or gold dopants therein at a net p-type dopant concentration of greater than about 1×1017 cm−3. A method of forming the layer includes using an atomic layer deposition (ALD) technique. This technique includes exposing a substrate to a combination of gases: a first reaction gas containing zinc at a concentration that is repeatedly transitioned between at least two concentration levels during a processing time interval, a second reaction gas containing oxygen and a p-type dopant gas containing at least one p-type dopant species selected from a group consisting of silver, potassium and gold. A concentration of oxygen in the second reaction gas may also be repeatedly transitioned between at least two concentration levels. The concentration of zinc in the first reaction gas and the concentration of oxygen in the second reaction gas may be transitioned in an alternating sequence, so that relatively high zinc concentrations in the first reaction gas overlap with relatively low oxygen concentrations in the second reaction gas and vice versa.
    • p型ZnO基II-VI化合物半导体层在其中具有大于约1×1017cm-3的净p型掺杂剂浓度的银,钾和/或金掺杂剂。 形成层的方法包括使用原子层沉积(ALD)技术。 这种技术包括将基底暴露于气体组合中:在处理时间间隔内以至少两个浓度水平重复过渡浓度的锌的第一反应气体,含有氧的第二反应气体和p型掺杂气体 含有选自银,钾和金的至少一种p型掺杂剂物质。 第二反应气体中的氧浓度也可以在至少两个浓度水平之间重复地转变。 第一反应气体中的锌的浓度和第二反应气体中的氧浓度可以以交替的顺序转变,使得第一反应气体中相对较高的锌浓度与第二反应气体中相对较低的氧浓度重叠, 反之亦然。