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1. 发明申请

US20140007029A1 METHOD FOR ANALYZING PLACEMENT CONTEXT SENSITIVITY OF STANDARD CELLS 有权
标题翻译：分析标准细胞的位置敏感性的方法
公开(公告)号：US20140007029A1
公开(公告)日：2014-01-02
申请号：US13536694
申请日：2012-06-28
申请人： Robert E. Boone , Puneet Sharma , Matthew A. Thompson
发明人： Robert E. Boone , Puneet Sharma , Matthew A. Thompson
IPC分类号： G06F17/50
CPC分类号： G06F17/5072
摘要： A disclosed method for evaluating placement context sensitivity in the design of an integrated circuit includes accessing a standard cell library comprising a database of standard cells and determining generating boundary data for each of the standard cells. The boundary data for a standard cell indicates the layout of features located within boundary regions of the standard cell. The method includes merging or consolidating boundary data for any two standard cells if their boundary data is the same to determine a canonical or minimal set of boundary regions. The disclosed method further includes enumerating and evaluating all combinations of pairs of the canonical boundary regions and, responsive to identifying of a proximity-based sensitivity or exception, modifying, notating, or otherwise remediating the applicable one or more standard cells that correspond to the boundary region combination that raised the exception.
摘要翻译：用于评估集成电路设计中的放置上下文敏感度的公开的方法包括访问包括标准单元的数据库的标准单元库，并且为每个标准单元确定生成边界数据。标准单元的边界数据表示位于标准单元的边界区域内的特征的布局。该方法包括如果边界数据相同以合并或合并任何两个标准单元的边界数据，以确定边界区域的典型或最小集合。所公开的方法还包括枚举和评估规范边界区域对的所有组合，并且响应于识别基于接近度的灵敏度或异常，修改，表示或以其他方式修复与边界对应的适用的一个或多个标准单元引起异常的区域组合。

2. 发明授权

US08661393B2 Method for analyzing placement context sensitivity of standard cells 有权
标题翻译：分析标准细胞放置上下文敏感度的方法
公开(公告)号：US08661393B2
公开(公告)日：2014-02-25
申请号：US13536694
申请日：2012-06-28
申请人： Robert E. Boone , Puneet Sharma , Matthew A. Thompson
发明人： Robert E. Boone , Puneet Sharma , Matthew A. Thompson
IPC分类号： G06F17/50
CPC分类号： G06F17/5072
摘要： A disclosed method for evaluating placement context sensitivity in the design of an integrated circuit includes accessing a standard cell library comprising a database of standard cells and determining generating boundary data for each of the standard cells. The boundary data for a standard cell indicates the layout of features located within boundary regions of the standard cell. The method includes merging or consolidating boundary data for any two standard cells if their boundary data is the same to determine a canonical or minimal set of boundary regions. The disclosed method further includes enumerating and evaluating all combinations of pairs of the canonical boundary regions and, responsive to identifying of a proximity-based sensitivity or exception, modifying, notating, or otherwise remediating the applicable one or more standard cells that correspond to the boundary region combination that raised the exception.
摘要翻译：用于评估集成电路设计中的放置上下文敏感度的公开的方法包括访问包括标准单元的数据库的标准单元库，并且为每个标准单元确定生成边界数据。标准单元的边界数据表示位于标准单元的边界区域内的特征的布局。该方法包括如果边界数据相同以合并或合并任何两个标准单元的边界数据，以确定边界区域的典型或最小集合。所公开的方法还包括列举和评估规范边界区域对的所有组合，并且响应于识别基于接近度的灵敏度或异常，修改，表示或以其他方式补救对应于边界的可应用的一个或多个标准单元引起异常的区域组合。

3. 发明申请

US20140132315A1 INTEGRATED CIRCUIT WITH DEGRADATION MONITORING 有权
标题翻译：集成电路与降解监测
公开(公告)号：US20140132315A1
公开(公告)日：2014-05-15
申请号：US13677800
申请日：2012-11-15
申请人： Puneet Sharma , Matthew A. Thompson , Willard E. Conley
发明人： Puneet Sharma , Matthew A. Thompson , Willard E. Conley
IPC分类号： H03L7/00
CPC分类号： G01R31/3016 , G01R31/2884
摘要： An integrated circuit including a degradation monitoring circuit. The degradation monitoring circuit includes a comparison circuit having a delay element including an input coupled to a data node of a timing path and having an output to provide a delayed signal of a data signal of the data node. The comparison circuit includes a logic comparator that provides a logic comparison between a data signal of the data node and the output of the delay element. The monitoring circuit includes a sampling circuit that provides a sampled signal of the output of the logic comparator that is a sampled with respect to a clock signal of the clock signal line. The monitoring circuit includes a hold circuit that provides a signal indicative of a data signal of the data node transitioning within a predetermined time of an edge transition of a clock signal of the clock signal line.
摘要翻译：一种包括劣化监测电路的集成电路。劣化监视电路包括具有延迟元件的比较电路，该延迟元件包括耦合到定时路径的数据节点的输入，并具有输出以提供数据节点的数据信号的延迟信号。比较电路包括逻辑比较器，其提供数据节点的数据信号和延迟元件的输出之间的逻辑比较。监视电路包括采样电路，该采样电路提供对于时钟信号线的时钟信号采样的逻辑比较器的输出的采样信号。监视电路包括保持电路，该保持电路提供指示在时钟信号线的时钟信号的边沿转换的预定时间内数据节点的数据信号的信号。

4. 发明授权

US06352803B1 Coatings on reflective mask substrates 有权
标题翻译：反光掩模基板上的涂层
公开(公告)号：US06352803B1
公开(公告)日：2002-03-05
申请号：US09587836
申请日：2000-06-06
申请人： William Man-Wai Tong , John S. Taylor , Scott D. Hector , Pawitter J. S. Mangat , Alan R. Stivers , Patrick G. Kofron , Matthew A. Thompson
发明人： William Man-Wai Tong , John S. Taylor , Scott D. Hector , Pawitter J. S. Mangat , Alan R. Stivers , Patrick G. Kofron , Matthew A. Thompson
IPC分类号： G03F900
CPC分类号： B82Y10/00 , B82Y40/00 , G03F1/24 , G03F1/38 , G03F1/46 , G21K2201/067
摘要： A process for creating a mask substrate involving depositing: 1) a coating on one or both sides of a low thermal expansion material EUVL mask substrate to improve defect inspection, surface finishing, and defect levels; and 2) a high dielectric coating, on the backside to facilitate electrostatic chucking and to correct for any bowing caused by the stress imbalance imparted by either other deposited coatings or the multilayer coating of the mask substrate. An film, such as TaSi, may be deposited on the front side and/or back of the low thermal expansion material before the material coating to balance the stress. The low thermal expansion material with a silicon overlayer and a silicon and/or other conductive underlayer enables improved defect inspection and stress balancing.
摘要翻译：一种用于产生掩模基板的方法，包括沉积：1）在低热膨胀材料EUVL掩模基板的一侧或两侧上的涂层，以改善缺陷检查，表面光洁度和缺陷水平; 和2）在背面的高电介质涂层，以便于静电吸附并且校正由其它沉积涂层或掩模基底的多层涂层赋予的应力不平衡引起的任何弯曲。在材料涂覆之前，诸如TaSi的膜可以沉积在低热膨胀材料的前侧和/或背面以平衡应力。具有硅覆盖层和硅和/或其它导电底层的低热膨胀材料能够改善缺陷检查和应力平衡。

5. 发明授权

US5885856A Integrated circuit having a dummy structure and method of making 失效
标题翻译：具有虚拟结构的集成电路及其制造方法
公开(公告)号：US5885856A
公开(公告)日：1999-03-23
申请号：US704481
申请日：1996-08-21
申请人： Percy V. Gilbert , Subramoney Iyer , Bradley P. Smith , Matthew A. Thompson , Kevin Kemp , Rajive Dhar
发明人： Percy V. Gilbert , Subramoney Iyer , Bradley P. Smith , Matthew A. Thompson , Kevin Kemp , Rajive Dhar
IPC分类号： H01L21/76 , H01L21/304 , H01L21/3105 , H01L21/762 , H01L21/768 , H01L21/70
CPC分类号： H01L21/31053 , H01L21/76229 , H01L21/76819
摘要： A pattern of dummy structures (20) is added to the layout pattern of an integrated circuit (10) to equilibrate the polishing rate across the surface of a semiconductor substrate (11). The location of each dummy structure (20) is predetermined so that it does not intersect a well boundary (17) or an active region (21,27), and does not fall under a conductive material such as a layer of polysilicon (22,28) or an interconnect structure (23,29).
摘要翻译：在集成电路（10）的布局图案中添加了虚拟结构（20）的图案，以平衡半导体衬底（11）的表面上的抛光速率。每个虚拟结构（20）的位置是预定的，使得其不与阱边界（17）或有源区（21,27）相交，并且不会落在导电材料（例如多晶硅层22） 28）或互连结构（23,29）。

6. 发明申请

US20090108305A1 SEMICONDUCTOR HAVING A CORNER COMPENSATION FEATURE AND METHOD 审中-公开
标题翻译：具有拐角补偿特征和方法的半导体
公开(公告)号：US20090108305A1
公开(公告)日：2009-04-30
申请号：US11927962
申请日：2007-10-30
申请人： Lionel J. Riviere-Cazaux , Matthew A. Thompson
发明人： Lionel J. Riviere-Cazaux , Matthew A. Thompson
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/4232 , G03F1/36 , H01L29/78
摘要： A semiconductor device includes an active semiconductor material. A transistor gate overlies a first portion of the active semiconductor material. A second portion intersects the first portion at a corner which is distorted during manufacture resulting in rounding of the corner. The active semiconductor material extends into the corner to create a concave corner. To reduce the corner rounding, a compensation feature extends from a first edge of the first portion by an amount less than needed to provide an electrical contact structure on the compensation feature. The feature is positioned laterally further away from the corner than the overlying transistor gate. The compensation feature is positioned from the corner by a dimension that is within 0.4 to 0.6 of the wavelength of light used to image features of the semiconductor device. Due to optical distortion the compensation feature itself has a nonlinear shape.
摘要翻译：半导体器件包括有源半导体材料。晶体管栅极覆盖有源半导体材料的第一部分。第二部分在制造期间变形的角部处与第一部分相交，导致拐角的四舍五入。有源半导体材料延伸到角部以产生凹角。为了减少角落四舍五入，补偿特征从第一部分的第一边缘延伸的量小于在补偿特征上提供电接触结构所需的量。该特征被定位在横向上比上覆的晶体管栅极更远离拐角。补偿特征从角部定位在用于对半导体器件的图像特征的光的波长的0.4至0.6内的尺寸。由于光学失真，补偿特征本身具有非线性的形状。

7. 发明申请

US20080277816A1 Method and mold assembly for making a molded foam article 有权
标题翻译：用于制造模制泡沫制品的方法和模具组装
公开(公告)号：US20080277816A1
公开(公告)日：2008-11-13
申请号：US11801540
申请日：2007-05-10
申请人： Matthew A. Thompson , Timothy T. Oberle , John J. Corrigan, III , Robert D. Wheeler
发明人： Matthew A. Thompson , Timothy T. Oberle , John J. Corrigan, III , Robert D. Wheeler
IPC分类号： B29C44/58
CPC分类号： B29C44/146 , B29C44/18
摘要： A mold assembly for making a molded foam article generally includes a housing having an internal cavity and an opening into the cavity, a movable support member movable between an inner position and an outer position, an object supported by the support member and having a three-dimensional shape, and a closure. A method for making a molded foam article generally includes moving the support member to the outer position, positioning a film web over the object to form a substantially convex envelopment, moving the support member to the inner position while maintaining the film web in contact with the object to reconfigure the substantially convex film envelopment into a partially concave film envelopment, and dispensing a predetermined amount of a foamable composition into the hollow space provided by the concave envelopment.
摘要翻译：用于制造模制泡沫制品的模具组件通常包括具有内部空腔和通向所述空腔的开口的壳体，在内部位置和外部位置之间可移动的可移动支撑构件，由所述支撑构件支撑并具有三维构件的物体，尺寸形状和封闭。制造模制泡沫制品的方法通常包括将支撑构件移动到外部位置，将薄膜纤维网定位在物体上以形成基本上凸起的包层，将支撑构件移动到内部位置，同时保持薄膜幅材与目的是将基本上凸起的膜包膜重新配置成部分凹形的膜包膜，并将预定量的可发泡组合物分配到由凹入的包封提供的中空空间中。

8. 发明授权

US07566220B1 Modular propane gas log burner 失效
标题翻译：模块化丙烷气体燃烧器
公开(公告)号：US07566220B1
公开(公告)日：2009-07-28
申请号：US11214442
申请日：2005-08-29
申请人： Matthew A. Thompson
发明人： Matthew A. Thompson
IPC分类号： F23D14/62
CPC分类号： F23D14/58 , F23C7/008 , F24C3/006
摘要： The present invention relates to a modular propane gas log burner for use in fireplaces that were originally designed as wood burning fireplaces. The present burner is designed for clean burning of propane fuel and is modular so that more than one burner can be used in combination in order to create a burner configuration for wider single-sided gas log sets, for deeper single-sided gas log sets, and for two-sided or see-through gas log sets. The burner is provided with means for adjusting the fuel-to-air ratio and for adjusting the position of the flames to allow the user to achieve realistic and clean burning flames.
摘要翻译：本发明涉及一种最初设计为木材燃烧壁炉的壁炉用模块化丙烷气体燃烧器。本燃烧器设计用于丙烷燃料的清洁燃烧，并且是模块化的，使得可以组合使用多于一个燃烧器，以便为较宽的单面气体对数组创建燃烧器配置，用于更深的单面气体测井仪，并且用于双面或透视气体测井仪。燃烧器设置有用于调节燃料与空气比的装置，并且用于调节火焰的位置以允许使用者实现现实和清洁的燃烧火焰。

9. 发明授权

US07553437B2 Method and mold assembly for making a molded foam article 有权
标题翻译：用于制造模制泡沫制品的方法和模具组装
公开(公告)号：US07553437B2
公开(公告)日：2009-06-30
申请号：US11801540
申请日：2007-05-10
申请人： Matthew A. Thompson , Timothy T. Oberle , John J. Corrigan, III , Robert D. Wheeler
发明人： Matthew A. Thompson , Timothy T. Oberle , John J. Corrigan, III , Robert D. Wheeler
IPC分类号： B29C44/42
CPC分类号： B29C44/146 , B29C44/18
摘要： A mold assembly for making a molded foam article generally includes a housing having an internal cavity and an opening into the cavity, a movable support member movable between an inner position and an outer position, an object supported by the support member and having a three-dimensional shape, and a closure. A method for making a molded foam article generally includes moving the support member to the outer position, positioning a film web over the object to form a substantially convex envelopment, moving the support member to the inner position while maintaining the film web in contact with the object to reconfigure the substantially convex film envelopment into a partially concave film envelopment, and dispensing a predetermined amount of a foamable composition into the hollow space provided by the concave envelopment.
摘要翻译：用于制造模制泡沫制品的模具组件通常包括具有内部空腔和通向所述空腔的开口的壳体，在内部位置和外部位置之间可移动的可移动支撑构件，由所述支撑构件支撑并具有三维构件的物体，尺寸形状和封闭。制造模制泡沫制品的方法通常包括将支撑构件移动到外部位置，将薄膜纤维网定位在物体上以形成基本上凸起的包层，将支撑构件移动到内部位置，同时保持薄膜幅材与目的是将基本上凸起的膜包膜重新配置成部分凹形的膜包膜，并将预定量的可发泡组合物分配到由凹入的包封提供的中空空间中。

10. 发明授权

US5552247A Method for patterning an X-ray master mask 失效
标题翻译：图案化X射线主掩模的方法
公开(公告)号：US5552247A
公开(公告)日：1996-09-03
申请号：US678098
申请日：1991-04-01
申请人： Whitson G. Waldo, III , Matthew A. Thompson
发明人： Whitson G. Waldo, III , Matthew A. Thompson
IPC分类号： G03F1/22 , G03F7/20 , G03F9/00
CPC分类号： G03F1/22 , G03F7/2002
摘要： A method of patterning an X-ray master mask (21) is described by using reduction projection. An X-ray mask (21) is provided with a photoactive material coating a plating base layer (24). The X-ray mask (21) is positioned under the reduction projection tool. The photoactive material on the X-ray mask (21) is exposed from a pattern (13) in the reduction projection tool.
摘要翻译：通过使用缩小投影来描述图案化X射线主掩模（21）的方法。 X射线掩模（21）设置有涂覆有电镀基层（24）的光活性材料。 X射线掩模（21）位于缩小投影工具下方。 X射线掩模（21）上的光活性材料从还原投影工具中的图案（13）露出。

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